From 0666a6ba1dbd66cf8b93c113e362ccbcd99152a0 Mon Sep 17 00:00:00 2001 From: Arne Dußin Date: Sat, 6 Nov 2021 11:50:33 +0100 Subject: Initial commit --- src/dsu/cid0.rs | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 src/dsu/cid0.rs (limited to 'src/dsu/cid0.rs') diff --git a/src/dsu/cid0.rs b/src/dsu/cid0.rs new file mode 100644 index 0000000..e3c1f72 --- /dev/null +++ b/src/dsu/cid0.rs @@ -0,0 +1,52 @@ +#[doc = "Register `CID0` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Field `PREAMBLEB0` reader - Preamble Byte 0"] +pub struct PREAMBLEB0_R(crate::FieldReader); +impl PREAMBLEB0_R { + pub(crate) fn new(bits: u8) -> Self { + PREAMBLEB0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PREAMBLEB0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:7 - Preamble Byte 0"] + #[inline(always)] + pub fn preambleb0(&self) -> PREAMBLEB0_R { + PREAMBLEB0_R::new((self.bits & 0xff) as u8) + } +} +#[doc = "Component Identification 0\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cid0](index.html) module"] +pub struct CID0_SPEC; +impl crate::RegisterSpec for CID0_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [cid0::R](R) reader structure"] +impl crate::Readable for CID0_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets CID0 to value 0x0d"] +impl crate::Resettable for CID0_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0x0d + } +} -- cgit v1.2.3-70-g09d2