From 0666a6ba1dbd66cf8b93c113e362ccbcd99152a0 Mon Sep 17 00:00:00 2001 From: Arne Dußin Date: Sat, 6 Nov 2021 11:50:33 +0100 Subject: Initial commit --- src/rtc/mode0.rs | 40 +++ src/rtc/mode0/comp.rs | 102 ++++++++ src/rtc/mode0/count.rs | 102 ++++++++ src/rtc/mode0/ctrla.rs | 563 ++++++++++++++++++++++++++++++++++++++++++ src/rtc/mode0/dbgctrl.rs | 112 +++++++++ src/rtc/mode0/evctrl.rs | 526 +++++++++++++++++++++++++++++++++++++++ src/rtc/mode0/freqcorr.rs | 148 +++++++++++ src/rtc/mode0/intenclr.rs | 526 +++++++++++++++++++++++++++++++++++++++ src/rtc/mode0/intenset.rs | 526 +++++++++++++++++++++++++++++++++++++++ src/rtc/mode0/intflag.rs | 526 +++++++++++++++++++++++++++++++++++++++ src/rtc/mode0/syncbusy.rs | 147 +++++++++++ src/rtc/mode1.rs | 44 ++++ src/rtc/mode1/comp.rs | 103 ++++++++ src/rtc/mode1/count.rs | 102 ++++++++ src/rtc/mode1/ctrla.rs | 517 +++++++++++++++++++++++++++++++++++++++ src/rtc/mode1/dbgctrl.rs | 112 +++++++++ src/rtc/mode1/evctrl.rs | 572 +++++++++++++++++++++++++++++++++++++++++++ src/rtc/mode1/freqcorr.rs | 148 +++++++++++ src/rtc/mode1/intenclr.rs | 572 +++++++++++++++++++++++++++++++++++++++++++ src/rtc/mode1/intenset.rs | 572 +++++++++++++++++++++++++++++++++++++++++++ src/rtc/mode1/intflag.rs | 572 +++++++++++++++++++++++++++++++++++++++++++ src/rtc/mode1/per.rs | 102 ++++++++ src/rtc/mode1/syncbusy.rs | 185 ++++++++++++++ src/rtc/mode2.rs | 44 ++++ src/rtc/mode2/alarm.rs | 331 +++++++++++++++++++++++++ src/rtc/mode2/clock.rs | 331 +++++++++++++++++++++++++ src/rtc/mode2/ctrla.rs | 609 ++++++++++++++++++++++++++++++++++++++++++++++ src/rtc/mode2/dbgctrl.rs | 112 +++++++++ src/rtc/mode2/evctrl.rs | 526 +++++++++++++++++++++++++++++++++++++++ src/rtc/mode2/freqcorr.rs | 148 +++++++++++ src/rtc/mode2/intenclr.rs | 526 +++++++++++++++++++++++++++++++++++++++ src/rtc/mode2/intenset.rs | 526 +++++++++++++++++++++++++++++++++++++++ src/rtc/mode2/intflag.rs | 526 +++++++++++++++++++++++++++++++++++++++ src/rtc/mode2/mask.rs | 216 ++++++++++++++++ src/rtc/mode2/syncbusy.rs | 166 +++++++++++++ 35 files changed, 10980 insertions(+) create mode 100644 src/rtc/mode0.rs create mode 100644 src/rtc/mode0/comp.rs create mode 100644 src/rtc/mode0/count.rs create mode 100644 src/rtc/mode0/ctrla.rs create mode 100644 src/rtc/mode0/dbgctrl.rs create mode 100644 src/rtc/mode0/evctrl.rs create mode 100644 src/rtc/mode0/freqcorr.rs create mode 100644 src/rtc/mode0/intenclr.rs create mode 100644 src/rtc/mode0/intenset.rs create mode 100644 src/rtc/mode0/intflag.rs create mode 100644 src/rtc/mode0/syncbusy.rs create mode 100644 src/rtc/mode1.rs create mode 100644 src/rtc/mode1/comp.rs create mode 100644 src/rtc/mode1/count.rs create mode 100644 src/rtc/mode1/ctrla.rs create mode 100644 src/rtc/mode1/dbgctrl.rs create mode 100644 src/rtc/mode1/evctrl.rs create mode 100644 src/rtc/mode1/freqcorr.rs create mode 100644 src/rtc/mode1/intenclr.rs create mode 100644 src/rtc/mode1/intenset.rs create mode 100644 src/rtc/mode1/intflag.rs create mode 100644 src/rtc/mode1/per.rs create mode 100644 src/rtc/mode1/syncbusy.rs create mode 100644 src/rtc/mode2.rs create mode 100644 src/rtc/mode2/alarm.rs create mode 100644 src/rtc/mode2/clock.rs create mode 100644 src/rtc/mode2/ctrla.rs create mode 100644 src/rtc/mode2/dbgctrl.rs create mode 100644 src/rtc/mode2/evctrl.rs create mode 100644 src/rtc/mode2/freqcorr.rs create mode 100644 src/rtc/mode2/intenclr.rs create mode 100644 src/rtc/mode2/intenset.rs create mode 100644 src/rtc/mode2/intflag.rs create mode 100644 src/rtc/mode2/mask.rs create mode 100644 src/rtc/mode2/syncbusy.rs (limited to 'src/rtc') diff --git a/src/rtc/mode0.rs b/src/rtc/mode0.rs new file mode 100644 index 0000000..9ce5c38 --- /dev/null +++ b/src/rtc/mode0.rs @@ -0,0 +1,40 @@ +#[doc = "CTRLA register accessor: an alias for `Reg`"] +pub type CTRLA = crate::Reg; +#[doc = "MODE0 Control A"] +pub mod ctrla; +#[doc = "EVCTRL register accessor: an alias for `Reg`"] +pub type EVCTRL = crate::Reg; +#[doc = "MODE0 Event Control"] +pub mod evctrl; +#[doc = "INTENCLR register accessor: an alias for `Reg`"] +pub type INTENCLR = crate::Reg; +#[doc = "MODE0 Interrupt Enable Clear"] +pub mod intenclr; +#[doc = "INTENSET register accessor: an alias for `Reg`"] +pub type INTENSET = crate::Reg; +#[doc = "MODE0 Interrupt Enable Set"] +pub mod intenset; +#[doc = "INTFLAG register accessor: an alias for `Reg`"] +pub type INTFLAG = crate::Reg; +#[doc = "MODE0 Interrupt Flag Status and Clear"] +pub mod intflag; +#[doc = "DBGCTRL register accessor: an alias for `Reg`"] +pub type DBGCTRL = crate::Reg; +#[doc = "Debug Control"] +pub mod dbgctrl; +#[doc = "SYNCBUSY register accessor: an alias for `Reg`"] +pub type SYNCBUSY = crate::Reg; +#[doc = "MODE0 Synchronization Busy Status"] +pub mod syncbusy; +#[doc = "FREQCORR register accessor: an alias for `Reg`"] +pub type FREQCORR = crate::Reg; +#[doc = "Frequency Correction"] +pub mod freqcorr; +#[doc = "COUNT register accessor: an alias for `Reg`"] +pub type COUNT = crate::Reg; +#[doc = "MODE0 Counter Value"] +pub mod count; +#[doc = "COMP register accessor: an alias for `Reg`"] +pub type COMP = crate::Reg; +#[doc = "MODE0 Compare n Value"] +pub mod comp; diff --git a/src/rtc/mode0/comp.rs b/src/rtc/mode0/comp.rs new file mode 100644 index 0000000..36a5a84 --- /dev/null +++ b/src/rtc/mode0/comp.rs @@ -0,0 +1,102 @@ +#[doc = "Register `COMP` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `COMP` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `COMP` reader - Compare Value"] +pub struct COMP_R(crate::FieldReader); +impl COMP_R { + pub(crate) fn new(bits: u32) -> Self { + COMP_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COMP_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COMP` writer - Compare Value"] +pub struct COMP_W<'a> { + w: &'a mut W, +} +impl<'a> COMP_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u32) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff); + self.w + } +} +impl R { + #[doc = "Bits 0:31 - Compare Value"] + #[inline(always)] + pub fn comp(&self) -> COMP_R { + COMP_R::new((self.bits & 0xffff_ffff) as u32) + } +} +impl W { + #[doc = "Bits 0:31 - Compare Value"] + #[inline(always)] + pub fn comp(&mut self) -> COMP_W { + COMP_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE0 Compare n Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp](index.html) module"] +pub struct COMP_SPEC; +impl crate::RegisterSpec for COMP_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [comp::R](R) reader structure"] +impl crate::Readable for COMP_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [comp::W](W) writer structure"] +impl crate::Writable for COMP_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets COMP to value 0"] +impl crate::Resettable for COMP_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode0/count.rs b/src/rtc/mode0/count.rs new file mode 100644 index 0000000..77275a0 --- /dev/null +++ b/src/rtc/mode0/count.rs @@ -0,0 +1,102 @@ +#[doc = "Register `COUNT` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `COUNT` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `COUNT` reader - Counter Value"] +pub struct COUNT_R(crate::FieldReader); +impl COUNT_R { + pub(crate) fn new(bits: u32) -> Self { + COUNT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COUNT_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COUNT` writer - Counter Value"] +pub struct COUNT_W<'a> { + w: &'a mut W, +} +impl<'a> COUNT_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u32) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff); + self.w + } +} +impl R { + #[doc = "Bits 0:31 - Counter Value"] + #[inline(always)] + pub fn count(&self) -> COUNT_R { + COUNT_R::new((self.bits & 0xffff_ffff) as u32) + } +} +impl W { + #[doc = "Bits 0:31 - Counter Value"] + #[inline(always)] + pub fn count(&mut self) -> COUNT_W { + COUNT_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE0 Counter Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [count](index.html) module"] +pub struct COUNT_SPEC; +impl crate::RegisterSpec for COUNT_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [count::R](R) reader structure"] +impl crate::Readable for COUNT_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [count::W](W) writer structure"] +impl crate::Writable for COUNT_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets COUNT to value 0"] +impl crate::Resettable for COUNT_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode0/ctrla.rs b/src/rtc/mode0/ctrla.rs new file mode 100644 index 0000000..128b918 --- /dev/null +++ b/src/rtc/mode0/ctrla.rs @@ -0,0 +1,563 @@ +#[doc = "Register `CTRLA` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `CTRLA` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `SWRST` reader - Software Reset"] +pub struct SWRST_R(crate::FieldReader); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SWRST` writer - Software Reset"] +pub struct SWRST_W<'a> { + w: &'a mut W, +} +impl<'a> SWRST_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `ENABLE` reader - Enable"] +pub struct ENABLE_R(crate::FieldReader); +impl ENABLE_R { + pub(crate) fn new(bits: bool) -> Self { + ENABLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENABLE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENABLE` writer - Enable"] +pub struct ENABLE_W<'a> { + w: &'a mut W, +} +impl<'a> ENABLE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Operating Mode\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum MODE_A { + #[doc = "0: Mode 0: 32-bit Counter"] + COUNT32 = 0, + #[doc = "1: Mode 1: 16-bit Counter"] + COUNT16 = 1, + #[doc = "2: Mode 2: Clock/Calendar"] + CLOCK = 2, +} +impl From for u8 { + #[inline(always)] + fn from(variant: MODE_A) -> Self { + variant as _ + } +} +#[doc = "Field `MODE` reader - Operating Mode"] +pub struct MODE_R(crate::FieldReader); +impl MODE_R { + pub(crate) fn new(bits: u8) -> Self { + MODE_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option { + match self.bits { + 0 => Some(MODE_A::COUNT32), + 1 => Some(MODE_A::COUNT16), + 2 => Some(MODE_A::CLOCK), + _ => None, + } + } + #[doc = "Checks if the value of the field is `COUNT32`"] + #[inline(always)] + pub fn is_count32(&self) -> bool { + **self == MODE_A::COUNT32 + } + #[doc = "Checks if the value of the field is `COUNT16`"] + #[inline(always)] + pub fn is_count16(&self) -> bool { + **self == MODE_A::COUNT16 + } + #[doc = "Checks if the value of the field is `CLOCK`"] + #[inline(always)] + pub fn is_clock(&self) -> bool { + **self == MODE_A::CLOCK + } +} +impl core::ops::Deref for MODE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MODE` writer - Operating Mode"] +pub struct MODE_W<'a> { + w: &'a mut W, +} +impl<'a> MODE_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: MODE_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "Mode 0: 32-bit Counter"] + #[inline(always)] + pub fn count32(self) -> &'a mut W { + self.variant(MODE_A::COUNT32) + } + #[doc = "Mode 1: 16-bit Counter"] + #[inline(always)] + pub fn count16(self) -> &'a mut W { + self.variant(MODE_A::COUNT16) + } + #[doc = "Mode 2: Clock/Calendar"] + #[inline(always)] + pub fn clock(self) -> &'a mut W { + self.variant(MODE_A::CLOCK) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u16 & 0x03) << 2); + self.w + } +} +#[doc = "Field `MATCHCLR` reader - Clear on Match"] +pub struct MATCHCLR_R(crate::FieldReader); +impl MATCHCLR_R { + pub(crate) fn new(bits: bool) -> Self { + MATCHCLR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for MATCHCLR_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MATCHCLR` writer - Clear on Match"] +pub struct MATCHCLR_W<'a> { + w: &'a mut W, +} +impl<'a> MATCHCLR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); + self.w + } +} +#[doc = "Prescaler\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum PRESCALER_A { + #[doc = "0: CLK_RTC_CNT = GCLK_RTC/1"] + OFF = 0, + #[doc = "1: CLK_RTC_CNT = GCLK_RTC/1"] + DIV1 = 1, + #[doc = "2: CLK_RTC_CNT = GCLK_RTC/2"] + DIV2 = 2, + #[doc = "3: CLK_RTC_CNT = GCLK_RTC/4"] + DIV4 = 3, + #[doc = "4: CLK_RTC_CNT = GCLK_RTC/8"] + DIV8 = 4, + #[doc = "5: CLK_RTC_CNT = GCLK_RTC/16"] + DIV16 = 5, + #[doc = "6: CLK_RTC_CNT = GCLK_RTC/32"] + DIV32 = 6, + #[doc = "7: CLK_RTC_CNT = GCLK_RTC/64"] + DIV64 = 7, + #[doc = "8: CLK_RTC_CNT = GCLK_RTC/128"] + DIV128 = 8, + #[doc = "9: CLK_RTC_CNT = GCLK_RTC/256"] + DIV256 = 9, + #[doc = "10: CLK_RTC_CNT = GCLK_RTC/512"] + DIV512 = 10, + #[doc = "11: CLK_RTC_CNT = GCLK_RTC/1024"] + DIV1024 = 11, +} +impl From for u8 { + #[inline(always)] + fn from(variant: PRESCALER_A) -> Self { + variant as _ + } +} +#[doc = "Field `PRESCALER` reader - Prescaler"] +pub struct PRESCALER_R(crate::FieldReader); +impl PRESCALER_R { + pub(crate) fn new(bits: u8) -> Self { + PRESCALER_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option { + match self.bits { + 0 => Some(PRESCALER_A::OFF), + 1 => Some(PRESCALER_A::DIV1), + 2 => Some(PRESCALER_A::DIV2), + 3 => Some(PRESCALER_A::DIV4), + 4 => Some(PRESCALER_A::DIV8), + 5 => Some(PRESCALER_A::DIV16), + 6 => Some(PRESCALER_A::DIV32), + 7 => Some(PRESCALER_A::DIV64), + 8 => Some(PRESCALER_A::DIV128), + 9 => Some(PRESCALER_A::DIV256), + 10 => Some(PRESCALER_A::DIV512), + 11 => Some(PRESCALER_A::DIV1024), + _ => None, + } + } + #[doc = "Checks if the value of the field is `OFF`"] + #[inline(always)] + pub fn is_off(&self) -> bool { + **self == PRESCALER_A::OFF + } + #[doc = "Checks if the value of the field is `DIV1`"] + #[inline(always)] + pub fn is_div1(&self) -> bool { + **self == PRESCALER_A::DIV1 + } + #[doc = "Checks if the value of the field is `DIV2`"] + #[inline(always)] + pub fn is_div2(&self) -> bool { + **self == PRESCALER_A::DIV2 + } + #[doc = "Checks if the value of the field is `DIV4`"] + #[inline(always)] + pub fn is_div4(&self) -> bool { + **self == PRESCALER_A::DIV4 + } + #[doc = "Checks if the value of the field is `DIV8`"] + #[inline(always)] + pub fn is_div8(&self) -> bool { + **self == PRESCALER_A::DIV8 + } + #[doc = "Checks if the value of the field is `DIV16`"] + #[inline(always)] + pub fn is_div16(&self) -> bool { + **self == PRESCALER_A::DIV16 + } + #[doc = "Checks if the value of the field is `DIV32`"] + #[inline(always)] + pub fn is_div32(&self) -> bool { + **self == PRESCALER_A::DIV32 + } + #[doc = "Checks if the value of the field is `DIV64`"] + #[inline(always)] + pub fn is_div64(&self) -> bool { + **self == PRESCALER_A::DIV64 + } + #[doc = "Checks if the value of the field is `DIV128`"] + #[inline(always)] + pub fn is_div128(&self) -> bool { + **self == PRESCALER_A::DIV128 + } + #[doc = "Checks if the value of the field is `DIV256`"] + #[inline(always)] + pub fn is_div256(&self) -> bool { + **self == PRESCALER_A::DIV256 + } + #[doc = "Checks if the value of the field is `DIV512`"] + #[inline(always)] + pub fn is_div512(&self) -> bool { + **self == PRESCALER_A::DIV512 + } + #[doc = "Checks if the value of the field is `DIV1024`"] + #[inline(always)] + pub fn is_div1024(&self) -> bool { + **self == PRESCALER_A::DIV1024 + } +} +impl core::ops::Deref for PRESCALER_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PRESCALER` writer - Prescaler"] +pub struct PRESCALER_W<'a> { + w: &'a mut W, +} +impl<'a> PRESCALER_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: PRESCALER_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/1"] + #[inline(always)] + pub fn off(self) -> &'a mut W { + self.variant(PRESCALER_A::OFF) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/1"] + #[inline(always)] + pub fn div1(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV1) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/2"] + #[inline(always)] + pub fn div2(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV2) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/4"] + #[inline(always)] + pub fn div4(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV4) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/8"] + #[inline(always)] + pub fn div8(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV8) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/16"] + #[inline(always)] + pub fn div16(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV16) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/32"] + #[inline(always)] + pub fn div32(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV32) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/64"] + #[inline(always)] + pub fn div64(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV64) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/128"] + #[inline(always)] + pub fn div128(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV128) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/256"] + #[inline(always)] + pub fn div256(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV256) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/512"] + #[inline(always)] + pub fn div512(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV512) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/1024"] + #[inline(always)] + pub fn div1024(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV1024) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u16 & 0x0f) << 8); + self.w + } +} +#[doc = "Field `COUNTSYNC` reader - Count Read Synchronization Enable"] +pub struct COUNTSYNC_R(crate::FieldReader); +impl COUNTSYNC_R { + pub(crate) fn new(bits: bool) -> Self { + COUNTSYNC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COUNTSYNC_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COUNTSYNC` writer - Count Read Synchronization Enable"] +pub struct COUNTSYNC_W<'a> { + w: &'a mut W, +} +impl<'a> COUNTSYNC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Enable"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bits 2:3 - Operating Mode"] + #[inline(always)] + pub fn mode(&self) -> MODE_R { + MODE_R::new(((self.bits >> 2) & 0x03) as u8) + } + #[doc = "Bit 7 - Clear on Match"] + #[inline(always)] + pub fn matchclr(&self) -> MATCHCLR_R { + MATCHCLR_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bits 8:11 - Prescaler"] + #[inline(always)] + pub fn prescaler(&self) -> PRESCALER_R { + PRESCALER_R::new(((self.bits >> 8) & 0x0f) as u8) + } + #[doc = "Bit 15 - Count Read Synchronization Enable"] + #[inline(always)] + pub fn countsync(&self) -> COUNTSYNC_R { + COUNTSYNC_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&mut self) -> SWRST_W { + SWRST_W { w: self } + } + #[doc = "Bit 1 - Enable"] + #[inline(always)] + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W { w: self } + } + #[doc = "Bits 2:3 - Operating Mode"] + #[inline(always)] + pub fn mode(&mut self) -> MODE_W { + MODE_W { w: self } + } + #[doc = "Bit 7 - Clear on Match"] + #[inline(always)] + pub fn matchclr(&mut self) -> MATCHCLR_W { + MATCHCLR_W { w: self } + } + #[doc = "Bits 8:11 - Prescaler"] + #[inline(always)] + pub fn prescaler(&mut self) -> PRESCALER_W { + PRESCALER_W { w: self } + } + #[doc = "Bit 15 - Count Read Synchronization Enable"] + #[inline(always)] + pub fn countsync(&mut self) -> COUNTSYNC_W { + COUNTSYNC_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE0 Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"] +pub struct CTRLA_SPEC; +impl crate::RegisterSpec for CTRLA_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [ctrla::R](R) reader structure"] +impl crate::Readable for CTRLA_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"] +impl crate::Writable for CTRLA_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CTRLA to value 0"] +impl crate::Resettable for CTRLA_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode0/dbgctrl.rs b/src/rtc/mode0/dbgctrl.rs new file mode 100644 index 0000000..950156c --- /dev/null +++ b/src/rtc/mode0/dbgctrl.rs @@ -0,0 +1,112 @@ +#[doc = "Register `DBGCTRL` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `DBGCTRL` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `DBGRUN` reader - Run During Debug"] +pub struct DBGRUN_R(crate::FieldReader); +impl DBGRUN_R { + pub(crate) fn new(bits: bool) -> Self { + DBGRUN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DBGRUN_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DBGRUN` writer - Run During Debug"] +pub struct DBGRUN_W<'a> { + w: &'a mut W, +} +impl<'a> DBGRUN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +impl R { + #[doc = "Bit 0 - Run During Debug"] + #[inline(always)] + pub fn dbgrun(&self) -> DBGRUN_R { + DBGRUN_R::new((self.bits & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Run During Debug"] + #[inline(always)] + pub fn dbgrun(&mut self) -> DBGRUN_W { + DBGRUN_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Debug Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgctrl](index.html) module"] +pub struct DBGCTRL_SPEC; +impl crate::RegisterSpec for DBGCTRL_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [dbgctrl::R](R) reader structure"] +impl crate::Readable for DBGCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [dbgctrl::W](W) writer structure"] +impl crate::Writable for DBGCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets DBGCTRL to value 0"] +impl crate::Resettable for DBGCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode0/evctrl.rs b/src/rtc/mode0/evctrl.rs new file mode 100644 index 0000000..13550a3 --- /dev/null +++ b/src/rtc/mode0/evctrl.rs @@ -0,0 +1,526 @@ +#[doc = "Register `EVCTRL` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `EVCTRL` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PEREO0` reader - Periodic Interval 0 Event Output Enable"] +pub struct PEREO0_R(crate::FieldReader); +impl PEREO0_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO0` writer - Periodic Interval 0 Event Output Enable"] +pub struct PEREO0_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); + self.w + } +} +#[doc = "Field `PEREO1` reader - Periodic Interval 1 Event Output Enable"] +pub struct PEREO1_R(crate::FieldReader); +impl PEREO1_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO1` writer - Periodic Interval 1 Event Output Enable"] +pub struct PEREO1_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); + self.w + } +} +#[doc = "Field `PEREO2` reader - Periodic Interval 2 Event Output Enable"] +pub struct PEREO2_R(crate::FieldReader); +impl PEREO2_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO2_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO2` writer - Periodic Interval 2 Event Output Enable"] +pub struct PEREO2_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); + self.w + } +} +#[doc = "Field `PEREO3` reader - Periodic Interval 3 Event Output Enable"] +pub struct PEREO3_R(crate::FieldReader); +impl PEREO3_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO3_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO3` writer - Periodic Interval 3 Event Output Enable"] +pub struct PEREO3_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PEREO4` reader - Periodic Interval 4 Event Output Enable"] +pub struct PEREO4_R(crate::FieldReader); +impl PEREO4_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO4_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO4` writer - Periodic Interval 4 Event Output Enable"] +pub struct PEREO4_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); + self.w + } +} +#[doc = "Field `PEREO5` reader - Periodic Interval 5 Event Output Enable"] +pub struct PEREO5_R(crate::FieldReader); +impl PEREO5_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO5_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO5` writer - Periodic Interval 5 Event Output Enable"] +pub struct PEREO5_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); + self.w + } +} +#[doc = "Field `PEREO6` reader - Periodic Interval 6 Event Output Enable"] +pub struct PEREO6_R(crate::FieldReader); +impl PEREO6_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO6_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO6` writer - Periodic Interval 6 Event Output Enable"] +pub struct PEREO6_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); + self.w + } +} +#[doc = "Field `PEREO7` reader - Periodic Interval 7 Event Output Enable"] +pub struct PEREO7_R(crate::FieldReader); +impl PEREO7_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO7_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO7` writer - Periodic Interval 7 Event Output Enable"] +pub struct PEREO7_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); + self.w + } +} +#[doc = "Field `CMPEO0` reader - Compare 0 Event Output Enable"] +pub struct CMPEO0_R(crate::FieldReader); +impl CMPEO0_R { + pub(crate) fn new(bits: bool) -> Self { + CMPEO0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CMPEO0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMPEO0` writer - Compare 0 Event Output Enable"] +pub struct CMPEO0_W<'a> { + w: &'a mut W, +} +impl<'a> CMPEO0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); + self.w + } +} +#[doc = "Field `OVFEO` reader - Overflow Event Output Enable"] +pub struct OVFEO_R(crate::FieldReader); +impl OVFEO_R { + pub(crate) fn new(bits: bool) -> Self { + OVFEO_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVFEO_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVFEO` writer - Overflow Event Output Enable"] +pub struct OVFEO_W<'a> { + w: &'a mut W, +} +impl<'a> OVFEO_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Periodic Interval 0 Event Output Enable"] + #[inline(always)] + pub fn pereo0(&self) -> PEREO0_R { + PEREO0_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Periodic Interval 1 Event Output Enable"] + #[inline(always)] + pub fn pereo1(&self) -> PEREO1_R { + PEREO1_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Periodic Interval 2 Event Output Enable"] + #[inline(always)] + pub fn pereo2(&self) -> PEREO2_R { + PEREO2_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Periodic Interval 3 Event Output Enable"] + #[inline(always)] + pub fn pereo3(&self) -> PEREO3_R { + PEREO3_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Periodic Interval 4 Event Output Enable"] + #[inline(always)] + pub fn pereo4(&self) -> PEREO4_R { + PEREO4_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Periodic Interval 5 Event Output Enable"] + #[inline(always)] + pub fn pereo5(&self) -> PEREO5_R { + PEREO5_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Periodic Interval 6 Event Output Enable"] + #[inline(always)] + pub fn pereo6(&self) -> PEREO6_R { + PEREO6_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Periodic Interval 7 Event Output Enable"] + #[inline(always)] + pub fn pereo7(&self) -> PEREO7_R { + PEREO7_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Compare 0 Event Output Enable"] + #[inline(always)] + pub fn cmpeo0(&self) -> CMPEO0_R { + CMPEO0_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 15 - Overflow Event Output Enable"] + #[inline(always)] + pub fn ovfeo(&self) -> OVFEO_R { + OVFEO_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Periodic Interval 0 Event Output Enable"] + #[inline(always)] + pub fn pereo0(&mut self) -> PEREO0_W { + PEREO0_W { w: self } + } + #[doc = "Bit 1 - Periodic Interval 1 Event Output Enable"] + #[inline(always)] + pub fn pereo1(&mut self) -> PEREO1_W { + PEREO1_W { w: self } + } + #[doc = "Bit 2 - Periodic Interval 2 Event Output Enable"] + #[inline(always)] + pub fn pereo2(&mut self) -> PEREO2_W { + PEREO2_W { w: self } + } + #[doc = "Bit 3 - Periodic Interval 3 Event Output Enable"] + #[inline(always)] + pub fn pereo3(&mut self) -> PEREO3_W { + PEREO3_W { w: self } + } + #[doc = "Bit 4 - Periodic Interval 4 Event Output Enable"] + #[inline(always)] + pub fn pereo4(&mut self) -> PEREO4_W { + PEREO4_W { w: self } + } + #[doc = "Bit 5 - Periodic Interval 5 Event Output Enable"] + #[inline(always)] + pub fn pereo5(&mut self) -> PEREO5_W { + PEREO5_W { w: self } + } + #[doc = "Bit 6 - Periodic Interval 6 Event Output Enable"] + #[inline(always)] + pub fn pereo6(&mut self) -> PEREO6_W { + PEREO6_W { w: self } + } + #[doc = "Bit 7 - Periodic Interval 7 Event Output Enable"] + #[inline(always)] + pub fn pereo7(&mut self) -> PEREO7_W { + PEREO7_W { w: self } + } + #[doc = "Bit 8 - Compare 0 Event Output Enable"] + #[inline(always)] + pub fn cmpeo0(&mut self) -> CMPEO0_W { + CMPEO0_W { w: self } + } + #[doc = "Bit 15 - Overflow Event Output Enable"] + #[inline(always)] + pub fn ovfeo(&mut self) -> OVFEO_W { + OVFEO_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE0 Event Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [evctrl](index.html) module"] +pub struct EVCTRL_SPEC; +impl crate::RegisterSpec for EVCTRL_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [evctrl::R](R) reader structure"] +impl crate::Readable for EVCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [evctrl::W](W) writer structure"] +impl crate::Writable for EVCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets EVCTRL to value 0"] +impl crate::Resettable for EVCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode0/freqcorr.rs b/src/rtc/mode0/freqcorr.rs new file mode 100644 index 0000000..595f68c --- /dev/null +++ b/src/rtc/mode0/freqcorr.rs @@ -0,0 +1,148 @@ +#[doc = "Register `FREQCORR` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `FREQCORR` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `VALUE` reader - Correction Value"] +pub struct VALUE_R(crate::FieldReader); +impl VALUE_R { + pub(crate) fn new(bits: u8) -> Self { + VALUE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for VALUE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `VALUE` writer - Correction Value"] +pub struct VALUE_W<'a> { + w: &'a mut W, +} +impl<'a> VALUE_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x7f) | (value as u8 & 0x7f); + self.w + } +} +#[doc = "Field `SIGN` reader - Correction Sign"] +pub struct SIGN_R(crate::FieldReader); +impl SIGN_R { + pub(crate) fn new(bits: bool) -> Self { + SIGN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SIGN_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SIGN` writer - Correction Sign"] +pub struct SIGN_W<'a> { + w: &'a mut W, +} +impl<'a> SIGN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7); + self.w + } +} +impl R { + #[doc = "Bits 0:6 - Correction Value"] + #[inline(always)] + pub fn value(&self) -> VALUE_R { + VALUE_R::new((self.bits & 0x7f) as u8) + } + #[doc = "Bit 7 - Correction Sign"] + #[inline(always)] + pub fn sign(&self) -> SIGN_R { + SIGN_R::new(((self.bits >> 7) & 0x01) != 0) + } +} +impl W { + #[doc = "Bits 0:6 - Correction Value"] + #[inline(always)] + pub fn value(&mut self) -> VALUE_W { + VALUE_W { w: self } + } + #[doc = "Bit 7 - Correction Sign"] + #[inline(always)] + pub fn sign(&mut self) -> SIGN_W { + SIGN_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Frequency Correction\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [freqcorr](index.html) module"] +pub struct FREQCORR_SPEC; +impl crate::RegisterSpec for FREQCORR_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [freqcorr::R](R) reader structure"] +impl crate::Readable for FREQCORR_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [freqcorr::W](W) writer structure"] +impl crate::Writable for FREQCORR_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets FREQCORR to value 0"] +impl crate::Resettable for FREQCORR_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode0/intenclr.rs b/src/rtc/mode0/intenclr.rs new file mode 100644 index 0000000..2477d98 --- /dev/null +++ b/src/rtc/mode0/intenclr.rs @@ -0,0 +1,526 @@ +#[doc = "Register `INTENCLR` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `INTENCLR` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PER0` reader - Periodic Interval 0 Interrupt Enable"] +pub struct PER0_R(crate::FieldReader); +impl PER0_R { + pub(crate) fn new(bits: bool) -> Self { + PER0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER0` writer - Periodic Interval 0 Interrupt Enable"] +pub struct PER0_W<'a> { + w: &'a mut W, +} +impl<'a> PER0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `PER1` reader - Periodic Interval 1 Interrupt Enable"] +pub struct PER1_R(crate::FieldReader); +impl PER1_R { + pub(crate) fn new(bits: bool) -> Self { + PER1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER1` writer - Periodic Interval 1 Interrupt Enable"] +pub struct PER1_W<'a> { + w: &'a mut W, +} +impl<'a> PER1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Field `PER2` reader - Periodic Interval 2 Interrupt Enable"] +pub struct PER2_R(crate::FieldReader); +impl PER2_R { + pub(crate) fn new(bits: bool) -> Self { + PER2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER2_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER2` writer - Periodic Interval 2 Interrupt Enable"] +pub struct PER2_W<'a> { + w: &'a mut W, +} +impl<'a> PER2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2); + self.w + } +} +#[doc = "Field `PER3` reader - Periodic Interval 3 Interrupt Enable"] +pub struct PER3_R(crate::FieldReader); +impl PER3_R { + pub(crate) fn new(bits: bool) -> Self { + PER3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER3_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER3` writer - Periodic Interval 3 Interrupt Enable"] +pub struct PER3_W<'a> { + w: &'a mut W, +} +impl<'a> PER3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PER4` reader - Periodic Interval 4 Interrupt Enable"] +pub struct PER4_R(crate::FieldReader); +impl PER4_R { + pub(crate) fn new(bits: bool) -> Self { + PER4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER4_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER4` writer - Periodic Interval 4 Interrupt Enable"] +pub struct PER4_W<'a> { + w: &'a mut W, +} +impl<'a> PER4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4); + self.w + } +} +#[doc = "Field `PER5` reader - Periodic Interval 5 Interrupt Enable"] +pub struct PER5_R(crate::FieldReader); +impl PER5_R { + pub(crate) fn new(bits: bool) -> Self { + PER5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER5_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER5` writer - Periodic Interval 5 Interrupt Enable"] +pub struct PER5_W<'a> { + w: &'a mut W, +} +impl<'a> PER5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5); + self.w + } +} +#[doc = "Field `PER6` reader - Periodic Interval 6 Interrupt Enable"] +pub struct PER6_R(crate::FieldReader); +impl PER6_R { + pub(crate) fn new(bits: bool) -> Self { + PER6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER6_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER6` writer - Periodic Interval 6 Interrupt Enable"] +pub struct PER6_W<'a> { + w: &'a mut W, +} +impl<'a> PER6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6); + self.w + } +} +#[doc = "Field `PER7` reader - Periodic Interval 7 Interrupt Enable"] +pub struct PER7_R(crate::FieldReader); +impl PER7_R { + pub(crate) fn new(bits: bool) -> Self { + PER7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER7_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER7` writer - Periodic Interval 7 Interrupt Enable"] +pub struct PER7_W<'a> { + w: &'a mut W, +} +impl<'a> PER7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); + self.w + } +} +#[doc = "Field `CMP0` reader - Compare 0 Interrupt Enable"] +pub struct CMP0_R(crate::FieldReader); +impl CMP0_R { + pub(crate) fn new(bits: bool) -> Self { + CMP0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CMP0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMP0` writer - Compare 0 Interrupt Enable"] +pub struct CMP0_W<'a> { + w: &'a mut W, +} +impl<'a> CMP0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u16 & 0x01) << 8); + self.w + } +} +#[doc = "Field `OVF` reader - Overflow Interrupt Enable"] +pub struct OVF_R(crate::FieldReader); +impl OVF_R { + pub(crate) fn new(bits: bool) -> Self { + OVF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVF_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVF` writer - Overflow Interrupt Enable"] +pub struct OVF_W<'a> { + w: &'a mut W, +} +impl<'a> OVF_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"] + #[inline(always)] + pub fn per0(&self) -> PER0_R { + PER0_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"] + #[inline(always)] + pub fn per1(&self) -> PER1_R { + PER1_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"] + #[inline(always)] + pub fn per2(&self) -> PER2_R { + PER2_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"] + #[inline(always)] + pub fn per3(&self) -> PER3_R { + PER3_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"] + #[inline(always)] + pub fn per4(&self) -> PER4_R { + PER4_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"] + #[inline(always)] + pub fn per5(&self) -> PER5_R { + PER5_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"] + #[inline(always)] + pub fn per6(&self) -> PER6_R { + PER6_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"] + #[inline(always)] + pub fn per7(&self) -> PER7_R { + PER7_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Compare 0 Interrupt Enable"] + #[inline(always)] + pub fn cmp0(&self) -> CMP0_R { + CMP0_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 15 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ovf(&self) -> OVF_R { + OVF_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"] + #[inline(always)] + pub fn per0(&mut self) -> PER0_W { + PER0_W { w: self } + } + #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"] + #[inline(always)] + pub fn per1(&mut self) -> PER1_W { + PER1_W { w: self } + } + #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"] + #[inline(always)] + pub fn per2(&mut self) -> PER2_W { + PER2_W { w: self } + } + #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"] + #[inline(always)] + pub fn per3(&mut self) -> PER3_W { + PER3_W { w: self } + } + #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"] + #[inline(always)] + pub fn per4(&mut self) -> PER4_W { + PER4_W { w: self } + } + #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"] + #[inline(always)] + pub fn per5(&mut self) -> PER5_W { + PER5_W { w: self } + } + #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"] + #[inline(always)] + pub fn per6(&mut self) -> PER6_W { + PER6_W { w: self } + } + #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"] + #[inline(always)] + pub fn per7(&mut self) -> PER7_W { + PER7_W { w: self } + } + #[doc = "Bit 8 - Compare 0 Interrupt Enable"] + #[inline(always)] + pub fn cmp0(&mut self) -> CMP0_W { + CMP0_W { w: self } + } + #[doc = "Bit 15 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ovf(&mut self) -> OVF_W { + OVF_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE0 Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"] +pub struct INTENCLR_SPEC; +impl crate::RegisterSpec for INTENCLR_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [intenclr::R](R) reader structure"] +impl crate::Readable for INTENCLR_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"] +impl crate::Writable for INTENCLR_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTENCLR to value 0"] +impl crate::Resettable for INTENCLR_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode0/intenset.rs b/src/rtc/mode0/intenset.rs new file mode 100644 index 0000000..a7e67e9 --- /dev/null +++ b/src/rtc/mode0/intenset.rs @@ -0,0 +1,526 @@ +#[doc = "Register `INTENSET` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `INTENSET` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PER0` reader - Periodic Interval 0 Interrupt Enable"] +pub struct PER0_R(crate::FieldReader); +impl PER0_R { + pub(crate) fn new(bits: bool) -> Self { + PER0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER0` writer - Periodic Interval 0 Interrupt Enable"] +pub struct PER0_W<'a> { + w: &'a mut W, +} +impl<'a> PER0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `PER1` reader - Periodic Interval 1 Interrupt Enable"] +pub struct PER1_R(crate::FieldReader); +impl PER1_R { + pub(crate) fn new(bits: bool) -> Self { + PER1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER1` writer - Periodic Interval 1 Interrupt Enable"] +pub struct PER1_W<'a> { + w: &'a mut W, +} +impl<'a> PER1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Field `PER2` reader - Periodic Interval 2 Interrupt Enable"] +pub struct PER2_R(crate::FieldReader); +impl PER2_R { + pub(crate) fn new(bits: bool) -> Self { + PER2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER2_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER2` writer - Periodic Interval 2 Interrupt Enable"] +pub struct PER2_W<'a> { + w: &'a mut W, +} +impl<'a> PER2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2); + self.w + } +} +#[doc = "Field `PER3` reader - Periodic Interval 3 Interrupt Enable"] +pub struct PER3_R(crate::FieldReader); +impl PER3_R { + pub(crate) fn new(bits: bool) -> Self { + PER3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER3_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER3` writer - Periodic Interval 3 Interrupt Enable"] +pub struct PER3_W<'a> { + w: &'a mut W, +} +impl<'a> PER3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PER4` reader - Periodic Interval 4 Interrupt Enable"] +pub struct PER4_R(crate::FieldReader); +impl PER4_R { + pub(crate) fn new(bits: bool) -> Self { + PER4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER4_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER4` writer - Periodic Interval 4 Interrupt Enable"] +pub struct PER4_W<'a> { + w: &'a mut W, +} +impl<'a> PER4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4); + self.w + } +} +#[doc = "Field `PER5` reader - Periodic Interval 5 Interrupt Enable"] +pub struct PER5_R(crate::FieldReader); +impl PER5_R { + pub(crate) fn new(bits: bool) -> Self { + PER5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER5_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER5` writer - Periodic Interval 5 Interrupt Enable"] +pub struct PER5_W<'a> { + w: &'a mut W, +} +impl<'a> PER5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5); + self.w + } +} +#[doc = "Field `PER6` reader - Periodic Interval 6 Interrupt Enable"] +pub struct PER6_R(crate::FieldReader); +impl PER6_R { + pub(crate) fn new(bits: bool) -> Self { + PER6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER6_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER6` writer - Periodic Interval 6 Interrupt Enable"] +pub struct PER6_W<'a> { + w: &'a mut W, +} +impl<'a> PER6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6); + self.w + } +} +#[doc = "Field `PER7` reader - Periodic Interval 7 Interrupt Enable"] +pub struct PER7_R(crate::FieldReader); +impl PER7_R { + pub(crate) fn new(bits: bool) -> Self { + PER7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER7_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER7` writer - Periodic Interval 7 Interrupt Enable"] +pub struct PER7_W<'a> { + w: &'a mut W, +} +impl<'a> PER7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); + self.w + } +} +#[doc = "Field `CMP0` reader - Compare 0 Interrupt Enable"] +pub struct CMP0_R(crate::FieldReader); +impl CMP0_R { + pub(crate) fn new(bits: bool) -> Self { + CMP0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CMP0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMP0` writer - Compare 0 Interrupt Enable"] +pub struct CMP0_W<'a> { + w: &'a mut W, +} +impl<'a> CMP0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u16 & 0x01) << 8); + self.w + } +} +#[doc = "Field `OVF` reader - Overflow Interrupt Enable"] +pub struct OVF_R(crate::FieldReader); +impl OVF_R { + pub(crate) fn new(bits: bool) -> Self { + OVF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVF_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVF` writer - Overflow Interrupt Enable"] +pub struct OVF_W<'a> { + w: &'a mut W, +} +impl<'a> OVF_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"] + #[inline(always)] + pub fn per0(&self) -> PER0_R { + PER0_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"] + #[inline(always)] + pub fn per1(&self) -> PER1_R { + PER1_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"] + #[inline(always)] + pub fn per2(&self) -> PER2_R { + PER2_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"] + #[inline(always)] + pub fn per3(&self) -> PER3_R { + PER3_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"] + #[inline(always)] + pub fn per4(&self) -> PER4_R { + PER4_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"] + #[inline(always)] + pub fn per5(&self) -> PER5_R { + PER5_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"] + #[inline(always)] + pub fn per6(&self) -> PER6_R { + PER6_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"] + #[inline(always)] + pub fn per7(&self) -> PER7_R { + PER7_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Compare 0 Interrupt Enable"] + #[inline(always)] + pub fn cmp0(&self) -> CMP0_R { + CMP0_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 15 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ovf(&self) -> OVF_R { + OVF_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"] + #[inline(always)] + pub fn per0(&mut self) -> PER0_W { + PER0_W { w: self } + } + #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"] + #[inline(always)] + pub fn per1(&mut self) -> PER1_W { + PER1_W { w: self } + } + #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"] + #[inline(always)] + pub fn per2(&mut self) -> PER2_W { + PER2_W { w: self } + } + #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"] + #[inline(always)] + pub fn per3(&mut self) -> PER3_W { + PER3_W { w: self } + } + #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"] + #[inline(always)] + pub fn per4(&mut self) -> PER4_W { + PER4_W { w: self } + } + #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"] + #[inline(always)] + pub fn per5(&mut self) -> PER5_W { + PER5_W { w: self } + } + #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"] + #[inline(always)] + pub fn per6(&mut self) -> PER6_W { + PER6_W { w: self } + } + #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"] + #[inline(always)] + pub fn per7(&mut self) -> PER7_W { + PER7_W { w: self } + } + #[doc = "Bit 8 - Compare 0 Interrupt Enable"] + #[inline(always)] + pub fn cmp0(&mut self) -> CMP0_W { + CMP0_W { w: self } + } + #[doc = "Bit 15 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ovf(&mut self) -> OVF_W { + OVF_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE0 Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"] +pub struct INTENSET_SPEC; +impl crate::RegisterSpec for INTENSET_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [intenset::R](R) reader structure"] +impl crate::Readable for INTENSET_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"] +impl crate::Writable for INTENSET_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTENSET to value 0"] +impl crate::Resettable for INTENSET_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode0/intflag.rs b/src/rtc/mode0/intflag.rs new file mode 100644 index 0000000..ec57fdb --- /dev/null +++ b/src/rtc/mode0/intflag.rs @@ -0,0 +1,526 @@ +#[doc = "Register `INTFLAG` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `INTFLAG` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PER0` reader - Periodic Interval 0"] +pub struct PER0_R(crate::FieldReader); +impl PER0_R { + pub(crate) fn new(bits: bool) -> Self { + PER0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER0` writer - Periodic Interval 0"] +pub struct PER0_W<'a> { + w: &'a mut W, +} +impl<'a> PER0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `PER1` reader - Periodic Interval 1"] +pub struct PER1_R(crate::FieldReader); +impl PER1_R { + pub(crate) fn new(bits: bool) -> Self { + PER1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER1` writer - Periodic Interval 1"] +pub struct PER1_W<'a> { + w: &'a mut W, +} +impl<'a> PER1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Field `PER2` reader - Periodic Interval 2"] +pub struct PER2_R(crate::FieldReader); +impl PER2_R { + pub(crate) fn new(bits: bool) -> Self { + PER2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER2_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER2` writer - Periodic Interval 2"] +pub struct PER2_W<'a> { + w: &'a mut W, +} +impl<'a> PER2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2); + self.w + } +} +#[doc = "Field `PER3` reader - Periodic Interval 3"] +pub struct PER3_R(crate::FieldReader); +impl PER3_R { + pub(crate) fn new(bits: bool) -> Self { + PER3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER3_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER3` writer - Periodic Interval 3"] +pub struct PER3_W<'a> { + w: &'a mut W, +} +impl<'a> PER3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PER4` reader - Periodic Interval 4"] +pub struct PER4_R(crate::FieldReader); +impl PER4_R { + pub(crate) fn new(bits: bool) -> Self { + PER4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER4_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER4` writer - Periodic Interval 4"] +pub struct PER4_W<'a> { + w: &'a mut W, +} +impl<'a> PER4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4); + self.w + } +} +#[doc = "Field `PER5` reader - Periodic Interval 5"] +pub struct PER5_R(crate::FieldReader); +impl PER5_R { + pub(crate) fn new(bits: bool) -> Self { + PER5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER5_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER5` writer - Periodic Interval 5"] +pub struct PER5_W<'a> { + w: &'a mut W, +} +impl<'a> PER5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5); + self.w + } +} +#[doc = "Field `PER6` reader - Periodic Interval 6"] +pub struct PER6_R(crate::FieldReader); +impl PER6_R { + pub(crate) fn new(bits: bool) -> Self { + PER6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER6_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER6` writer - Periodic Interval 6"] +pub struct PER6_W<'a> { + w: &'a mut W, +} +impl<'a> PER6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6); + self.w + } +} +#[doc = "Field `PER7` reader - Periodic Interval 7"] +pub struct PER7_R(crate::FieldReader); +impl PER7_R { + pub(crate) fn new(bits: bool) -> Self { + PER7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER7_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER7` writer - Periodic Interval 7"] +pub struct PER7_W<'a> { + w: &'a mut W, +} +impl<'a> PER7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); + self.w + } +} +#[doc = "Field `CMP0` reader - Compare 0"] +pub struct CMP0_R(crate::FieldReader); +impl CMP0_R { + pub(crate) fn new(bits: bool) -> Self { + CMP0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CMP0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMP0` writer - Compare 0"] +pub struct CMP0_W<'a> { + w: &'a mut W, +} +impl<'a> CMP0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u16 & 0x01) << 8); + self.w + } +} +#[doc = "Field `OVF` reader - Overflow"] +pub struct OVF_R(crate::FieldReader); +impl OVF_R { + pub(crate) fn new(bits: bool) -> Self { + OVF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVF_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVF` writer - Overflow"] +pub struct OVF_W<'a> { + w: &'a mut W, +} +impl<'a> OVF_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Periodic Interval 0"] + #[inline(always)] + pub fn per0(&self) -> PER0_R { + PER0_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Periodic Interval 1"] + #[inline(always)] + pub fn per1(&self) -> PER1_R { + PER1_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Periodic Interval 2"] + #[inline(always)] + pub fn per2(&self) -> PER2_R { + PER2_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Periodic Interval 3"] + #[inline(always)] + pub fn per3(&self) -> PER3_R { + PER3_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Periodic Interval 4"] + #[inline(always)] + pub fn per4(&self) -> PER4_R { + PER4_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Periodic Interval 5"] + #[inline(always)] + pub fn per5(&self) -> PER5_R { + PER5_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Periodic Interval 6"] + #[inline(always)] + pub fn per6(&self) -> PER6_R { + PER6_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Periodic Interval 7"] + #[inline(always)] + pub fn per7(&self) -> PER7_R { + PER7_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Compare 0"] + #[inline(always)] + pub fn cmp0(&self) -> CMP0_R { + CMP0_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 15 - Overflow"] + #[inline(always)] + pub fn ovf(&self) -> OVF_R { + OVF_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Periodic Interval 0"] + #[inline(always)] + pub fn per0(&mut self) -> PER0_W { + PER0_W { w: self } + } + #[doc = "Bit 1 - Periodic Interval 1"] + #[inline(always)] + pub fn per1(&mut self) -> PER1_W { + PER1_W { w: self } + } + #[doc = "Bit 2 - Periodic Interval 2"] + #[inline(always)] + pub fn per2(&mut self) -> PER2_W { + PER2_W { w: self } + } + #[doc = "Bit 3 - Periodic Interval 3"] + #[inline(always)] + pub fn per3(&mut self) -> PER3_W { + PER3_W { w: self } + } + #[doc = "Bit 4 - Periodic Interval 4"] + #[inline(always)] + pub fn per4(&mut self) -> PER4_W { + PER4_W { w: self } + } + #[doc = "Bit 5 - Periodic Interval 5"] + #[inline(always)] + pub fn per5(&mut self) -> PER5_W { + PER5_W { w: self } + } + #[doc = "Bit 6 - Periodic Interval 6"] + #[inline(always)] + pub fn per6(&mut self) -> PER6_W { + PER6_W { w: self } + } + #[doc = "Bit 7 - Periodic Interval 7"] + #[inline(always)] + pub fn per7(&mut self) -> PER7_W { + PER7_W { w: self } + } + #[doc = "Bit 8 - Compare 0"] + #[inline(always)] + pub fn cmp0(&mut self) -> CMP0_W { + CMP0_W { w: self } + } + #[doc = "Bit 15 - Overflow"] + #[inline(always)] + pub fn ovf(&mut self) -> OVF_W { + OVF_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE0 Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"] +pub struct INTFLAG_SPEC; +impl crate::RegisterSpec for INTFLAG_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [intflag::R](R) reader structure"] +impl crate::Readable for INTFLAG_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"] +impl crate::Writable for INTFLAG_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTFLAG to value 0"] +impl crate::Resettable for INTFLAG_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode0/syncbusy.rs b/src/rtc/mode0/syncbusy.rs new file mode 100644 index 0000000..5daf1a3 --- /dev/null +++ b/src/rtc/mode0/syncbusy.rs @@ -0,0 +1,147 @@ +#[doc = "Register `SYNCBUSY` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Field `SWRST` reader - Software Reset Busy"] +pub struct SWRST_R(crate::FieldReader); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENABLE` reader - Enable Bit Busy"] +pub struct ENABLE_R(crate::FieldReader); +impl ENABLE_R { + pub(crate) fn new(bits: bool) -> Self { + ENABLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENABLE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FREQCORR` reader - FREQCORR Register Busy"] +pub struct FREQCORR_R(crate::FieldReader); +impl FREQCORR_R { + pub(crate) fn new(bits: bool) -> Self { + FREQCORR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FREQCORR_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COUNT` reader - COUNT Register Busy"] +pub struct COUNT_R(crate::FieldReader); +impl COUNT_R { + pub(crate) fn new(bits: bool) -> Self { + COUNT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COUNT_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COMP0` reader - COMP 0 Register Busy"] +pub struct COMP0_R(crate::FieldReader); +impl COMP0_R { + pub(crate) fn new(bits: bool) -> Self { + COMP0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COMP0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COUNTSYNC` reader - Count Read Synchronization Enable Bit Busy"] +pub struct COUNTSYNC_R(crate::FieldReader); +impl COUNTSYNC_R { + pub(crate) fn new(bits: bool) -> Self { + COUNTSYNC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COUNTSYNC_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bit 0 - Software Reset Busy"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Enable Bit Busy"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - FREQCORR Register Busy"] + #[inline(always)] + pub fn freqcorr(&self) -> FREQCORR_R { + FREQCORR_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - COUNT Register Busy"] + #[inline(always)] + pub fn count(&self) -> COUNT_R { + COUNT_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 5 - COMP 0 Register Busy"] + #[inline(always)] + pub fn comp0(&self) -> COMP0_R { + COMP0_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 15 - Count Read Synchronization Enable Bit Busy"] + #[inline(always)] + pub fn countsync(&self) -> COUNTSYNC_R { + COUNTSYNC_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +#[doc = "MODE0 Synchronization Busy Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] +pub struct SYNCBUSY_SPEC; +impl crate::RegisterSpec for SYNCBUSY_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] +impl crate::Readable for SYNCBUSY_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets SYNCBUSY to value 0"] +impl crate::Resettable for SYNCBUSY_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode1.rs b/src/rtc/mode1.rs new file mode 100644 index 0000000..9ea1bc1 --- /dev/null +++ b/src/rtc/mode1.rs @@ -0,0 +1,44 @@ +#[doc = "CTRLA register accessor: an alias for `Reg`"] +pub type CTRLA = crate::Reg; +#[doc = "MODE1 Control A"] +pub mod ctrla; +#[doc = "EVCTRL register accessor: an alias for `Reg`"] +pub type EVCTRL = crate::Reg; +#[doc = "MODE1 Event Control"] +pub mod evctrl; +#[doc = "INTENCLR register accessor: an alias for `Reg`"] +pub type INTENCLR = crate::Reg; +#[doc = "MODE1 Interrupt Enable Clear"] +pub mod intenclr; +#[doc = "INTENSET register accessor: an alias for `Reg`"] +pub type INTENSET = crate::Reg; +#[doc = "MODE1 Interrupt Enable Set"] +pub mod intenset; +#[doc = "INTFLAG register accessor: an alias for `Reg`"] +pub type INTFLAG = crate::Reg; +#[doc = "MODE1 Interrupt Flag Status and Clear"] +pub mod intflag; +#[doc = "DBGCTRL register accessor: an alias for `Reg`"] +pub type DBGCTRL = crate::Reg; +#[doc = "Debug Control"] +pub mod dbgctrl; +#[doc = "SYNCBUSY register accessor: an alias for `Reg`"] +pub type SYNCBUSY = crate::Reg; +#[doc = "MODE1 Synchronization Busy Status"] +pub mod syncbusy; +#[doc = "FREQCORR register accessor: an alias for `Reg`"] +pub type FREQCORR = crate::Reg; +#[doc = "Frequency Correction"] +pub mod freqcorr; +#[doc = "COUNT register accessor: an alias for `Reg`"] +pub type COUNT = crate::Reg; +#[doc = "MODE1 Counter Value"] +pub mod count; +#[doc = "PER register accessor: an alias for `Reg`"] +pub type PER = crate::Reg; +#[doc = "MODE1 Counter Period"] +pub mod per; +#[doc = "COMP register accessor: an alias for `Reg`"] +pub type COMP = crate::Reg; +#[doc = "MODE1 Compare n Value"] +pub mod comp; diff --git a/src/rtc/mode1/comp.rs b/src/rtc/mode1/comp.rs new file mode 100644 index 0000000..4db385d --- /dev/null +++ b/src/rtc/mode1/comp.rs @@ -0,0 +1,103 @@ +#[doc = "Register `COMP[%s]` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `COMP[%s]` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `COMP` reader - Compare Value"] +pub struct COMP_R(crate::FieldReader); +impl COMP_R { + pub(crate) fn new(bits: u16) -> Self { + COMP_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COMP_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COMP` writer - Compare Value"] +pub struct COMP_W<'a> { + w: &'a mut W, +} +impl<'a> COMP_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u16 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - Compare Value"] + #[inline(always)] + pub fn comp(&self) -> COMP_R { + COMP_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - Compare Value"] + #[inline(always)] + pub fn comp(&mut self) -> COMP_W { + COMP_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE1 Compare n Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp](index.html) module"] +pub struct COMP_SPEC; +impl crate::RegisterSpec for COMP_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [comp::R](R) reader structure"] +impl crate::Readable for COMP_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [comp::W](W) writer structure"] +impl crate::Writable for COMP_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets COMP[%s] +to value 0"] +impl crate::Resettable for COMP_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode1/count.rs b/src/rtc/mode1/count.rs new file mode 100644 index 0000000..6c9a35d --- /dev/null +++ b/src/rtc/mode1/count.rs @@ -0,0 +1,102 @@ +#[doc = "Register `COUNT` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `COUNT` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `COUNT` reader - Counter Value"] +pub struct COUNT_R(crate::FieldReader); +impl COUNT_R { + pub(crate) fn new(bits: u16) -> Self { + COUNT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COUNT_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COUNT` writer - Counter Value"] +pub struct COUNT_W<'a> { + w: &'a mut W, +} +impl<'a> COUNT_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u16 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - Counter Value"] + #[inline(always)] + pub fn count(&self) -> COUNT_R { + COUNT_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - Counter Value"] + #[inline(always)] + pub fn count(&mut self) -> COUNT_W { + COUNT_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE1 Counter Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [count](index.html) module"] +pub struct COUNT_SPEC; +impl crate::RegisterSpec for COUNT_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [count::R](R) reader structure"] +impl crate::Readable for COUNT_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [count::W](W) writer structure"] +impl crate::Writable for COUNT_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets COUNT to value 0"] +impl crate::Resettable for COUNT_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode1/ctrla.rs b/src/rtc/mode1/ctrla.rs new file mode 100644 index 0000000..3e37a61 --- /dev/null +++ b/src/rtc/mode1/ctrla.rs @@ -0,0 +1,517 @@ +#[doc = "Register `CTRLA` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `CTRLA` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `SWRST` reader - Software Reset"] +pub struct SWRST_R(crate::FieldReader); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SWRST` writer - Software Reset"] +pub struct SWRST_W<'a> { + w: &'a mut W, +} +impl<'a> SWRST_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `ENABLE` reader - Enable"] +pub struct ENABLE_R(crate::FieldReader); +impl ENABLE_R { + pub(crate) fn new(bits: bool) -> Self { + ENABLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENABLE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENABLE` writer - Enable"] +pub struct ENABLE_W<'a> { + w: &'a mut W, +} +impl<'a> ENABLE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Operating Mode\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum MODE_A { + #[doc = "0: Mode 0: 32-bit Counter"] + COUNT32 = 0, + #[doc = "1: Mode 1: 16-bit Counter"] + COUNT16 = 1, + #[doc = "2: Mode 2: Clock/Calendar"] + CLOCK = 2, +} +impl From for u8 { + #[inline(always)] + fn from(variant: MODE_A) -> Self { + variant as _ + } +} +#[doc = "Field `MODE` reader - Operating Mode"] +pub struct MODE_R(crate::FieldReader); +impl MODE_R { + pub(crate) fn new(bits: u8) -> Self { + MODE_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option { + match self.bits { + 0 => Some(MODE_A::COUNT32), + 1 => Some(MODE_A::COUNT16), + 2 => Some(MODE_A::CLOCK), + _ => None, + } + } + #[doc = "Checks if the value of the field is `COUNT32`"] + #[inline(always)] + pub fn is_count32(&self) -> bool { + **self == MODE_A::COUNT32 + } + #[doc = "Checks if the value of the field is `COUNT16`"] + #[inline(always)] + pub fn is_count16(&self) -> bool { + **self == MODE_A::COUNT16 + } + #[doc = "Checks if the value of the field is `CLOCK`"] + #[inline(always)] + pub fn is_clock(&self) -> bool { + **self == MODE_A::CLOCK + } +} +impl core::ops::Deref for MODE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MODE` writer - Operating Mode"] +pub struct MODE_W<'a> { + w: &'a mut W, +} +impl<'a> MODE_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: MODE_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "Mode 0: 32-bit Counter"] + #[inline(always)] + pub fn count32(self) -> &'a mut W { + self.variant(MODE_A::COUNT32) + } + #[doc = "Mode 1: 16-bit Counter"] + #[inline(always)] + pub fn count16(self) -> &'a mut W { + self.variant(MODE_A::COUNT16) + } + #[doc = "Mode 2: Clock/Calendar"] + #[inline(always)] + pub fn clock(self) -> &'a mut W { + self.variant(MODE_A::CLOCK) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u16 & 0x03) << 2); + self.w + } +} +#[doc = "Prescaler\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum PRESCALER_A { + #[doc = "0: CLK_RTC_CNT = GCLK_RTC/1"] + OFF = 0, + #[doc = "1: CLK_RTC_CNT = GCLK_RTC/1"] + DIV1 = 1, + #[doc = "2: CLK_RTC_CNT = GCLK_RTC/2"] + DIV2 = 2, + #[doc = "3: CLK_RTC_CNT = GCLK_RTC/4"] + DIV4 = 3, + #[doc = "4: CLK_RTC_CNT = GCLK_RTC/8"] + DIV8 = 4, + #[doc = "5: CLK_RTC_CNT = GCLK_RTC/16"] + DIV16 = 5, + #[doc = "6: CLK_RTC_CNT = GCLK_RTC/32"] + DIV32 = 6, + #[doc = "7: CLK_RTC_CNT = GCLK_RTC/64"] + DIV64 = 7, + #[doc = "8: CLK_RTC_CNT = GCLK_RTC/128"] + DIV128 = 8, + #[doc = "9: CLK_RTC_CNT = GCLK_RTC/256"] + DIV256 = 9, + #[doc = "10: CLK_RTC_CNT = GCLK_RTC/512"] + DIV512 = 10, + #[doc = "11: CLK_RTC_CNT = GCLK_RTC/1024"] + DIV1024 = 11, +} +impl From for u8 { + #[inline(always)] + fn from(variant: PRESCALER_A) -> Self { + variant as _ + } +} +#[doc = "Field `PRESCALER` reader - Prescaler"] +pub struct PRESCALER_R(crate::FieldReader); +impl PRESCALER_R { + pub(crate) fn new(bits: u8) -> Self { + PRESCALER_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option { + match self.bits { + 0 => Some(PRESCALER_A::OFF), + 1 => Some(PRESCALER_A::DIV1), + 2 => Some(PRESCALER_A::DIV2), + 3 => Some(PRESCALER_A::DIV4), + 4 => Some(PRESCALER_A::DIV8), + 5 => Some(PRESCALER_A::DIV16), + 6 => Some(PRESCALER_A::DIV32), + 7 => Some(PRESCALER_A::DIV64), + 8 => Some(PRESCALER_A::DIV128), + 9 => Some(PRESCALER_A::DIV256), + 10 => Some(PRESCALER_A::DIV512), + 11 => Some(PRESCALER_A::DIV1024), + _ => None, + } + } + #[doc = "Checks if the value of the field is `OFF`"] + #[inline(always)] + pub fn is_off(&self) -> bool { + **self == PRESCALER_A::OFF + } + #[doc = "Checks if the value of the field is `DIV1`"] + #[inline(always)] + pub fn is_div1(&self) -> bool { + **self == PRESCALER_A::DIV1 + } + #[doc = "Checks if the value of the field is `DIV2`"] + #[inline(always)] + pub fn is_div2(&self) -> bool { + **self == PRESCALER_A::DIV2 + } + #[doc = "Checks if the value of the field is `DIV4`"] + #[inline(always)] + pub fn is_div4(&self) -> bool { + **self == PRESCALER_A::DIV4 + } + #[doc = "Checks if the value of the field is `DIV8`"] + #[inline(always)] + pub fn is_div8(&self) -> bool { + **self == PRESCALER_A::DIV8 + } + #[doc = "Checks if the value of the field is `DIV16`"] + #[inline(always)] + pub fn is_div16(&self) -> bool { + **self == PRESCALER_A::DIV16 + } + #[doc = "Checks if the value of the field is `DIV32`"] + #[inline(always)] + pub fn is_div32(&self) -> bool { + **self == PRESCALER_A::DIV32 + } + #[doc = "Checks if the value of the field is `DIV64`"] + #[inline(always)] + pub fn is_div64(&self) -> bool { + **self == PRESCALER_A::DIV64 + } + #[doc = "Checks if the value of the field is `DIV128`"] + #[inline(always)] + pub fn is_div128(&self) -> bool { + **self == PRESCALER_A::DIV128 + } + #[doc = "Checks if the value of the field is `DIV256`"] + #[inline(always)] + pub fn is_div256(&self) -> bool { + **self == PRESCALER_A::DIV256 + } + #[doc = "Checks if the value of the field is `DIV512`"] + #[inline(always)] + pub fn is_div512(&self) -> bool { + **self == PRESCALER_A::DIV512 + } + #[doc = "Checks if the value of the field is `DIV1024`"] + #[inline(always)] + pub fn is_div1024(&self) -> bool { + **self == PRESCALER_A::DIV1024 + } +} +impl core::ops::Deref for PRESCALER_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PRESCALER` writer - Prescaler"] +pub struct PRESCALER_W<'a> { + w: &'a mut W, +} +impl<'a> PRESCALER_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: PRESCALER_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/1"] + #[inline(always)] + pub fn off(self) -> &'a mut W { + self.variant(PRESCALER_A::OFF) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/1"] + #[inline(always)] + pub fn div1(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV1) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/2"] + #[inline(always)] + pub fn div2(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV2) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/4"] + #[inline(always)] + pub fn div4(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV4) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/8"] + #[inline(always)] + pub fn div8(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV8) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/16"] + #[inline(always)] + pub fn div16(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV16) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/32"] + #[inline(always)] + pub fn div32(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV32) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/64"] + #[inline(always)] + pub fn div64(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV64) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/128"] + #[inline(always)] + pub fn div128(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV128) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/256"] + #[inline(always)] + pub fn div256(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV256) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/512"] + #[inline(always)] + pub fn div512(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV512) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/1024"] + #[inline(always)] + pub fn div1024(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV1024) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u16 & 0x0f) << 8); + self.w + } +} +#[doc = "Field `COUNTSYNC` reader - Count Read Synchronization Enable"] +pub struct COUNTSYNC_R(crate::FieldReader); +impl COUNTSYNC_R { + pub(crate) fn new(bits: bool) -> Self { + COUNTSYNC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COUNTSYNC_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COUNTSYNC` writer - Count Read Synchronization Enable"] +pub struct COUNTSYNC_W<'a> { + w: &'a mut W, +} +impl<'a> COUNTSYNC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Enable"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bits 2:3 - Operating Mode"] + #[inline(always)] + pub fn mode(&self) -> MODE_R { + MODE_R::new(((self.bits >> 2) & 0x03) as u8) + } + #[doc = "Bits 8:11 - Prescaler"] + #[inline(always)] + pub fn prescaler(&self) -> PRESCALER_R { + PRESCALER_R::new(((self.bits >> 8) & 0x0f) as u8) + } + #[doc = "Bit 15 - Count Read Synchronization Enable"] + #[inline(always)] + pub fn countsync(&self) -> COUNTSYNC_R { + COUNTSYNC_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&mut self) -> SWRST_W { + SWRST_W { w: self } + } + #[doc = "Bit 1 - Enable"] + #[inline(always)] + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W { w: self } + } + #[doc = "Bits 2:3 - Operating Mode"] + #[inline(always)] + pub fn mode(&mut self) -> MODE_W { + MODE_W { w: self } + } + #[doc = "Bits 8:11 - Prescaler"] + #[inline(always)] + pub fn prescaler(&mut self) -> PRESCALER_W { + PRESCALER_W { w: self } + } + #[doc = "Bit 15 - Count Read Synchronization Enable"] + #[inline(always)] + pub fn countsync(&mut self) -> COUNTSYNC_W { + COUNTSYNC_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE1 Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"] +pub struct CTRLA_SPEC; +impl crate::RegisterSpec for CTRLA_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [ctrla::R](R) reader structure"] +impl crate::Readable for CTRLA_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"] +impl crate::Writable for CTRLA_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CTRLA to value 0"] +impl crate::Resettable for CTRLA_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode1/dbgctrl.rs b/src/rtc/mode1/dbgctrl.rs new file mode 100644 index 0000000..950156c --- /dev/null +++ b/src/rtc/mode1/dbgctrl.rs @@ -0,0 +1,112 @@ +#[doc = "Register `DBGCTRL` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `DBGCTRL` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `DBGRUN` reader - Run During Debug"] +pub struct DBGRUN_R(crate::FieldReader); +impl DBGRUN_R { + pub(crate) fn new(bits: bool) -> Self { + DBGRUN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DBGRUN_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DBGRUN` writer - Run During Debug"] +pub struct DBGRUN_W<'a> { + w: &'a mut W, +} +impl<'a> DBGRUN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +impl R { + #[doc = "Bit 0 - Run During Debug"] + #[inline(always)] + pub fn dbgrun(&self) -> DBGRUN_R { + DBGRUN_R::new((self.bits & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Run During Debug"] + #[inline(always)] + pub fn dbgrun(&mut self) -> DBGRUN_W { + DBGRUN_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Debug Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgctrl](index.html) module"] +pub struct DBGCTRL_SPEC; +impl crate::RegisterSpec for DBGCTRL_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [dbgctrl::R](R) reader structure"] +impl crate::Readable for DBGCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [dbgctrl::W](W) writer structure"] +impl crate::Writable for DBGCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets DBGCTRL to value 0"] +impl crate::Resettable for DBGCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode1/evctrl.rs b/src/rtc/mode1/evctrl.rs new file mode 100644 index 0000000..d739abe --- /dev/null +++ b/src/rtc/mode1/evctrl.rs @@ -0,0 +1,572 @@ +#[doc = "Register `EVCTRL` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `EVCTRL` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PEREO0` reader - Periodic Interval 0 Event Output Enable"] +pub struct PEREO0_R(crate::FieldReader); +impl PEREO0_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO0` writer - Periodic Interval 0 Event Output Enable"] +pub struct PEREO0_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); + self.w + } +} +#[doc = "Field `PEREO1` reader - Periodic Interval 1 Event Output Enable"] +pub struct PEREO1_R(crate::FieldReader); +impl PEREO1_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO1` writer - Periodic Interval 1 Event Output Enable"] +pub struct PEREO1_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); + self.w + } +} +#[doc = "Field `PEREO2` reader - Periodic Interval 2 Event Output Enable"] +pub struct PEREO2_R(crate::FieldReader); +impl PEREO2_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO2_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO2` writer - Periodic Interval 2 Event Output Enable"] +pub struct PEREO2_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); + self.w + } +} +#[doc = "Field `PEREO3` reader - Periodic Interval 3 Event Output Enable"] +pub struct PEREO3_R(crate::FieldReader); +impl PEREO3_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO3_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO3` writer - Periodic Interval 3 Event Output Enable"] +pub struct PEREO3_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PEREO4` reader - Periodic Interval 4 Event Output Enable"] +pub struct PEREO4_R(crate::FieldReader); +impl PEREO4_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO4_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO4` writer - Periodic Interval 4 Event Output Enable"] +pub struct PEREO4_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); + self.w + } +} +#[doc = "Field `PEREO5` reader - Periodic Interval 5 Event Output Enable"] +pub struct PEREO5_R(crate::FieldReader); +impl PEREO5_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO5_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO5` writer - Periodic Interval 5 Event Output Enable"] +pub struct PEREO5_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); + self.w + } +} +#[doc = "Field `PEREO6` reader - Periodic Interval 6 Event Output Enable"] +pub struct PEREO6_R(crate::FieldReader); +impl PEREO6_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO6_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO6` writer - Periodic Interval 6 Event Output Enable"] +pub struct PEREO6_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); + self.w + } +} +#[doc = "Field `PEREO7` reader - Periodic Interval 7 Event Output Enable"] +pub struct PEREO7_R(crate::FieldReader); +impl PEREO7_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO7_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO7` writer - Periodic Interval 7 Event Output Enable"] +pub struct PEREO7_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); + self.w + } +} +#[doc = "Field `CMPEO0` reader - Compare 0 Event Output Enable"] +pub struct CMPEO0_R(crate::FieldReader); +impl CMPEO0_R { + pub(crate) fn new(bits: bool) -> Self { + CMPEO0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CMPEO0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMPEO0` writer - Compare 0 Event Output Enable"] +pub struct CMPEO0_W<'a> { + w: &'a mut W, +} +impl<'a> CMPEO0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); + self.w + } +} +#[doc = "Field `CMPEO1` reader - Compare 1 Event Output Enable"] +pub struct CMPEO1_R(crate::FieldReader); +impl CMPEO1_R { + pub(crate) fn new(bits: bool) -> Self { + CMPEO1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CMPEO1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMPEO1` writer - Compare 1 Event Output Enable"] +pub struct CMPEO1_W<'a> { + w: &'a mut W, +} +impl<'a> CMPEO1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); + self.w + } +} +#[doc = "Field `OVFEO` reader - Overflow Event Output Enable"] +pub struct OVFEO_R(crate::FieldReader); +impl OVFEO_R { + pub(crate) fn new(bits: bool) -> Self { + OVFEO_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVFEO_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVFEO` writer - Overflow Event Output Enable"] +pub struct OVFEO_W<'a> { + w: &'a mut W, +} +impl<'a> OVFEO_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Periodic Interval 0 Event Output Enable"] + #[inline(always)] + pub fn pereo0(&self) -> PEREO0_R { + PEREO0_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Periodic Interval 1 Event Output Enable"] + #[inline(always)] + pub fn pereo1(&self) -> PEREO1_R { + PEREO1_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Periodic Interval 2 Event Output Enable"] + #[inline(always)] + pub fn pereo2(&self) -> PEREO2_R { + PEREO2_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Periodic Interval 3 Event Output Enable"] + #[inline(always)] + pub fn pereo3(&self) -> PEREO3_R { + PEREO3_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Periodic Interval 4 Event Output Enable"] + #[inline(always)] + pub fn pereo4(&self) -> PEREO4_R { + PEREO4_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Periodic Interval 5 Event Output Enable"] + #[inline(always)] + pub fn pereo5(&self) -> PEREO5_R { + PEREO5_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Periodic Interval 6 Event Output Enable"] + #[inline(always)] + pub fn pereo6(&self) -> PEREO6_R { + PEREO6_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Periodic Interval 7 Event Output Enable"] + #[inline(always)] + pub fn pereo7(&self) -> PEREO7_R { + PEREO7_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Compare 0 Event Output Enable"] + #[inline(always)] + pub fn cmpeo0(&self) -> CMPEO0_R { + CMPEO0_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 9 - Compare 1 Event Output Enable"] + #[inline(always)] + pub fn cmpeo1(&self) -> CMPEO1_R { + CMPEO1_R::new(((self.bits >> 9) & 0x01) != 0) + } + #[doc = "Bit 15 - Overflow Event Output Enable"] + #[inline(always)] + pub fn ovfeo(&self) -> OVFEO_R { + OVFEO_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Periodic Interval 0 Event Output Enable"] + #[inline(always)] + pub fn pereo0(&mut self) -> PEREO0_W { + PEREO0_W { w: self } + } + #[doc = "Bit 1 - Periodic Interval 1 Event Output Enable"] + #[inline(always)] + pub fn pereo1(&mut self) -> PEREO1_W { + PEREO1_W { w: self } + } + #[doc = "Bit 2 - Periodic Interval 2 Event Output Enable"] + #[inline(always)] + pub fn pereo2(&mut self) -> PEREO2_W { + PEREO2_W { w: self } + } + #[doc = "Bit 3 - Periodic Interval 3 Event Output Enable"] + #[inline(always)] + pub fn pereo3(&mut self) -> PEREO3_W { + PEREO3_W { w: self } + } + #[doc = "Bit 4 - Periodic Interval 4 Event Output Enable"] + #[inline(always)] + pub fn pereo4(&mut self) -> PEREO4_W { + PEREO4_W { w: self } + } + #[doc = "Bit 5 - Periodic Interval 5 Event Output Enable"] + #[inline(always)] + pub fn pereo5(&mut self) -> PEREO5_W { + PEREO5_W { w: self } + } + #[doc = "Bit 6 - Periodic Interval 6 Event Output Enable"] + #[inline(always)] + pub fn pereo6(&mut self) -> PEREO6_W { + PEREO6_W { w: self } + } + #[doc = "Bit 7 - Periodic Interval 7 Event Output Enable"] + #[inline(always)] + pub fn pereo7(&mut self) -> PEREO7_W { + PEREO7_W { w: self } + } + #[doc = "Bit 8 - Compare 0 Event Output Enable"] + #[inline(always)] + pub fn cmpeo0(&mut self) -> CMPEO0_W { + CMPEO0_W { w: self } + } + #[doc = "Bit 9 - Compare 1 Event Output Enable"] + #[inline(always)] + pub fn cmpeo1(&mut self) -> CMPEO1_W { + CMPEO1_W { w: self } + } + #[doc = "Bit 15 - Overflow Event Output Enable"] + #[inline(always)] + pub fn ovfeo(&mut self) -> OVFEO_W { + OVFEO_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE1 Event Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [evctrl](index.html) module"] +pub struct EVCTRL_SPEC; +impl crate::RegisterSpec for EVCTRL_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [evctrl::R](R) reader structure"] +impl crate::Readable for EVCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [evctrl::W](W) writer structure"] +impl crate::Writable for EVCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets EVCTRL to value 0"] +impl crate::Resettable for EVCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode1/freqcorr.rs b/src/rtc/mode1/freqcorr.rs new file mode 100644 index 0000000..595f68c --- /dev/null +++ b/src/rtc/mode1/freqcorr.rs @@ -0,0 +1,148 @@ +#[doc = "Register `FREQCORR` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `FREQCORR` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `VALUE` reader - Correction Value"] +pub struct VALUE_R(crate::FieldReader); +impl VALUE_R { + pub(crate) fn new(bits: u8) -> Self { + VALUE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for VALUE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `VALUE` writer - Correction Value"] +pub struct VALUE_W<'a> { + w: &'a mut W, +} +impl<'a> VALUE_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x7f) | (value as u8 & 0x7f); + self.w + } +} +#[doc = "Field `SIGN` reader - Correction Sign"] +pub struct SIGN_R(crate::FieldReader); +impl SIGN_R { + pub(crate) fn new(bits: bool) -> Self { + SIGN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SIGN_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SIGN` writer - Correction Sign"] +pub struct SIGN_W<'a> { + w: &'a mut W, +} +impl<'a> SIGN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7); + self.w + } +} +impl R { + #[doc = "Bits 0:6 - Correction Value"] + #[inline(always)] + pub fn value(&self) -> VALUE_R { + VALUE_R::new((self.bits & 0x7f) as u8) + } + #[doc = "Bit 7 - Correction Sign"] + #[inline(always)] + pub fn sign(&self) -> SIGN_R { + SIGN_R::new(((self.bits >> 7) & 0x01) != 0) + } +} +impl W { + #[doc = "Bits 0:6 - Correction Value"] + #[inline(always)] + pub fn value(&mut self) -> VALUE_W { + VALUE_W { w: self } + } + #[doc = "Bit 7 - Correction Sign"] + #[inline(always)] + pub fn sign(&mut self) -> SIGN_W { + SIGN_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Frequency Correction\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [freqcorr](index.html) module"] +pub struct FREQCORR_SPEC; +impl crate::RegisterSpec for FREQCORR_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [freqcorr::R](R) reader structure"] +impl crate::Readable for FREQCORR_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [freqcorr::W](W) writer structure"] +impl crate::Writable for FREQCORR_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets FREQCORR to value 0"] +impl crate::Resettable for FREQCORR_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode1/intenclr.rs b/src/rtc/mode1/intenclr.rs new file mode 100644 index 0000000..1e1affb --- /dev/null +++ b/src/rtc/mode1/intenclr.rs @@ -0,0 +1,572 @@ +#[doc = "Register `INTENCLR` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `INTENCLR` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PER0` reader - Periodic Interval 0 Interrupt Enable"] +pub struct PER0_R(crate::FieldReader); +impl PER0_R { + pub(crate) fn new(bits: bool) -> Self { + PER0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER0` writer - Periodic Interval 0 Interrupt Enable"] +pub struct PER0_W<'a> { + w: &'a mut W, +} +impl<'a> PER0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `PER1` reader - Periodic Interval 1 Interrupt Enable"] +pub struct PER1_R(crate::FieldReader); +impl PER1_R { + pub(crate) fn new(bits: bool) -> Self { + PER1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER1` writer - Periodic Interval 1 Interrupt Enable"] +pub struct PER1_W<'a> { + w: &'a mut W, +} +impl<'a> PER1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Field `PER2` reader - Periodic Interval 2 Interrupt Enable"] +pub struct PER2_R(crate::FieldReader); +impl PER2_R { + pub(crate) fn new(bits: bool) -> Self { + PER2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER2_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER2` writer - Periodic Interval 2 Interrupt Enable"] +pub struct PER2_W<'a> { + w: &'a mut W, +} +impl<'a> PER2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2); + self.w + } +} +#[doc = "Field `PER3` reader - Periodic Interval 3 Interrupt Enable"] +pub struct PER3_R(crate::FieldReader); +impl PER3_R { + pub(crate) fn new(bits: bool) -> Self { + PER3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER3_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER3` writer - Periodic Interval 3 Interrupt Enable"] +pub struct PER3_W<'a> { + w: &'a mut W, +} +impl<'a> PER3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PER4` reader - Periodic Interval 4 Interrupt Enable"] +pub struct PER4_R(crate::FieldReader); +impl PER4_R { + pub(crate) fn new(bits: bool) -> Self { + PER4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER4_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER4` writer - Periodic Interval 4 Interrupt Enable"] +pub struct PER4_W<'a> { + w: &'a mut W, +} +impl<'a> PER4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4); + self.w + } +} +#[doc = "Field `PER5` reader - Periodic Interval 5 Interrupt Enable"] +pub struct PER5_R(crate::FieldReader); +impl PER5_R { + pub(crate) fn new(bits: bool) -> Self { + PER5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER5_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER5` writer - Periodic Interval 5 Interrupt Enable"] +pub struct PER5_W<'a> { + w: &'a mut W, +} +impl<'a> PER5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5); + self.w + } +} +#[doc = "Field `PER6` reader - Periodic Interval 6 Interrupt Enable"] +pub struct PER6_R(crate::FieldReader); +impl PER6_R { + pub(crate) fn new(bits: bool) -> Self { + PER6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER6_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER6` writer - Periodic Interval 6 Interrupt Enable"] +pub struct PER6_W<'a> { + w: &'a mut W, +} +impl<'a> PER6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6); + self.w + } +} +#[doc = "Field `PER7` reader - Periodic Interval 7 Interrupt Enable"] +pub struct PER7_R(crate::FieldReader); +impl PER7_R { + pub(crate) fn new(bits: bool) -> Self { + PER7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER7_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER7` writer - Periodic Interval 7 Interrupt Enable"] +pub struct PER7_W<'a> { + w: &'a mut W, +} +impl<'a> PER7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); + self.w + } +} +#[doc = "Field `CMP0` reader - Compare 0 Interrupt Enable"] +pub struct CMP0_R(crate::FieldReader); +impl CMP0_R { + pub(crate) fn new(bits: bool) -> Self { + CMP0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CMP0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMP0` writer - Compare 0 Interrupt Enable"] +pub struct CMP0_W<'a> { + w: &'a mut W, +} +impl<'a> CMP0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u16 & 0x01) << 8); + self.w + } +} +#[doc = "Field `CMP1` reader - Compare 1 Interrupt Enable"] +pub struct CMP1_R(crate::FieldReader); +impl CMP1_R { + pub(crate) fn new(bits: bool) -> Self { + CMP1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CMP1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMP1` writer - Compare 1 Interrupt Enable"] +pub struct CMP1_W<'a> { + w: &'a mut W, +} +impl<'a> CMP1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u16 & 0x01) << 9); + self.w + } +} +#[doc = "Field `OVF` reader - Overflow Interrupt Enable"] +pub struct OVF_R(crate::FieldReader); +impl OVF_R { + pub(crate) fn new(bits: bool) -> Self { + OVF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVF_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVF` writer - Overflow Interrupt Enable"] +pub struct OVF_W<'a> { + w: &'a mut W, +} +impl<'a> OVF_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"] + #[inline(always)] + pub fn per0(&self) -> PER0_R { + PER0_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"] + #[inline(always)] + pub fn per1(&self) -> PER1_R { + PER1_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"] + #[inline(always)] + pub fn per2(&self) -> PER2_R { + PER2_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"] + #[inline(always)] + pub fn per3(&self) -> PER3_R { + PER3_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"] + #[inline(always)] + pub fn per4(&self) -> PER4_R { + PER4_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"] + #[inline(always)] + pub fn per5(&self) -> PER5_R { + PER5_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"] + #[inline(always)] + pub fn per6(&self) -> PER6_R { + PER6_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"] + #[inline(always)] + pub fn per7(&self) -> PER7_R { + PER7_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Compare 0 Interrupt Enable"] + #[inline(always)] + pub fn cmp0(&self) -> CMP0_R { + CMP0_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 9 - Compare 1 Interrupt Enable"] + #[inline(always)] + pub fn cmp1(&self) -> CMP1_R { + CMP1_R::new(((self.bits >> 9) & 0x01) != 0) + } + #[doc = "Bit 15 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ovf(&self) -> OVF_R { + OVF_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"] + #[inline(always)] + pub fn per0(&mut self) -> PER0_W { + PER0_W { w: self } + } + #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"] + #[inline(always)] + pub fn per1(&mut self) -> PER1_W { + PER1_W { w: self } + } + #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"] + #[inline(always)] + pub fn per2(&mut self) -> PER2_W { + PER2_W { w: self } + } + #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"] + #[inline(always)] + pub fn per3(&mut self) -> PER3_W { + PER3_W { w: self } + } + #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"] + #[inline(always)] + pub fn per4(&mut self) -> PER4_W { + PER4_W { w: self } + } + #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"] + #[inline(always)] + pub fn per5(&mut self) -> PER5_W { + PER5_W { w: self } + } + #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"] + #[inline(always)] + pub fn per6(&mut self) -> PER6_W { + PER6_W { w: self } + } + #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"] + #[inline(always)] + pub fn per7(&mut self) -> PER7_W { + PER7_W { w: self } + } + #[doc = "Bit 8 - Compare 0 Interrupt Enable"] + #[inline(always)] + pub fn cmp0(&mut self) -> CMP0_W { + CMP0_W { w: self } + } + #[doc = "Bit 9 - Compare 1 Interrupt Enable"] + #[inline(always)] + pub fn cmp1(&mut self) -> CMP1_W { + CMP1_W { w: self } + } + #[doc = "Bit 15 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ovf(&mut self) -> OVF_W { + OVF_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE1 Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"] +pub struct INTENCLR_SPEC; +impl crate::RegisterSpec for INTENCLR_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [intenclr::R](R) reader structure"] +impl crate::Readable for INTENCLR_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"] +impl crate::Writable for INTENCLR_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTENCLR to value 0"] +impl crate::Resettable for INTENCLR_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode1/intenset.rs b/src/rtc/mode1/intenset.rs new file mode 100644 index 0000000..8955110 --- /dev/null +++ b/src/rtc/mode1/intenset.rs @@ -0,0 +1,572 @@ +#[doc = "Register `INTENSET` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `INTENSET` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PER0` reader - Periodic Interval 0 Interrupt Enable"] +pub struct PER0_R(crate::FieldReader); +impl PER0_R { + pub(crate) fn new(bits: bool) -> Self { + PER0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER0` writer - Periodic Interval 0 Interrupt Enable"] +pub struct PER0_W<'a> { + w: &'a mut W, +} +impl<'a> PER0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `PER1` reader - Periodic Interval 1 Interrupt Enable"] +pub struct PER1_R(crate::FieldReader); +impl PER1_R { + pub(crate) fn new(bits: bool) -> Self { + PER1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER1` writer - Periodic Interval 1 Interrupt Enable"] +pub struct PER1_W<'a> { + w: &'a mut W, +} +impl<'a> PER1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Field `PER2` reader - Periodic Interval 2 Interrupt Enable"] +pub struct PER2_R(crate::FieldReader); +impl PER2_R { + pub(crate) fn new(bits: bool) -> Self { + PER2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER2_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER2` writer - Periodic Interval 2 Interrupt Enable"] +pub struct PER2_W<'a> { + w: &'a mut W, +} +impl<'a> PER2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2); + self.w + } +} +#[doc = "Field `PER3` reader - Periodic Interval 3 Interrupt Enable"] +pub struct PER3_R(crate::FieldReader); +impl PER3_R { + pub(crate) fn new(bits: bool) -> Self { + PER3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER3_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER3` writer - Periodic Interval 3 Interrupt Enable"] +pub struct PER3_W<'a> { + w: &'a mut W, +} +impl<'a> PER3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PER4` reader - Periodic Interval 4 Interrupt Enable"] +pub struct PER4_R(crate::FieldReader); +impl PER4_R { + pub(crate) fn new(bits: bool) -> Self { + PER4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER4_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER4` writer - Periodic Interval 4 Interrupt Enable"] +pub struct PER4_W<'a> { + w: &'a mut W, +} +impl<'a> PER4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4); + self.w + } +} +#[doc = "Field `PER5` reader - Periodic Interval 5 Interrupt Enable"] +pub struct PER5_R(crate::FieldReader); +impl PER5_R { + pub(crate) fn new(bits: bool) -> Self { + PER5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER5_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER5` writer - Periodic Interval 5 Interrupt Enable"] +pub struct PER5_W<'a> { + w: &'a mut W, +} +impl<'a> PER5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5); + self.w + } +} +#[doc = "Field `PER6` reader - Periodic Interval 6 Interrupt Enable"] +pub struct PER6_R(crate::FieldReader); +impl PER6_R { + pub(crate) fn new(bits: bool) -> Self { + PER6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER6_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER6` writer - Periodic Interval 6 Interrupt Enable"] +pub struct PER6_W<'a> { + w: &'a mut W, +} +impl<'a> PER6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6); + self.w + } +} +#[doc = "Field `PER7` reader - Periodic Interval 7 Interrupt Enable"] +pub struct PER7_R(crate::FieldReader); +impl PER7_R { + pub(crate) fn new(bits: bool) -> Self { + PER7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER7_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER7` writer - Periodic Interval 7 Interrupt Enable"] +pub struct PER7_W<'a> { + w: &'a mut W, +} +impl<'a> PER7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); + self.w + } +} +#[doc = "Field `CMP0` reader - Compare 0 Interrupt Enable"] +pub struct CMP0_R(crate::FieldReader); +impl CMP0_R { + pub(crate) fn new(bits: bool) -> Self { + CMP0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CMP0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMP0` writer - Compare 0 Interrupt Enable"] +pub struct CMP0_W<'a> { + w: &'a mut W, +} +impl<'a> CMP0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u16 & 0x01) << 8); + self.w + } +} +#[doc = "Field `CMP1` reader - Compare 1 Interrupt Enable"] +pub struct CMP1_R(crate::FieldReader); +impl CMP1_R { + pub(crate) fn new(bits: bool) -> Self { + CMP1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CMP1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMP1` writer - Compare 1 Interrupt Enable"] +pub struct CMP1_W<'a> { + w: &'a mut W, +} +impl<'a> CMP1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u16 & 0x01) << 9); + self.w + } +} +#[doc = "Field `OVF` reader - Overflow Interrupt Enable"] +pub struct OVF_R(crate::FieldReader); +impl OVF_R { + pub(crate) fn new(bits: bool) -> Self { + OVF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVF_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVF` writer - Overflow Interrupt Enable"] +pub struct OVF_W<'a> { + w: &'a mut W, +} +impl<'a> OVF_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"] + #[inline(always)] + pub fn per0(&self) -> PER0_R { + PER0_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"] + #[inline(always)] + pub fn per1(&self) -> PER1_R { + PER1_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"] + #[inline(always)] + pub fn per2(&self) -> PER2_R { + PER2_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"] + #[inline(always)] + pub fn per3(&self) -> PER3_R { + PER3_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"] + #[inline(always)] + pub fn per4(&self) -> PER4_R { + PER4_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"] + #[inline(always)] + pub fn per5(&self) -> PER5_R { + PER5_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"] + #[inline(always)] + pub fn per6(&self) -> PER6_R { + PER6_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"] + #[inline(always)] + pub fn per7(&self) -> PER7_R { + PER7_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Compare 0 Interrupt Enable"] + #[inline(always)] + pub fn cmp0(&self) -> CMP0_R { + CMP0_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 9 - Compare 1 Interrupt Enable"] + #[inline(always)] + pub fn cmp1(&self) -> CMP1_R { + CMP1_R::new(((self.bits >> 9) & 0x01) != 0) + } + #[doc = "Bit 15 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ovf(&self) -> OVF_R { + OVF_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"] + #[inline(always)] + pub fn per0(&mut self) -> PER0_W { + PER0_W { w: self } + } + #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"] + #[inline(always)] + pub fn per1(&mut self) -> PER1_W { + PER1_W { w: self } + } + #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"] + #[inline(always)] + pub fn per2(&mut self) -> PER2_W { + PER2_W { w: self } + } + #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"] + #[inline(always)] + pub fn per3(&mut self) -> PER3_W { + PER3_W { w: self } + } + #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"] + #[inline(always)] + pub fn per4(&mut self) -> PER4_W { + PER4_W { w: self } + } + #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"] + #[inline(always)] + pub fn per5(&mut self) -> PER5_W { + PER5_W { w: self } + } + #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"] + #[inline(always)] + pub fn per6(&mut self) -> PER6_W { + PER6_W { w: self } + } + #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"] + #[inline(always)] + pub fn per7(&mut self) -> PER7_W { + PER7_W { w: self } + } + #[doc = "Bit 8 - Compare 0 Interrupt Enable"] + #[inline(always)] + pub fn cmp0(&mut self) -> CMP0_W { + CMP0_W { w: self } + } + #[doc = "Bit 9 - Compare 1 Interrupt Enable"] + #[inline(always)] + pub fn cmp1(&mut self) -> CMP1_W { + CMP1_W { w: self } + } + #[doc = "Bit 15 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ovf(&mut self) -> OVF_W { + OVF_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE1 Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"] +pub struct INTENSET_SPEC; +impl crate::RegisterSpec for INTENSET_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [intenset::R](R) reader structure"] +impl crate::Readable for INTENSET_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"] +impl crate::Writable for INTENSET_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTENSET to value 0"] +impl crate::Resettable for INTENSET_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode1/intflag.rs b/src/rtc/mode1/intflag.rs new file mode 100644 index 0000000..bb11175 --- /dev/null +++ b/src/rtc/mode1/intflag.rs @@ -0,0 +1,572 @@ +#[doc = "Register `INTFLAG` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `INTFLAG` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PER0` reader - Periodic Interval 0"] +pub struct PER0_R(crate::FieldReader); +impl PER0_R { + pub(crate) fn new(bits: bool) -> Self { + PER0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER0` writer - Periodic Interval 0"] +pub struct PER0_W<'a> { + w: &'a mut W, +} +impl<'a> PER0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `PER1` reader - Periodic Interval 1"] +pub struct PER1_R(crate::FieldReader); +impl PER1_R { + pub(crate) fn new(bits: bool) -> Self { + PER1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER1` writer - Periodic Interval 1"] +pub struct PER1_W<'a> { + w: &'a mut W, +} +impl<'a> PER1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Field `PER2` reader - Periodic Interval 2"] +pub struct PER2_R(crate::FieldReader); +impl PER2_R { + pub(crate) fn new(bits: bool) -> Self { + PER2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER2_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER2` writer - Periodic Interval 2"] +pub struct PER2_W<'a> { + w: &'a mut W, +} +impl<'a> PER2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2); + self.w + } +} +#[doc = "Field `PER3` reader - Periodic Interval 3"] +pub struct PER3_R(crate::FieldReader); +impl PER3_R { + pub(crate) fn new(bits: bool) -> Self { + PER3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER3_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER3` writer - Periodic Interval 3"] +pub struct PER3_W<'a> { + w: &'a mut W, +} +impl<'a> PER3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PER4` reader - Periodic Interval 4"] +pub struct PER4_R(crate::FieldReader); +impl PER4_R { + pub(crate) fn new(bits: bool) -> Self { + PER4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER4_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER4` writer - Periodic Interval 4"] +pub struct PER4_W<'a> { + w: &'a mut W, +} +impl<'a> PER4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4); + self.w + } +} +#[doc = "Field `PER5` reader - Periodic Interval 5"] +pub struct PER5_R(crate::FieldReader); +impl PER5_R { + pub(crate) fn new(bits: bool) -> Self { + PER5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER5_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER5` writer - Periodic Interval 5"] +pub struct PER5_W<'a> { + w: &'a mut W, +} +impl<'a> PER5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5); + self.w + } +} +#[doc = "Field `PER6` reader - Periodic Interval 6"] +pub struct PER6_R(crate::FieldReader); +impl PER6_R { + pub(crate) fn new(bits: bool) -> Self { + PER6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER6_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER6` writer - Periodic Interval 6"] +pub struct PER6_W<'a> { + w: &'a mut W, +} +impl<'a> PER6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6); + self.w + } +} +#[doc = "Field `PER7` reader - Periodic Interval 7"] +pub struct PER7_R(crate::FieldReader); +impl PER7_R { + pub(crate) fn new(bits: bool) -> Self { + PER7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER7_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER7` writer - Periodic Interval 7"] +pub struct PER7_W<'a> { + w: &'a mut W, +} +impl<'a> PER7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); + self.w + } +} +#[doc = "Field `CMP0` reader - Compare 0"] +pub struct CMP0_R(crate::FieldReader); +impl CMP0_R { + pub(crate) fn new(bits: bool) -> Self { + CMP0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CMP0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMP0` writer - Compare 0"] +pub struct CMP0_W<'a> { + w: &'a mut W, +} +impl<'a> CMP0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u16 & 0x01) << 8); + self.w + } +} +#[doc = "Field `CMP1` reader - Compare 1"] +pub struct CMP1_R(crate::FieldReader); +impl CMP1_R { + pub(crate) fn new(bits: bool) -> Self { + CMP1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CMP1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMP1` writer - Compare 1"] +pub struct CMP1_W<'a> { + w: &'a mut W, +} +impl<'a> CMP1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u16 & 0x01) << 9); + self.w + } +} +#[doc = "Field `OVF` reader - Overflow"] +pub struct OVF_R(crate::FieldReader); +impl OVF_R { + pub(crate) fn new(bits: bool) -> Self { + OVF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVF_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVF` writer - Overflow"] +pub struct OVF_W<'a> { + w: &'a mut W, +} +impl<'a> OVF_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Periodic Interval 0"] + #[inline(always)] + pub fn per0(&self) -> PER0_R { + PER0_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Periodic Interval 1"] + #[inline(always)] + pub fn per1(&self) -> PER1_R { + PER1_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Periodic Interval 2"] + #[inline(always)] + pub fn per2(&self) -> PER2_R { + PER2_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Periodic Interval 3"] + #[inline(always)] + pub fn per3(&self) -> PER3_R { + PER3_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Periodic Interval 4"] + #[inline(always)] + pub fn per4(&self) -> PER4_R { + PER4_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Periodic Interval 5"] + #[inline(always)] + pub fn per5(&self) -> PER5_R { + PER5_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Periodic Interval 6"] + #[inline(always)] + pub fn per6(&self) -> PER6_R { + PER6_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Periodic Interval 7"] + #[inline(always)] + pub fn per7(&self) -> PER7_R { + PER7_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Compare 0"] + #[inline(always)] + pub fn cmp0(&self) -> CMP0_R { + CMP0_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 9 - Compare 1"] + #[inline(always)] + pub fn cmp1(&self) -> CMP1_R { + CMP1_R::new(((self.bits >> 9) & 0x01) != 0) + } + #[doc = "Bit 15 - Overflow"] + #[inline(always)] + pub fn ovf(&self) -> OVF_R { + OVF_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Periodic Interval 0"] + #[inline(always)] + pub fn per0(&mut self) -> PER0_W { + PER0_W { w: self } + } + #[doc = "Bit 1 - Periodic Interval 1"] + #[inline(always)] + pub fn per1(&mut self) -> PER1_W { + PER1_W { w: self } + } + #[doc = "Bit 2 - Periodic Interval 2"] + #[inline(always)] + pub fn per2(&mut self) -> PER2_W { + PER2_W { w: self } + } + #[doc = "Bit 3 - Periodic Interval 3"] + #[inline(always)] + pub fn per3(&mut self) -> PER3_W { + PER3_W { w: self } + } + #[doc = "Bit 4 - Periodic Interval 4"] + #[inline(always)] + pub fn per4(&mut self) -> PER4_W { + PER4_W { w: self } + } + #[doc = "Bit 5 - Periodic Interval 5"] + #[inline(always)] + pub fn per5(&mut self) -> PER5_W { + PER5_W { w: self } + } + #[doc = "Bit 6 - Periodic Interval 6"] + #[inline(always)] + pub fn per6(&mut self) -> PER6_W { + PER6_W { w: self } + } + #[doc = "Bit 7 - Periodic Interval 7"] + #[inline(always)] + pub fn per7(&mut self) -> PER7_W { + PER7_W { w: self } + } + #[doc = "Bit 8 - Compare 0"] + #[inline(always)] + pub fn cmp0(&mut self) -> CMP0_W { + CMP0_W { w: self } + } + #[doc = "Bit 9 - Compare 1"] + #[inline(always)] + pub fn cmp1(&mut self) -> CMP1_W { + CMP1_W { w: self } + } + #[doc = "Bit 15 - Overflow"] + #[inline(always)] + pub fn ovf(&mut self) -> OVF_W { + OVF_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE1 Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"] +pub struct INTFLAG_SPEC; +impl crate::RegisterSpec for INTFLAG_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [intflag::R](R) reader structure"] +impl crate::Readable for INTFLAG_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"] +impl crate::Writable for INTFLAG_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTFLAG to value 0"] +impl crate::Resettable for INTFLAG_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode1/per.rs b/src/rtc/mode1/per.rs new file mode 100644 index 0000000..a83b4d8 --- /dev/null +++ b/src/rtc/mode1/per.rs @@ -0,0 +1,102 @@ +#[doc = "Register `PER` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `PER` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PER` reader - Counter Period"] +pub struct PER_R(crate::FieldReader); +impl PER_R { + pub(crate) fn new(bits: u16) -> Self { + PER_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER` writer - Counter Period"] +pub struct PER_W<'a> { + w: &'a mut W, +} +impl<'a> PER_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u16 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - Counter Period"] + #[inline(always)] + pub fn per(&self) -> PER_R { + PER_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - Counter Period"] + #[inline(always)] + pub fn per(&mut self) -> PER_W { + PER_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE1 Counter Period\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [per](index.html) module"] +pub struct PER_SPEC; +impl crate::RegisterSpec for PER_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [per::R](R) reader structure"] +impl crate::Readable for PER_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [per::W](W) writer structure"] +impl crate::Writable for PER_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets PER to value 0"] +impl crate::Resettable for PER_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode1/syncbusy.rs b/src/rtc/mode1/syncbusy.rs new file mode 100644 index 0000000..ec786fb --- /dev/null +++ b/src/rtc/mode1/syncbusy.rs @@ -0,0 +1,185 @@ +#[doc = "Register `SYNCBUSY` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Field `SWRST` reader - Software Reset Bit Busy"] +pub struct SWRST_R(crate::FieldReader); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENABLE` reader - Enable Bit Busy"] +pub struct ENABLE_R(crate::FieldReader); +impl ENABLE_R { + pub(crate) fn new(bits: bool) -> Self { + ENABLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENABLE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FREQCORR` reader - FREQCORR Register Busy"] +pub struct FREQCORR_R(crate::FieldReader); +impl FREQCORR_R { + pub(crate) fn new(bits: bool) -> Self { + FREQCORR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FREQCORR_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COUNT` reader - COUNT Register Busy"] +pub struct COUNT_R(crate::FieldReader); +impl COUNT_R { + pub(crate) fn new(bits: bool) -> Self { + COUNT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COUNT_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER` reader - PER Register Busy"] +pub struct PER_R(crate::FieldReader); +impl PER_R { + pub(crate) fn new(bits: bool) -> Self { + PER_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COMP0` reader - COMP 0 Register Busy"] +pub struct COMP0_R(crate::FieldReader); +impl COMP0_R { + pub(crate) fn new(bits: bool) -> Self { + COMP0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COMP0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COMP1` reader - COMP 1 Register Busy"] +pub struct COMP1_R(crate::FieldReader); +impl COMP1_R { + pub(crate) fn new(bits: bool) -> Self { + COMP1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COMP1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COUNTSYNC` reader - Count Read Synchronization Enable Bit Busy"] +pub struct COUNTSYNC_R(crate::FieldReader); +impl COUNTSYNC_R { + pub(crate) fn new(bits: bool) -> Self { + COUNTSYNC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COUNTSYNC_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bit 0 - Software Reset Bit Busy"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Enable Bit Busy"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - FREQCORR Register Busy"] + #[inline(always)] + pub fn freqcorr(&self) -> FREQCORR_R { + FREQCORR_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - COUNT Register Busy"] + #[inline(always)] + pub fn count(&self) -> COUNT_R { + COUNT_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - PER Register Busy"] + #[inline(always)] + pub fn per(&self) -> PER_R { + PER_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - COMP 0 Register Busy"] + #[inline(always)] + pub fn comp0(&self) -> COMP0_R { + COMP0_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - COMP 1 Register Busy"] + #[inline(always)] + pub fn comp1(&self) -> COMP1_R { + COMP1_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 15 - Count Read Synchronization Enable Bit Busy"] + #[inline(always)] + pub fn countsync(&self) -> COUNTSYNC_R { + COUNTSYNC_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +#[doc = "MODE1 Synchronization Busy Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] +pub struct SYNCBUSY_SPEC; +impl crate::RegisterSpec for SYNCBUSY_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] +impl crate::Readable for SYNCBUSY_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets SYNCBUSY to value 0"] +impl crate::Resettable for SYNCBUSY_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode2.rs b/src/rtc/mode2.rs new file mode 100644 index 0000000..b0bc13e --- /dev/null +++ b/src/rtc/mode2.rs @@ -0,0 +1,44 @@ +#[doc = "CTRLA register accessor: an alias for `Reg`"] +pub type CTRLA = crate::Reg; +#[doc = "MODE2 Control A"] +pub mod ctrla; +#[doc = "EVCTRL register accessor: an alias for `Reg`"] +pub type EVCTRL = crate::Reg; +#[doc = "MODE2 Event Control"] +pub mod evctrl; +#[doc = "INTENCLR register accessor: an alias for `Reg`"] +pub type INTENCLR = crate::Reg; +#[doc = "MODE2 Interrupt Enable Clear"] +pub mod intenclr; +#[doc = "INTENSET register accessor: an alias for `Reg`"] +pub type INTENSET = crate::Reg; +#[doc = "MODE2 Interrupt Enable Set"] +pub mod intenset; +#[doc = "INTFLAG register accessor: an alias for `Reg`"] +pub type INTFLAG = crate::Reg; +#[doc = "MODE2 Interrupt Flag Status and Clear"] +pub mod intflag; +#[doc = "DBGCTRL register accessor: an alias for `Reg`"] +pub type DBGCTRL = crate::Reg; +#[doc = "Debug Control"] +pub mod dbgctrl; +#[doc = "SYNCBUSY register accessor: an alias for `Reg`"] +pub type SYNCBUSY = crate::Reg; +#[doc = "MODE2 Synchronization Busy Status"] +pub mod syncbusy; +#[doc = "FREQCORR register accessor: an alias for `Reg`"] +pub type FREQCORR = crate::Reg; +#[doc = "Frequency Correction"] +pub mod freqcorr; +#[doc = "CLOCK register accessor: an alias for `Reg`"] +pub type CLOCK = crate::Reg; +#[doc = "MODE2 Clock Value"] +pub mod clock; +#[doc = "ALARM register accessor: an alias for `Reg`"] +pub type ALARM = crate::Reg; +#[doc = "MODE2_ALARM Alarm n Value"] +pub mod alarm; +#[doc = "MASK register accessor: an alias for `Reg`"] +pub type MASK = crate::Reg; +#[doc = "MODE2_ALARM Alarm n Mask"] +pub mod mask; diff --git a/src/rtc/mode2/alarm.rs b/src/rtc/mode2/alarm.rs new file mode 100644 index 0000000..25d330d --- /dev/null +++ b/src/rtc/mode2/alarm.rs @@ -0,0 +1,331 @@ +#[doc = "Register `ALARM` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `ALARM` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `SECOND` reader - Second"] +pub struct SECOND_R(crate::FieldReader); +impl SECOND_R { + pub(crate) fn new(bits: u8) -> Self { + SECOND_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SECOND_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SECOND` writer - Second"] +pub struct SECOND_W<'a> { + w: &'a mut W, +} +impl<'a> SECOND_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f); + self.w + } +} +#[doc = "Field `MINUTE` reader - Minute"] +pub struct MINUTE_R(crate::FieldReader); +impl MINUTE_R { + pub(crate) fn new(bits: u8) -> Self { + MINUTE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for MINUTE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MINUTE` writer - Minute"] +pub struct MINUTE_W<'a> { + w: &'a mut W, +} +impl<'a> MINUTE_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x3f << 6)) | ((value as u32 & 0x3f) << 6); + self.w + } +} +#[doc = "Hour\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum HOUR_A { + #[doc = "0: Morning hour"] + AM = 0, + #[doc = "16: Afternoon hour"] + PM = 16, +} +impl From for u8 { + #[inline(always)] + fn from(variant: HOUR_A) -> Self { + variant as _ + } +} +#[doc = "Field `HOUR` reader - Hour"] +pub struct HOUR_R(crate::FieldReader); +impl HOUR_R { + pub(crate) fn new(bits: u8) -> Self { + HOUR_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option { + match self.bits { + 0 => Some(HOUR_A::AM), + 16 => Some(HOUR_A::PM), + _ => None, + } + } + #[doc = "Checks if the value of the field is `AM`"] + #[inline(always)] + pub fn is_am(&self) -> bool { + **self == HOUR_A::AM + } + #[doc = "Checks if the value of the field is `PM`"] + #[inline(always)] + pub fn is_pm(&self) -> bool { + **self == HOUR_A::PM + } +} +impl core::ops::Deref for HOUR_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `HOUR` writer - Hour"] +pub struct HOUR_W<'a> { + w: &'a mut W, +} +impl<'a> HOUR_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: HOUR_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "Morning hour"] + #[inline(always)] + pub fn am(self) -> &'a mut W { + self.variant(HOUR_A::AM) + } + #[doc = "Afternoon hour"] + #[inline(always)] + pub fn pm(self) -> &'a mut W { + self.variant(HOUR_A::PM) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x1f << 12)) | ((value as u32 & 0x1f) << 12); + self.w + } +} +#[doc = "Field `DAY` reader - Day"] +pub struct DAY_R(crate::FieldReader); +impl DAY_R { + pub(crate) fn new(bits: u8) -> Self { + DAY_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DAY_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DAY` writer - Day"] +pub struct DAY_W<'a> { + w: &'a mut W, +} +impl<'a> DAY_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x1f << 17)) | ((value as u32 & 0x1f) << 17); + self.w + } +} +#[doc = "Field `MONTH` reader - Month"] +pub struct MONTH_R(crate::FieldReader); +impl MONTH_R { + pub(crate) fn new(bits: u8) -> Self { + MONTH_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for MONTH_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MONTH` writer - Month"] +pub struct MONTH_W<'a> { + w: &'a mut W, +} +impl<'a> MONTH_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 22)) | ((value as u32 & 0x0f) << 22); + self.w + } +} +#[doc = "Field `YEAR` reader - Year"] +pub struct YEAR_R(crate::FieldReader); +impl YEAR_R { + pub(crate) fn new(bits: u8) -> Self { + YEAR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for YEAR_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `YEAR` writer - Year"] +pub struct YEAR_W<'a> { + w: &'a mut W, +} +impl<'a> YEAR_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x3f << 26)) | ((value as u32 & 0x3f) << 26); + self.w + } +} +impl R { + #[doc = "Bits 0:5 - Second"] + #[inline(always)] + pub fn second(&self) -> SECOND_R { + SECOND_R::new((self.bits & 0x3f) as u8) + } + #[doc = "Bits 6:11 - Minute"] + #[inline(always)] + pub fn minute(&self) -> MINUTE_R { + MINUTE_R::new(((self.bits >> 6) & 0x3f) as u8) + } + #[doc = "Bits 12:16 - Hour"] + #[inline(always)] + pub fn hour(&self) -> HOUR_R { + HOUR_R::new(((self.bits >> 12) & 0x1f) as u8) + } + #[doc = "Bits 17:21 - Day"] + #[inline(always)] + pub fn day(&self) -> DAY_R { + DAY_R::new(((self.bits >> 17) & 0x1f) as u8) + } + #[doc = "Bits 22:25 - Month"] + #[inline(always)] + pub fn month(&self) -> MONTH_R { + MONTH_R::new(((self.bits >> 22) & 0x0f) as u8) + } + #[doc = "Bits 26:31 - Year"] + #[inline(always)] + pub fn year(&self) -> YEAR_R { + YEAR_R::new(((self.bits >> 26) & 0x3f) as u8) + } +} +impl W { + #[doc = "Bits 0:5 - Second"] + #[inline(always)] + pub fn second(&mut self) -> SECOND_W { + SECOND_W { w: self } + } + #[doc = "Bits 6:11 - Minute"] + #[inline(always)] + pub fn minute(&mut self) -> MINUTE_W { + MINUTE_W { w: self } + } + #[doc = "Bits 12:16 - Hour"] + #[inline(always)] + pub fn hour(&mut self) -> HOUR_W { + HOUR_W { w: self } + } + #[doc = "Bits 17:21 - Day"] + #[inline(always)] + pub fn day(&mut self) -> DAY_W { + DAY_W { w: self } + } + #[doc = "Bits 22:25 - Month"] + #[inline(always)] + pub fn month(&mut self) -> MONTH_W { + MONTH_W { w: self } + } + #[doc = "Bits 26:31 - Year"] + #[inline(always)] + pub fn year(&mut self) -> YEAR_W { + YEAR_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE2_ALARM Alarm n Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [alarm](index.html) module"] +pub struct ALARM_SPEC; +impl crate::RegisterSpec for ALARM_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [alarm::R](R) reader structure"] +impl crate::Readable for ALARM_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [alarm::W](W) writer structure"] +impl crate::Writable for ALARM_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets ALARM to value 0"] +impl crate::Resettable for ALARM_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode2/clock.rs b/src/rtc/mode2/clock.rs new file mode 100644 index 0000000..73917a3 --- /dev/null +++ b/src/rtc/mode2/clock.rs @@ -0,0 +1,331 @@ +#[doc = "Register `CLOCK` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `CLOCK` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `SECOND` reader - Second"] +pub struct SECOND_R(crate::FieldReader); +impl SECOND_R { + pub(crate) fn new(bits: u8) -> Self { + SECOND_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SECOND_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SECOND` writer - Second"] +pub struct SECOND_W<'a> { + w: &'a mut W, +} +impl<'a> SECOND_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f); + self.w + } +} +#[doc = "Field `MINUTE` reader - Minute"] +pub struct MINUTE_R(crate::FieldReader); +impl MINUTE_R { + pub(crate) fn new(bits: u8) -> Self { + MINUTE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for MINUTE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MINUTE` writer - Minute"] +pub struct MINUTE_W<'a> { + w: &'a mut W, +} +impl<'a> MINUTE_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x3f << 6)) | ((value as u32 & 0x3f) << 6); + self.w + } +} +#[doc = "Hour\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum HOUR_A { + #[doc = "0: AM when CLKREP in 12-hour"] + AM = 0, + #[doc = "16: PM when CLKREP in 12-hour"] + PM = 16, +} +impl From for u8 { + #[inline(always)] + fn from(variant: HOUR_A) -> Self { + variant as _ + } +} +#[doc = "Field `HOUR` reader - Hour"] +pub struct HOUR_R(crate::FieldReader); +impl HOUR_R { + pub(crate) fn new(bits: u8) -> Self { + HOUR_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option { + match self.bits { + 0 => Some(HOUR_A::AM), + 16 => Some(HOUR_A::PM), + _ => None, + } + } + #[doc = "Checks if the value of the field is `AM`"] + #[inline(always)] + pub fn is_am(&self) -> bool { + **self == HOUR_A::AM + } + #[doc = "Checks if the value of the field is `PM`"] + #[inline(always)] + pub fn is_pm(&self) -> bool { + **self == HOUR_A::PM + } +} +impl core::ops::Deref for HOUR_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `HOUR` writer - Hour"] +pub struct HOUR_W<'a> { + w: &'a mut W, +} +impl<'a> HOUR_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: HOUR_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "AM when CLKREP in 12-hour"] + #[inline(always)] + pub fn am(self) -> &'a mut W { + self.variant(HOUR_A::AM) + } + #[doc = "PM when CLKREP in 12-hour"] + #[inline(always)] + pub fn pm(self) -> &'a mut W { + self.variant(HOUR_A::PM) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x1f << 12)) | ((value as u32 & 0x1f) << 12); + self.w + } +} +#[doc = "Field `DAY` reader - Day"] +pub struct DAY_R(crate::FieldReader); +impl DAY_R { + pub(crate) fn new(bits: u8) -> Self { + DAY_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DAY_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DAY` writer - Day"] +pub struct DAY_W<'a> { + w: &'a mut W, +} +impl<'a> DAY_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x1f << 17)) | ((value as u32 & 0x1f) << 17); + self.w + } +} +#[doc = "Field `MONTH` reader - Month"] +pub struct MONTH_R(crate::FieldReader); +impl MONTH_R { + pub(crate) fn new(bits: u8) -> Self { + MONTH_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for MONTH_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MONTH` writer - Month"] +pub struct MONTH_W<'a> { + w: &'a mut W, +} +impl<'a> MONTH_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 22)) | ((value as u32 & 0x0f) << 22); + self.w + } +} +#[doc = "Field `YEAR` reader - Year"] +pub struct YEAR_R(crate::FieldReader); +impl YEAR_R { + pub(crate) fn new(bits: u8) -> Self { + YEAR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for YEAR_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `YEAR` writer - Year"] +pub struct YEAR_W<'a> { + w: &'a mut W, +} +impl<'a> YEAR_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x3f << 26)) | ((value as u32 & 0x3f) << 26); + self.w + } +} +impl R { + #[doc = "Bits 0:5 - Second"] + #[inline(always)] + pub fn second(&self) -> SECOND_R { + SECOND_R::new((self.bits & 0x3f) as u8) + } + #[doc = "Bits 6:11 - Minute"] + #[inline(always)] + pub fn minute(&self) -> MINUTE_R { + MINUTE_R::new(((self.bits >> 6) & 0x3f) as u8) + } + #[doc = "Bits 12:16 - Hour"] + #[inline(always)] + pub fn hour(&self) -> HOUR_R { + HOUR_R::new(((self.bits >> 12) & 0x1f) as u8) + } + #[doc = "Bits 17:21 - Day"] + #[inline(always)] + pub fn day(&self) -> DAY_R { + DAY_R::new(((self.bits >> 17) & 0x1f) as u8) + } + #[doc = "Bits 22:25 - Month"] + #[inline(always)] + pub fn month(&self) -> MONTH_R { + MONTH_R::new(((self.bits >> 22) & 0x0f) as u8) + } + #[doc = "Bits 26:31 - Year"] + #[inline(always)] + pub fn year(&self) -> YEAR_R { + YEAR_R::new(((self.bits >> 26) & 0x3f) as u8) + } +} +impl W { + #[doc = "Bits 0:5 - Second"] + #[inline(always)] + pub fn second(&mut self) -> SECOND_W { + SECOND_W { w: self } + } + #[doc = "Bits 6:11 - Minute"] + #[inline(always)] + pub fn minute(&mut self) -> MINUTE_W { + MINUTE_W { w: self } + } + #[doc = "Bits 12:16 - Hour"] + #[inline(always)] + pub fn hour(&mut self) -> HOUR_W { + HOUR_W { w: self } + } + #[doc = "Bits 17:21 - Day"] + #[inline(always)] + pub fn day(&mut self) -> DAY_W { + DAY_W { w: self } + } + #[doc = "Bits 22:25 - Month"] + #[inline(always)] + pub fn month(&mut self) -> MONTH_W { + MONTH_W { w: self } + } + #[doc = "Bits 26:31 - Year"] + #[inline(always)] + pub fn year(&mut self) -> YEAR_W { + YEAR_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE2 Clock Value\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clock](index.html) module"] +pub struct CLOCK_SPEC; +impl crate::RegisterSpec for CLOCK_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [clock::R](R) reader structure"] +impl crate::Readable for CLOCK_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [clock::W](W) writer structure"] +impl crate::Writable for CLOCK_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CLOCK to value 0"] +impl crate::Resettable for CLOCK_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode2/ctrla.rs b/src/rtc/mode2/ctrla.rs new file mode 100644 index 0000000..2f1557a --- /dev/null +++ b/src/rtc/mode2/ctrla.rs @@ -0,0 +1,609 @@ +#[doc = "Register `CTRLA` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `CTRLA` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `SWRST` reader - Software Reset"] +pub struct SWRST_R(crate::FieldReader); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SWRST` writer - Software Reset"] +pub struct SWRST_W<'a> { + w: &'a mut W, +} +impl<'a> SWRST_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `ENABLE` reader - Enable"] +pub struct ENABLE_R(crate::FieldReader); +impl ENABLE_R { + pub(crate) fn new(bits: bool) -> Self { + ENABLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENABLE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENABLE` writer - Enable"] +pub struct ENABLE_W<'a> { + w: &'a mut W, +} +impl<'a> ENABLE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Operating Mode\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum MODE_A { + #[doc = "0: Mode 0: 32-bit Counter"] + COUNT32 = 0, + #[doc = "1: Mode 1: 16-bit Counter"] + COUNT16 = 1, + #[doc = "2: Mode 2: Clock/Calendar"] + CLOCK = 2, +} +impl From for u8 { + #[inline(always)] + fn from(variant: MODE_A) -> Self { + variant as _ + } +} +#[doc = "Field `MODE` reader - Operating Mode"] +pub struct MODE_R(crate::FieldReader); +impl MODE_R { + pub(crate) fn new(bits: u8) -> Self { + MODE_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option { + match self.bits { + 0 => Some(MODE_A::COUNT32), + 1 => Some(MODE_A::COUNT16), + 2 => Some(MODE_A::CLOCK), + _ => None, + } + } + #[doc = "Checks if the value of the field is `COUNT32`"] + #[inline(always)] + pub fn is_count32(&self) -> bool { + **self == MODE_A::COUNT32 + } + #[doc = "Checks if the value of the field is `COUNT16`"] + #[inline(always)] + pub fn is_count16(&self) -> bool { + **self == MODE_A::COUNT16 + } + #[doc = "Checks if the value of the field is `CLOCK`"] + #[inline(always)] + pub fn is_clock(&self) -> bool { + **self == MODE_A::CLOCK + } +} +impl core::ops::Deref for MODE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MODE` writer - Operating Mode"] +pub struct MODE_W<'a> { + w: &'a mut W, +} +impl<'a> MODE_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: MODE_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "Mode 0: 32-bit Counter"] + #[inline(always)] + pub fn count32(self) -> &'a mut W { + self.variant(MODE_A::COUNT32) + } + #[doc = "Mode 1: 16-bit Counter"] + #[inline(always)] + pub fn count16(self) -> &'a mut W { + self.variant(MODE_A::COUNT16) + } + #[doc = "Mode 2: Clock/Calendar"] + #[inline(always)] + pub fn clock(self) -> &'a mut W { + self.variant(MODE_A::CLOCK) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u16 & 0x03) << 2); + self.w + } +} +#[doc = "Field `CLKREP` reader - Clock Representation"] +pub struct CLKREP_R(crate::FieldReader); +impl CLKREP_R { + pub(crate) fn new(bits: bool) -> Self { + CLKREP_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CLKREP_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CLKREP` writer - Clock Representation"] +pub struct CLKREP_W<'a> { + w: &'a mut W, +} +impl<'a> CLKREP_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6); + self.w + } +} +#[doc = "Field `MATCHCLR` reader - Clear on Match"] +pub struct MATCHCLR_R(crate::FieldReader); +impl MATCHCLR_R { + pub(crate) fn new(bits: bool) -> Self { + MATCHCLR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for MATCHCLR_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MATCHCLR` writer - Clear on Match"] +pub struct MATCHCLR_W<'a> { + w: &'a mut W, +} +impl<'a> MATCHCLR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); + self.w + } +} +#[doc = "Prescaler\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum PRESCALER_A { + #[doc = "0: CLK_RTC_CNT = GCLK_RTC/1"] + OFF = 0, + #[doc = "1: CLK_RTC_CNT = GCLK_RTC/1"] + DIV1 = 1, + #[doc = "2: CLK_RTC_CNT = GCLK_RTC/2"] + DIV2 = 2, + #[doc = "3: CLK_RTC_CNT = GCLK_RTC/4"] + DIV4 = 3, + #[doc = "4: CLK_RTC_CNT = GCLK_RTC/8"] + DIV8 = 4, + #[doc = "5: CLK_RTC_CNT = GCLK_RTC/16"] + DIV16 = 5, + #[doc = "6: CLK_RTC_CNT = GCLK_RTC/32"] + DIV32 = 6, + #[doc = "7: CLK_RTC_CNT = GCLK_RTC/64"] + DIV64 = 7, + #[doc = "8: CLK_RTC_CNT = GCLK_RTC/128"] + DIV128 = 8, + #[doc = "9: CLK_RTC_CNT = GCLK_RTC/256"] + DIV256 = 9, + #[doc = "10: CLK_RTC_CNT = GCLK_RTC/512"] + DIV512 = 10, + #[doc = "11: CLK_RTC_CNT = GCLK_RTC/1024"] + DIV1024 = 11, +} +impl From for u8 { + #[inline(always)] + fn from(variant: PRESCALER_A) -> Self { + variant as _ + } +} +#[doc = "Field `PRESCALER` reader - Prescaler"] +pub struct PRESCALER_R(crate::FieldReader); +impl PRESCALER_R { + pub(crate) fn new(bits: u8) -> Self { + PRESCALER_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option { + match self.bits { + 0 => Some(PRESCALER_A::OFF), + 1 => Some(PRESCALER_A::DIV1), + 2 => Some(PRESCALER_A::DIV2), + 3 => Some(PRESCALER_A::DIV4), + 4 => Some(PRESCALER_A::DIV8), + 5 => Some(PRESCALER_A::DIV16), + 6 => Some(PRESCALER_A::DIV32), + 7 => Some(PRESCALER_A::DIV64), + 8 => Some(PRESCALER_A::DIV128), + 9 => Some(PRESCALER_A::DIV256), + 10 => Some(PRESCALER_A::DIV512), + 11 => Some(PRESCALER_A::DIV1024), + _ => None, + } + } + #[doc = "Checks if the value of the field is `OFF`"] + #[inline(always)] + pub fn is_off(&self) -> bool { + **self == PRESCALER_A::OFF + } + #[doc = "Checks if the value of the field is `DIV1`"] + #[inline(always)] + pub fn is_div1(&self) -> bool { + **self == PRESCALER_A::DIV1 + } + #[doc = "Checks if the value of the field is `DIV2`"] + #[inline(always)] + pub fn is_div2(&self) -> bool { + **self == PRESCALER_A::DIV2 + } + #[doc = "Checks if the value of the field is `DIV4`"] + #[inline(always)] + pub fn is_div4(&self) -> bool { + **self == PRESCALER_A::DIV4 + } + #[doc = "Checks if the value of the field is `DIV8`"] + #[inline(always)] + pub fn is_div8(&self) -> bool { + **self == PRESCALER_A::DIV8 + } + #[doc = "Checks if the value of the field is `DIV16`"] + #[inline(always)] + pub fn is_div16(&self) -> bool { + **self == PRESCALER_A::DIV16 + } + #[doc = "Checks if the value of the field is `DIV32`"] + #[inline(always)] + pub fn is_div32(&self) -> bool { + **self == PRESCALER_A::DIV32 + } + #[doc = "Checks if the value of the field is `DIV64`"] + #[inline(always)] + pub fn is_div64(&self) -> bool { + **self == PRESCALER_A::DIV64 + } + #[doc = "Checks if the value of the field is `DIV128`"] + #[inline(always)] + pub fn is_div128(&self) -> bool { + **self == PRESCALER_A::DIV128 + } + #[doc = "Checks if the value of the field is `DIV256`"] + #[inline(always)] + pub fn is_div256(&self) -> bool { + **self == PRESCALER_A::DIV256 + } + #[doc = "Checks if the value of the field is `DIV512`"] + #[inline(always)] + pub fn is_div512(&self) -> bool { + **self == PRESCALER_A::DIV512 + } + #[doc = "Checks if the value of the field is `DIV1024`"] + #[inline(always)] + pub fn is_div1024(&self) -> bool { + **self == PRESCALER_A::DIV1024 + } +} +impl core::ops::Deref for PRESCALER_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PRESCALER` writer - Prescaler"] +pub struct PRESCALER_W<'a> { + w: &'a mut W, +} +impl<'a> PRESCALER_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: PRESCALER_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/1"] + #[inline(always)] + pub fn off(self) -> &'a mut W { + self.variant(PRESCALER_A::OFF) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/1"] + #[inline(always)] + pub fn div1(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV1) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/2"] + #[inline(always)] + pub fn div2(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV2) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/4"] + #[inline(always)] + pub fn div4(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV4) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/8"] + #[inline(always)] + pub fn div8(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV8) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/16"] + #[inline(always)] + pub fn div16(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV16) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/32"] + #[inline(always)] + pub fn div32(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV32) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/64"] + #[inline(always)] + pub fn div64(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV64) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/128"] + #[inline(always)] + pub fn div128(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV128) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/256"] + #[inline(always)] + pub fn div256(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV256) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/512"] + #[inline(always)] + pub fn div512(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV512) + } + #[doc = "CLK_RTC_CNT = GCLK_RTC/1024"] + #[inline(always)] + pub fn div1024(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV1024) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u16 & 0x0f) << 8); + self.w + } +} +#[doc = "Field `CLOCKSYNC` reader - Clock Read Synchronization Enable"] +pub struct CLOCKSYNC_R(crate::FieldReader); +impl CLOCKSYNC_R { + pub(crate) fn new(bits: bool) -> Self { + CLOCKSYNC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CLOCKSYNC_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CLOCKSYNC` writer - Clock Read Synchronization Enable"] +pub struct CLOCKSYNC_W<'a> { + w: &'a mut W, +} +impl<'a> CLOCKSYNC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Enable"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bits 2:3 - Operating Mode"] + #[inline(always)] + pub fn mode(&self) -> MODE_R { + MODE_R::new(((self.bits >> 2) & 0x03) as u8) + } + #[doc = "Bit 6 - Clock Representation"] + #[inline(always)] + pub fn clkrep(&self) -> CLKREP_R { + CLKREP_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Clear on Match"] + #[inline(always)] + pub fn matchclr(&self) -> MATCHCLR_R { + MATCHCLR_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bits 8:11 - Prescaler"] + #[inline(always)] + pub fn prescaler(&self) -> PRESCALER_R { + PRESCALER_R::new(((self.bits >> 8) & 0x0f) as u8) + } + #[doc = "Bit 15 - Clock Read Synchronization Enable"] + #[inline(always)] + pub fn clocksync(&self) -> CLOCKSYNC_R { + CLOCKSYNC_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&mut self) -> SWRST_W { + SWRST_W { w: self } + } + #[doc = "Bit 1 - Enable"] + #[inline(always)] + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W { w: self } + } + #[doc = "Bits 2:3 - Operating Mode"] + #[inline(always)] + pub fn mode(&mut self) -> MODE_W { + MODE_W { w: self } + } + #[doc = "Bit 6 - Clock Representation"] + #[inline(always)] + pub fn clkrep(&mut self) -> CLKREP_W { + CLKREP_W { w: self } + } + #[doc = "Bit 7 - Clear on Match"] + #[inline(always)] + pub fn matchclr(&mut self) -> MATCHCLR_W { + MATCHCLR_W { w: self } + } + #[doc = "Bits 8:11 - Prescaler"] + #[inline(always)] + pub fn prescaler(&mut self) -> PRESCALER_W { + PRESCALER_W { w: self } + } + #[doc = "Bit 15 - Clock Read Synchronization Enable"] + #[inline(always)] + pub fn clocksync(&mut self) -> CLOCKSYNC_W { + CLOCKSYNC_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE2 Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"] +pub struct CTRLA_SPEC; +impl crate::RegisterSpec for CTRLA_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [ctrla::R](R) reader structure"] +impl crate::Readable for CTRLA_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"] +impl crate::Writable for CTRLA_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CTRLA to value 0"] +impl crate::Resettable for CTRLA_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode2/dbgctrl.rs b/src/rtc/mode2/dbgctrl.rs new file mode 100644 index 0000000..950156c --- /dev/null +++ b/src/rtc/mode2/dbgctrl.rs @@ -0,0 +1,112 @@ +#[doc = "Register `DBGCTRL` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `DBGCTRL` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `DBGRUN` reader - Run During Debug"] +pub struct DBGRUN_R(crate::FieldReader); +impl DBGRUN_R { + pub(crate) fn new(bits: bool) -> Self { + DBGRUN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DBGRUN_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DBGRUN` writer - Run During Debug"] +pub struct DBGRUN_W<'a> { + w: &'a mut W, +} +impl<'a> DBGRUN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +impl R { + #[doc = "Bit 0 - Run During Debug"] + #[inline(always)] + pub fn dbgrun(&self) -> DBGRUN_R { + DBGRUN_R::new((self.bits & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Run During Debug"] + #[inline(always)] + pub fn dbgrun(&mut self) -> DBGRUN_W { + DBGRUN_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Debug Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgctrl](index.html) module"] +pub struct DBGCTRL_SPEC; +impl crate::RegisterSpec for DBGCTRL_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [dbgctrl::R](R) reader structure"] +impl crate::Readable for DBGCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [dbgctrl::W](W) writer structure"] +impl crate::Writable for DBGCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets DBGCTRL to value 0"] +impl crate::Resettable for DBGCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode2/evctrl.rs b/src/rtc/mode2/evctrl.rs new file mode 100644 index 0000000..bb1f2b1 --- /dev/null +++ b/src/rtc/mode2/evctrl.rs @@ -0,0 +1,526 @@ +#[doc = "Register `EVCTRL` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `EVCTRL` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PEREO0` reader - Periodic Interval 0 Event Output Enable"] +pub struct PEREO0_R(crate::FieldReader); +impl PEREO0_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO0` writer - Periodic Interval 0 Event Output Enable"] +pub struct PEREO0_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); + self.w + } +} +#[doc = "Field `PEREO1` reader - Periodic Interval 1 Event Output Enable"] +pub struct PEREO1_R(crate::FieldReader); +impl PEREO1_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO1` writer - Periodic Interval 1 Event Output Enable"] +pub struct PEREO1_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); + self.w + } +} +#[doc = "Field `PEREO2` reader - Periodic Interval 2 Event Output Enable"] +pub struct PEREO2_R(crate::FieldReader); +impl PEREO2_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO2_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO2` writer - Periodic Interval 2 Event Output Enable"] +pub struct PEREO2_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); + self.w + } +} +#[doc = "Field `PEREO3` reader - Periodic Interval 3 Event Output Enable"] +pub struct PEREO3_R(crate::FieldReader); +impl PEREO3_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO3_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO3` writer - Periodic Interval 3 Event Output Enable"] +pub struct PEREO3_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PEREO4` reader - Periodic Interval 4 Event Output Enable"] +pub struct PEREO4_R(crate::FieldReader); +impl PEREO4_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO4_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO4` writer - Periodic Interval 4 Event Output Enable"] +pub struct PEREO4_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); + self.w + } +} +#[doc = "Field `PEREO5` reader - Periodic Interval 5 Event Output Enable"] +pub struct PEREO5_R(crate::FieldReader); +impl PEREO5_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO5_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO5` writer - Periodic Interval 5 Event Output Enable"] +pub struct PEREO5_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); + self.w + } +} +#[doc = "Field `PEREO6` reader - Periodic Interval 6 Event Output Enable"] +pub struct PEREO6_R(crate::FieldReader); +impl PEREO6_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO6_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO6` writer - Periodic Interval 6 Event Output Enable"] +pub struct PEREO6_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); + self.w + } +} +#[doc = "Field `PEREO7` reader - Periodic Interval 7 Event Output Enable"] +pub struct PEREO7_R(crate::FieldReader); +impl PEREO7_R { + pub(crate) fn new(bits: bool) -> Self { + PEREO7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PEREO7_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PEREO7` writer - Periodic Interval 7 Event Output Enable"] +pub struct PEREO7_W<'a> { + w: &'a mut W, +} +impl<'a> PEREO7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); + self.w + } +} +#[doc = "Field `ALARMEO0` reader - Alarm 0 Event Output Enable"] +pub struct ALARMEO0_R(crate::FieldReader); +impl ALARMEO0_R { + pub(crate) fn new(bits: bool) -> Self { + ALARMEO0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ALARMEO0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ALARMEO0` writer - Alarm 0 Event Output Enable"] +pub struct ALARMEO0_W<'a> { + w: &'a mut W, +} +impl<'a> ALARMEO0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); + self.w + } +} +#[doc = "Field `OVFEO` reader - Overflow Event Output Enable"] +pub struct OVFEO_R(crate::FieldReader); +impl OVFEO_R { + pub(crate) fn new(bits: bool) -> Self { + OVFEO_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVFEO_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVFEO` writer - Overflow Event Output Enable"] +pub struct OVFEO_W<'a> { + w: &'a mut W, +} +impl<'a> OVFEO_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Periodic Interval 0 Event Output Enable"] + #[inline(always)] + pub fn pereo0(&self) -> PEREO0_R { + PEREO0_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Periodic Interval 1 Event Output Enable"] + #[inline(always)] + pub fn pereo1(&self) -> PEREO1_R { + PEREO1_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Periodic Interval 2 Event Output Enable"] + #[inline(always)] + pub fn pereo2(&self) -> PEREO2_R { + PEREO2_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Periodic Interval 3 Event Output Enable"] + #[inline(always)] + pub fn pereo3(&self) -> PEREO3_R { + PEREO3_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Periodic Interval 4 Event Output Enable"] + #[inline(always)] + pub fn pereo4(&self) -> PEREO4_R { + PEREO4_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Periodic Interval 5 Event Output Enable"] + #[inline(always)] + pub fn pereo5(&self) -> PEREO5_R { + PEREO5_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Periodic Interval 6 Event Output Enable"] + #[inline(always)] + pub fn pereo6(&self) -> PEREO6_R { + PEREO6_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Periodic Interval 7 Event Output Enable"] + #[inline(always)] + pub fn pereo7(&self) -> PEREO7_R { + PEREO7_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Alarm 0 Event Output Enable"] + #[inline(always)] + pub fn alarmeo0(&self) -> ALARMEO0_R { + ALARMEO0_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 15 - Overflow Event Output Enable"] + #[inline(always)] + pub fn ovfeo(&self) -> OVFEO_R { + OVFEO_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Periodic Interval 0 Event Output Enable"] + #[inline(always)] + pub fn pereo0(&mut self) -> PEREO0_W { + PEREO0_W { w: self } + } + #[doc = "Bit 1 - Periodic Interval 1 Event Output Enable"] + #[inline(always)] + pub fn pereo1(&mut self) -> PEREO1_W { + PEREO1_W { w: self } + } + #[doc = "Bit 2 - Periodic Interval 2 Event Output Enable"] + #[inline(always)] + pub fn pereo2(&mut self) -> PEREO2_W { + PEREO2_W { w: self } + } + #[doc = "Bit 3 - Periodic Interval 3 Event Output Enable"] + #[inline(always)] + pub fn pereo3(&mut self) -> PEREO3_W { + PEREO3_W { w: self } + } + #[doc = "Bit 4 - Periodic Interval 4 Event Output Enable"] + #[inline(always)] + pub fn pereo4(&mut self) -> PEREO4_W { + PEREO4_W { w: self } + } + #[doc = "Bit 5 - Periodic Interval 5 Event Output Enable"] + #[inline(always)] + pub fn pereo5(&mut self) -> PEREO5_W { + PEREO5_W { w: self } + } + #[doc = "Bit 6 - Periodic Interval 6 Event Output Enable"] + #[inline(always)] + pub fn pereo6(&mut self) -> PEREO6_W { + PEREO6_W { w: self } + } + #[doc = "Bit 7 - Periodic Interval 7 Event Output Enable"] + #[inline(always)] + pub fn pereo7(&mut self) -> PEREO7_W { + PEREO7_W { w: self } + } + #[doc = "Bit 8 - Alarm 0 Event Output Enable"] + #[inline(always)] + pub fn alarmeo0(&mut self) -> ALARMEO0_W { + ALARMEO0_W { w: self } + } + #[doc = "Bit 15 - Overflow Event Output Enable"] + #[inline(always)] + pub fn ovfeo(&mut self) -> OVFEO_W { + OVFEO_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE2 Event Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [evctrl](index.html) module"] +pub struct EVCTRL_SPEC; +impl crate::RegisterSpec for EVCTRL_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [evctrl::R](R) reader structure"] +impl crate::Readable for EVCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [evctrl::W](W) writer structure"] +impl crate::Writable for EVCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets EVCTRL to value 0"] +impl crate::Resettable for EVCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode2/freqcorr.rs b/src/rtc/mode2/freqcorr.rs new file mode 100644 index 0000000..595f68c --- /dev/null +++ b/src/rtc/mode2/freqcorr.rs @@ -0,0 +1,148 @@ +#[doc = "Register `FREQCORR` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `FREQCORR` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `VALUE` reader - Correction Value"] +pub struct VALUE_R(crate::FieldReader); +impl VALUE_R { + pub(crate) fn new(bits: u8) -> Self { + VALUE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for VALUE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `VALUE` writer - Correction Value"] +pub struct VALUE_W<'a> { + w: &'a mut W, +} +impl<'a> VALUE_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x7f) | (value as u8 & 0x7f); + self.w + } +} +#[doc = "Field `SIGN` reader - Correction Sign"] +pub struct SIGN_R(crate::FieldReader); +impl SIGN_R { + pub(crate) fn new(bits: bool) -> Self { + SIGN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SIGN_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SIGN` writer - Correction Sign"] +pub struct SIGN_W<'a> { + w: &'a mut W, +} +impl<'a> SIGN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7); + self.w + } +} +impl R { + #[doc = "Bits 0:6 - Correction Value"] + #[inline(always)] + pub fn value(&self) -> VALUE_R { + VALUE_R::new((self.bits & 0x7f) as u8) + } + #[doc = "Bit 7 - Correction Sign"] + #[inline(always)] + pub fn sign(&self) -> SIGN_R { + SIGN_R::new(((self.bits >> 7) & 0x01) != 0) + } +} +impl W { + #[doc = "Bits 0:6 - Correction Value"] + #[inline(always)] + pub fn value(&mut self) -> VALUE_W { + VALUE_W { w: self } + } + #[doc = "Bit 7 - Correction Sign"] + #[inline(always)] + pub fn sign(&mut self) -> SIGN_W { + SIGN_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Frequency Correction\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [freqcorr](index.html) module"] +pub struct FREQCORR_SPEC; +impl crate::RegisterSpec for FREQCORR_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [freqcorr::R](R) reader structure"] +impl crate::Readable for FREQCORR_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [freqcorr::W](W) writer structure"] +impl crate::Writable for FREQCORR_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets FREQCORR to value 0"] +impl crate::Resettable for FREQCORR_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode2/intenclr.rs b/src/rtc/mode2/intenclr.rs new file mode 100644 index 0000000..66037d0 --- /dev/null +++ b/src/rtc/mode2/intenclr.rs @@ -0,0 +1,526 @@ +#[doc = "Register `INTENCLR` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `INTENCLR` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PER0` reader - Periodic Interval 0 Interrupt Enable"] +pub struct PER0_R(crate::FieldReader); +impl PER0_R { + pub(crate) fn new(bits: bool) -> Self { + PER0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER0` writer - Periodic Interval 0 Interrupt Enable"] +pub struct PER0_W<'a> { + w: &'a mut W, +} +impl<'a> PER0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `PER1` reader - Periodic Interval 1 Interrupt Enable"] +pub struct PER1_R(crate::FieldReader); +impl PER1_R { + pub(crate) fn new(bits: bool) -> Self { + PER1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER1` writer - Periodic Interval 1 Interrupt Enable"] +pub struct PER1_W<'a> { + w: &'a mut W, +} +impl<'a> PER1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Field `PER2` reader - Periodic Interval 2 Interrupt Enable"] +pub struct PER2_R(crate::FieldReader); +impl PER2_R { + pub(crate) fn new(bits: bool) -> Self { + PER2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER2_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER2` writer - Periodic Interval 2 Interrupt Enable"] +pub struct PER2_W<'a> { + w: &'a mut W, +} +impl<'a> PER2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2); + self.w + } +} +#[doc = "Field `PER3` reader - Periodic Interval 3 Interrupt Enable"] +pub struct PER3_R(crate::FieldReader); +impl PER3_R { + pub(crate) fn new(bits: bool) -> Self { + PER3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER3_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER3` writer - Periodic Interval 3 Interrupt Enable"] +pub struct PER3_W<'a> { + w: &'a mut W, +} +impl<'a> PER3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PER4` reader - Periodic Interval 4 Interrupt Enable"] +pub struct PER4_R(crate::FieldReader); +impl PER4_R { + pub(crate) fn new(bits: bool) -> Self { + PER4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER4_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER4` writer - Periodic Interval 4 Interrupt Enable"] +pub struct PER4_W<'a> { + w: &'a mut W, +} +impl<'a> PER4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4); + self.w + } +} +#[doc = "Field `PER5` reader - Periodic Interval 5 Interrupt Enable"] +pub struct PER5_R(crate::FieldReader); +impl PER5_R { + pub(crate) fn new(bits: bool) -> Self { + PER5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER5_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER5` writer - Periodic Interval 5 Interrupt Enable"] +pub struct PER5_W<'a> { + w: &'a mut W, +} +impl<'a> PER5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5); + self.w + } +} +#[doc = "Field `PER6` reader - Periodic Interval 6 Interrupt Enable"] +pub struct PER6_R(crate::FieldReader); +impl PER6_R { + pub(crate) fn new(bits: bool) -> Self { + PER6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER6_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER6` writer - Periodic Interval 6 Interrupt Enable"] +pub struct PER6_W<'a> { + w: &'a mut W, +} +impl<'a> PER6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6); + self.w + } +} +#[doc = "Field `PER7` reader - Periodic Interval 7 Interrupt Enable"] +pub struct PER7_R(crate::FieldReader); +impl PER7_R { + pub(crate) fn new(bits: bool) -> Self { + PER7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER7_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER7` writer - Periodic Interval 7 Interrupt Enable"] +pub struct PER7_W<'a> { + w: &'a mut W, +} +impl<'a> PER7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); + self.w + } +} +#[doc = "Field `ALARM0` reader - Alarm 0 Interrupt Enable"] +pub struct ALARM0_R(crate::FieldReader); +impl ALARM0_R { + pub(crate) fn new(bits: bool) -> Self { + ALARM0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ALARM0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ALARM0` writer - Alarm 0 Interrupt Enable"] +pub struct ALARM0_W<'a> { + w: &'a mut W, +} +impl<'a> ALARM0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u16 & 0x01) << 8); + self.w + } +} +#[doc = "Field `OVF` reader - Overflow Interrupt Enable"] +pub struct OVF_R(crate::FieldReader); +impl OVF_R { + pub(crate) fn new(bits: bool) -> Self { + OVF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVF_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVF` writer - Overflow Interrupt Enable"] +pub struct OVF_W<'a> { + w: &'a mut W, +} +impl<'a> OVF_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"] + #[inline(always)] + pub fn per0(&self) -> PER0_R { + PER0_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"] + #[inline(always)] + pub fn per1(&self) -> PER1_R { + PER1_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"] + #[inline(always)] + pub fn per2(&self) -> PER2_R { + PER2_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"] + #[inline(always)] + pub fn per3(&self) -> PER3_R { + PER3_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"] + #[inline(always)] + pub fn per4(&self) -> PER4_R { + PER4_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"] + #[inline(always)] + pub fn per5(&self) -> PER5_R { + PER5_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"] + #[inline(always)] + pub fn per6(&self) -> PER6_R { + PER6_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"] + #[inline(always)] + pub fn per7(&self) -> PER7_R { + PER7_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Alarm 0 Interrupt Enable"] + #[inline(always)] + pub fn alarm0(&self) -> ALARM0_R { + ALARM0_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 15 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ovf(&self) -> OVF_R { + OVF_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"] + #[inline(always)] + pub fn per0(&mut self) -> PER0_W { + PER0_W { w: self } + } + #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"] + #[inline(always)] + pub fn per1(&mut self) -> PER1_W { + PER1_W { w: self } + } + #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"] + #[inline(always)] + pub fn per2(&mut self) -> PER2_W { + PER2_W { w: self } + } + #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"] + #[inline(always)] + pub fn per3(&mut self) -> PER3_W { + PER3_W { w: self } + } + #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"] + #[inline(always)] + pub fn per4(&mut self) -> PER4_W { + PER4_W { w: self } + } + #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"] + #[inline(always)] + pub fn per5(&mut self) -> PER5_W { + PER5_W { w: self } + } + #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"] + #[inline(always)] + pub fn per6(&mut self) -> PER6_W { + PER6_W { w: self } + } + #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"] + #[inline(always)] + pub fn per7(&mut self) -> PER7_W { + PER7_W { w: self } + } + #[doc = "Bit 8 - Alarm 0 Interrupt Enable"] + #[inline(always)] + pub fn alarm0(&mut self) -> ALARM0_W { + ALARM0_W { w: self } + } + #[doc = "Bit 15 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ovf(&mut self) -> OVF_W { + OVF_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE2 Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"] +pub struct INTENCLR_SPEC; +impl crate::RegisterSpec for INTENCLR_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [intenclr::R](R) reader structure"] +impl crate::Readable for INTENCLR_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"] +impl crate::Writable for INTENCLR_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTENCLR to value 0"] +impl crate::Resettable for INTENCLR_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode2/intenset.rs b/src/rtc/mode2/intenset.rs new file mode 100644 index 0000000..0cba473 --- /dev/null +++ b/src/rtc/mode2/intenset.rs @@ -0,0 +1,526 @@ +#[doc = "Register `INTENSET` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `INTENSET` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PER0` reader - Periodic Interval 0 Enable"] +pub struct PER0_R(crate::FieldReader); +impl PER0_R { + pub(crate) fn new(bits: bool) -> Self { + PER0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER0` writer - Periodic Interval 0 Enable"] +pub struct PER0_W<'a> { + w: &'a mut W, +} +impl<'a> PER0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `PER1` reader - Periodic Interval 1 Enable"] +pub struct PER1_R(crate::FieldReader); +impl PER1_R { + pub(crate) fn new(bits: bool) -> Self { + PER1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER1` writer - Periodic Interval 1 Enable"] +pub struct PER1_W<'a> { + w: &'a mut W, +} +impl<'a> PER1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Field `PER2` reader - Periodic Interval 2 Enable"] +pub struct PER2_R(crate::FieldReader); +impl PER2_R { + pub(crate) fn new(bits: bool) -> Self { + PER2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER2_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER2` writer - Periodic Interval 2 Enable"] +pub struct PER2_W<'a> { + w: &'a mut W, +} +impl<'a> PER2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2); + self.w + } +} +#[doc = "Field `PER3` reader - Periodic Interval 3 Enable"] +pub struct PER3_R(crate::FieldReader); +impl PER3_R { + pub(crate) fn new(bits: bool) -> Self { + PER3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER3_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER3` writer - Periodic Interval 3 Enable"] +pub struct PER3_W<'a> { + w: &'a mut W, +} +impl<'a> PER3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PER4` reader - Periodic Interval 4 Enable"] +pub struct PER4_R(crate::FieldReader); +impl PER4_R { + pub(crate) fn new(bits: bool) -> Self { + PER4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER4_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER4` writer - Periodic Interval 4 Enable"] +pub struct PER4_W<'a> { + w: &'a mut W, +} +impl<'a> PER4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4); + self.w + } +} +#[doc = "Field `PER5` reader - Periodic Interval 5 Enable"] +pub struct PER5_R(crate::FieldReader); +impl PER5_R { + pub(crate) fn new(bits: bool) -> Self { + PER5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER5_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER5` writer - Periodic Interval 5 Enable"] +pub struct PER5_W<'a> { + w: &'a mut W, +} +impl<'a> PER5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5); + self.w + } +} +#[doc = "Field `PER6` reader - Periodic Interval 6 Enable"] +pub struct PER6_R(crate::FieldReader); +impl PER6_R { + pub(crate) fn new(bits: bool) -> Self { + PER6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER6_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER6` writer - Periodic Interval 6 Enable"] +pub struct PER6_W<'a> { + w: &'a mut W, +} +impl<'a> PER6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6); + self.w + } +} +#[doc = "Field `PER7` reader - Periodic Interval 7 Enable"] +pub struct PER7_R(crate::FieldReader); +impl PER7_R { + pub(crate) fn new(bits: bool) -> Self { + PER7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER7_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER7` writer - Periodic Interval 7 Enable"] +pub struct PER7_W<'a> { + w: &'a mut W, +} +impl<'a> PER7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); + self.w + } +} +#[doc = "Field `ALARM0` reader - Alarm 0 Interrupt Enable"] +pub struct ALARM0_R(crate::FieldReader); +impl ALARM0_R { + pub(crate) fn new(bits: bool) -> Self { + ALARM0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ALARM0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ALARM0` writer - Alarm 0 Interrupt Enable"] +pub struct ALARM0_W<'a> { + w: &'a mut W, +} +impl<'a> ALARM0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u16 & 0x01) << 8); + self.w + } +} +#[doc = "Field `OVF` reader - Overflow Interrupt Enable"] +pub struct OVF_R(crate::FieldReader); +impl OVF_R { + pub(crate) fn new(bits: bool) -> Self { + OVF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVF_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVF` writer - Overflow Interrupt Enable"] +pub struct OVF_W<'a> { + w: &'a mut W, +} +impl<'a> OVF_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Periodic Interval 0 Enable"] + #[inline(always)] + pub fn per0(&self) -> PER0_R { + PER0_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Periodic Interval 1 Enable"] + #[inline(always)] + pub fn per1(&self) -> PER1_R { + PER1_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Periodic Interval 2 Enable"] + #[inline(always)] + pub fn per2(&self) -> PER2_R { + PER2_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Periodic Interval 3 Enable"] + #[inline(always)] + pub fn per3(&self) -> PER3_R { + PER3_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Periodic Interval 4 Enable"] + #[inline(always)] + pub fn per4(&self) -> PER4_R { + PER4_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Periodic Interval 5 Enable"] + #[inline(always)] + pub fn per5(&self) -> PER5_R { + PER5_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Periodic Interval 6 Enable"] + #[inline(always)] + pub fn per6(&self) -> PER6_R { + PER6_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Periodic Interval 7 Enable"] + #[inline(always)] + pub fn per7(&self) -> PER7_R { + PER7_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Alarm 0 Interrupt Enable"] + #[inline(always)] + pub fn alarm0(&self) -> ALARM0_R { + ALARM0_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 15 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ovf(&self) -> OVF_R { + OVF_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Periodic Interval 0 Enable"] + #[inline(always)] + pub fn per0(&mut self) -> PER0_W { + PER0_W { w: self } + } + #[doc = "Bit 1 - Periodic Interval 1 Enable"] + #[inline(always)] + pub fn per1(&mut self) -> PER1_W { + PER1_W { w: self } + } + #[doc = "Bit 2 - Periodic Interval 2 Enable"] + #[inline(always)] + pub fn per2(&mut self) -> PER2_W { + PER2_W { w: self } + } + #[doc = "Bit 3 - Periodic Interval 3 Enable"] + #[inline(always)] + pub fn per3(&mut self) -> PER3_W { + PER3_W { w: self } + } + #[doc = "Bit 4 - Periodic Interval 4 Enable"] + #[inline(always)] + pub fn per4(&mut self) -> PER4_W { + PER4_W { w: self } + } + #[doc = "Bit 5 - Periodic Interval 5 Enable"] + #[inline(always)] + pub fn per5(&mut self) -> PER5_W { + PER5_W { w: self } + } + #[doc = "Bit 6 - Periodic Interval 6 Enable"] + #[inline(always)] + pub fn per6(&mut self) -> PER6_W { + PER6_W { w: self } + } + #[doc = "Bit 7 - Periodic Interval 7 Enable"] + #[inline(always)] + pub fn per7(&mut self) -> PER7_W { + PER7_W { w: self } + } + #[doc = "Bit 8 - Alarm 0 Interrupt Enable"] + #[inline(always)] + pub fn alarm0(&mut self) -> ALARM0_W { + ALARM0_W { w: self } + } + #[doc = "Bit 15 - Overflow Interrupt Enable"] + #[inline(always)] + pub fn ovf(&mut self) -> OVF_W { + OVF_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE2 Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"] +pub struct INTENSET_SPEC; +impl crate::RegisterSpec for INTENSET_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [intenset::R](R) reader structure"] +impl crate::Readable for INTENSET_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"] +impl crate::Writable for INTENSET_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTENSET to value 0"] +impl crate::Resettable for INTENSET_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode2/intflag.rs b/src/rtc/mode2/intflag.rs new file mode 100644 index 0000000..57a52c7 --- /dev/null +++ b/src/rtc/mode2/intflag.rs @@ -0,0 +1,526 @@ +#[doc = "Register `INTFLAG` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `INTFLAG` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Field `PER0` reader - Periodic Interval 0"] +pub struct PER0_R(crate::FieldReader); +impl PER0_R { + pub(crate) fn new(bits: bool) -> Self { + PER0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER0` writer - Periodic Interval 0"] +pub struct PER0_W<'a> { + w: &'a mut W, +} +impl<'a> PER0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `PER1` reader - Periodic Interval 1"] +pub struct PER1_R(crate::FieldReader); +impl PER1_R { + pub(crate) fn new(bits: bool) -> Self { + PER1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER1_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER1` writer - Periodic Interval 1"] +pub struct PER1_W<'a> { + w: &'a mut W, +} +impl<'a> PER1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Field `PER2` reader - Periodic Interval 2"] +pub struct PER2_R(crate::FieldReader); +impl PER2_R { + pub(crate) fn new(bits: bool) -> Self { + PER2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER2_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER2` writer - Periodic Interval 2"] +pub struct PER2_W<'a> { + w: &'a mut W, +} +impl<'a> PER2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2); + self.w + } +} +#[doc = "Field `PER3` reader - Periodic Interval 3"] +pub struct PER3_R(crate::FieldReader); +impl PER3_R { + pub(crate) fn new(bits: bool) -> Self { + PER3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER3_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER3` writer - Periodic Interval 3"] +pub struct PER3_W<'a> { + w: &'a mut W, +} +impl<'a> PER3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PER4` reader - Periodic Interval 4"] +pub struct PER4_R(crate::FieldReader); +impl PER4_R { + pub(crate) fn new(bits: bool) -> Self { + PER4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER4_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER4` writer - Periodic Interval 4"] +pub struct PER4_W<'a> { + w: &'a mut W, +} +impl<'a> PER4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4); + self.w + } +} +#[doc = "Field `PER5` reader - Periodic Interval 5"] +pub struct PER5_R(crate::FieldReader); +impl PER5_R { + pub(crate) fn new(bits: bool) -> Self { + PER5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER5_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER5` writer - Periodic Interval 5"] +pub struct PER5_W<'a> { + w: &'a mut W, +} +impl<'a> PER5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5); + self.w + } +} +#[doc = "Field `PER6` reader - Periodic Interval 6"] +pub struct PER6_R(crate::FieldReader); +impl PER6_R { + pub(crate) fn new(bits: bool) -> Self { + PER6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER6_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER6` writer - Periodic Interval 6"] +pub struct PER6_W<'a> { + w: &'a mut W, +} +impl<'a> PER6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6); + self.w + } +} +#[doc = "Field `PER7` reader - Periodic Interval 7"] +pub struct PER7_R(crate::FieldReader); +impl PER7_R { + pub(crate) fn new(bits: bool) -> Self { + PER7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PER7_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PER7` writer - Periodic Interval 7"] +pub struct PER7_W<'a> { + w: &'a mut W, +} +impl<'a> PER7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); + self.w + } +} +#[doc = "Field `ALARM0` reader - Alarm 0"] +pub struct ALARM0_R(crate::FieldReader); +impl ALARM0_R { + pub(crate) fn new(bits: bool) -> Self { + ALARM0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ALARM0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ALARM0` writer - Alarm 0"] +pub struct ALARM0_W<'a> { + w: &'a mut W, +} +impl<'a> ALARM0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u16 & 0x01) << 8); + self.w + } +} +#[doc = "Field `OVF` reader - Overflow"] +pub struct OVF_R(crate::FieldReader); +impl OVF_R { + pub(crate) fn new(bits: bool) -> Self { + OVF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVF_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVF` writer - Overflow"] +pub struct OVF_W<'a> { + w: &'a mut W, +} +impl<'a> OVF_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15); + self.w + } +} +impl R { + #[doc = "Bit 0 - Periodic Interval 0"] + #[inline(always)] + pub fn per0(&self) -> PER0_R { + PER0_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Periodic Interval 1"] + #[inline(always)] + pub fn per1(&self) -> PER1_R { + PER1_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Periodic Interval 2"] + #[inline(always)] + pub fn per2(&self) -> PER2_R { + PER2_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Periodic Interval 3"] + #[inline(always)] + pub fn per3(&self) -> PER3_R { + PER3_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Periodic Interval 4"] + #[inline(always)] + pub fn per4(&self) -> PER4_R { + PER4_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Periodic Interval 5"] + #[inline(always)] + pub fn per5(&self) -> PER5_R { + PER5_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Periodic Interval 6"] + #[inline(always)] + pub fn per6(&self) -> PER6_R { + PER6_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Periodic Interval 7"] + #[inline(always)] + pub fn per7(&self) -> PER7_R { + PER7_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Alarm 0"] + #[inline(always)] + pub fn alarm0(&self) -> ALARM0_R { + ALARM0_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 15 - Overflow"] + #[inline(always)] + pub fn ovf(&self) -> OVF_R { + OVF_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Periodic Interval 0"] + #[inline(always)] + pub fn per0(&mut self) -> PER0_W { + PER0_W { w: self } + } + #[doc = "Bit 1 - Periodic Interval 1"] + #[inline(always)] + pub fn per1(&mut self) -> PER1_W { + PER1_W { w: self } + } + #[doc = "Bit 2 - Periodic Interval 2"] + #[inline(always)] + pub fn per2(&mut self) -> PER2_W { + PER2_W { w: self } + } + #[doc = "Bit 3 - Periodic Interval 3"] + #[inline(always)] + pub fn per3(&mut self) -> PER3_W { + PER3_W { w: self } + } + #[doc = "Bit 4 - Periodic Interval 4"] + #[inline(always)] + pub fn per4(&mut self) -> PER4_W { + PER4_W { w: self } + } + #[doc = "Bit 5 - Periodic Interval 5"] + #[inline(always)] + pub fn per5(&mut self) -> PER5_W { + PER5_W { w: self } + } + #[doc = "Bit 6 - Periodic Interval 6"] + #[inline(always)] + pub fn per6(&mut self) -> PER6_W { + PER6_W { w: self } + } + #[doc = "Bit 7 - Periodic Interval 7"] + #[inline(always)] + pub fn per7(&mut self) -> PER7_W { + PER7_W { w: self } + } + #[doc = "Bit 8 - Alarm 0"] + #[inline(always)] + pub fn alarm0(&mut self) -> ALARM0_W { + ALARM0_W { w: self } + } + #[doc = "Bit 15 - Overflow"] + #[inline(always)] + pub fn ovf(&mut self) -> OVF_W { + OVF_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE2 Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"] +pub struct INTFLAG_SPEC; +impl crate::RegisterSpec for INTFLAG_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [intflag::R](R) reader structure"] +impl crate::Readable for INTFLAG_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"] +impl crate::Writable for INTFLAG_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTFLAG to value 0"] +impl crate::Resettable for INTFLAG_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode2/mask.rs b/src/rtc/mode2/mask.rs new file mode 100644 index 0000000..3484baa --- /dev/null +++ b/src/rtc/mode2/mask.rs @@ -0,0 +1,216 @@ +#[doc = "Register `MASK` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Register `MASK` writer"] +pub struct W(crate::W); +impl core::ops::Deref for W { + type Target = crate::W; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From> for W { + #[inline(always)] + fn from(writer: crate::W) -> Self { + W(writer) + } +} +#[doc = "Alarm Mask Selection\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SEL_A { + #[doc = "0: Alarm Disabled"] + OFF = 0, + #[doc = "1: Match seconds only"] + SS = 1, + #[doc = "2: Match seconds and minutes only"] + MMSS = 2, + #[doc = "3: Match seconds, minutes, and hours only"] + HHMMSS = 3, + #[doc = "4: Match seconds, minutes, hours, and days only"] + DDHHMMSS = 4, + #[doc = "5: Match seconds, minutes, hours, days, and months only"] + MMDDHHMMSS = 5, + #[doc = "6: Match seconds, minutes, hours, days, months, and years"] + YYMMDDHHMMSS = 6, +} +impl From for u8 { + #[inline(always)] + fn from(variant: SEL_A) -> Self { + variant as _ + } +} +#[doc = "Field `SEL` reader - Alarm Mask Selection"] +pub struct SEL_R(crate::FieldReader); +impl SEL_R { + pub(crate) fn new(bits: u8) -> Self { + SEL_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option { + match self.bits { + 0 => Some(SEL_A::OFF), + 1 => Some(SEL_A::SS), + 2 => Some(SEL_A::MMSS), + 3 => Some(SEL_A::HHMMSS), + 4 => Some(SEL_A::DDHHMMSS), + 5 => Some(SEL_A::MMDDHHMMSS), + 6 => Some(SEL_A::YYMMDDHHMMSS), + _ => None, + } + } + #[doc = "Checks if the value of the field is `OFF`"] + #[inline(always)] + pub fn is_off(&self) -> bool { + **self == SEL_A::OFF + } + #[doc = "Checks if the value of the field is `SS`"] + #[inline(always)] + pub fn is_ss(&self) -> bool { + **self == SEL_A::SS + } + #[doc = "Checks if the value of the field is `MMSS`"] + #[inline(always)] + pub fn is_mmss(&self) -> bool { + **self == SEL_A::MMSS + } + #[doc = "Checks if the value of the field is `HHMMSS`"] + #[inline(always)] + pub fn is_hhmmss(&self) -> bool { + **self == SEL_A::HHMMSS + } + #[doc = "Checks if the value of the field is `DDHHMMSS`"] + #[inline(always)] + pub fn is_ddhhmmss(&self) -> bool { + **self == SEL_A::DDHHMMSS + } + #[doc = "Checks if the value of the field is `MMDDHHMMSS`"] + #[inline(always)] + pub fn is_mmddhhmmss(&self) -> bool { + **self == SEL_A::MMDDHHMMSS + } + #[doc = "Checks if the value of the field is `YYMMDDHHMMSS`"] + #[inline(always)] + pub fn is_yymmddhhmmss(&self) -> bool { + **self == SEL_A::YYMMDDHHMMSS + } +} +impl core::ops::Deref for SEL_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SEL` writer - Alarm Mask Selection"] +pub struct SEL_W<'a> { + w: &'a mut W, +} +impl<'a> SEL_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SEL_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "Alarm Disabled"] + #[inline(always)] + pub fn off(self) -> &'a mut W { + self.variant(SEL_A::OFF) + } + #[doc = "Match seconds only"] + #[inline(always)] + pub fn ss(self) -> &'a mut W { + self.variant(SEL_A::SS) + } + #[doc = "Match seconds and minutes only"] + #[inline(always)] + pub fn mmss(self) -> &'a mut W { + self.variant(SEL_A::MMSS) + } + #[doc = "Match seconds, minutes, and hours only"] + #[inline(always)] + pub fn hhmmss(self) -> &'a mut W { + self.variant(SEL_A::HHMMSS) + } + #[doc = "Match seconds, minutes, hours, and days only"] + #[inline(always)] + pub fn ddhhmmss(self) -> &'a mut W { + self.variant(SEL_A::DDHHMMSS) + } + #[doc = "Match seconds, minutes, hours, days, and months only"] + #[inline(always)] + pub fn mmddhhmmss(self) -> &'a mut W { + self.variant(SEL_A::MMDDHHMMSS) + } + #[doc = "Match seconds, minutes, hours, days, months, and years"] + #[inline(always)] + pub fn yymmddhhmmss(self) -> &'a mut W { + self.variant(SEL_A::YYMMDDHHMMSS) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x07) | (value as u8 & 0x07); + self.w + } +} +impl R { + #[doc = "Bits 0:2 - Alarm Mask Selection"] + #[inline(always)] + pub fn sel(&self) -> SEL_R { + SEL_R::new((self.bits & 0x07) as u8) + } +} +impl W { + #[doc = "Bits 0:2 - Alarm Mask Selection"] + #[inline(always)] + pub fn sel(&mut self) -> SEL_W { + SEL_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "MODE2_ALARM Alarm n Mask\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mask](index.html) module"] +pub struct MASK_SPEC; +impl crate::RegisterSpec for MASK_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [mask::R](R) reader structure"] +impl crate::Readable for MASK_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [mask::W](W) writer structure"] +impl crate::Writable for MASK_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets MASK to value 0"] +impl crate::Resettable for MASK_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/rtc/mode2/syncbusy.rs b/src/rtc/mode2/syncbusy.rs new file mode 100644 index 0000000..609b5d1 --- /dev/null +++ b/src/rtc/mode2/syncbusy.rs @@ -0,0 +1,166 @@ +#[doc = "Register `SYNCBUSY` reader"] +pub struct R(crate::R); +impl core::ops::Deref for R { + type Target = crate::R; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From> for R { + #[inline(always)] + fn from(reader: crate::R) -> Self { + R(reader) + } +} +#[doc = "Field `SWRST` reader - Software Reset Bit Busy"] +pub struct SWRST_R(crate::FieldReader); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENABLE` reader - Enable Bit Busy"] +pub struct ENABLE_R(crate::FieldReader); +impl ENABLE_R { + pub(crate) fn new(bits: bool) -> Self { + ENABLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENABLE_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FREQCORR` reader - FREQCORR Register Busy"] +pub struct FREQCORR_R(crate::FieldReader); +impl FREQCORR_R { + pub(crate) fn new(bits: bool) -> Self { + FREQCORR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FREQCORR_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CLOCK` reader - CLOCK Register Busy"] +pub struct CLOCK_R(crate::FieldReader); +impl CLOCK_R { + pub(crate) fn new(bits: bool) -> Self { + CLOCK_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CLOCK_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ALARM0` reader - ALARM 0 Register Busy"] +pub struct ALARM0_R(crate::FieldReader); +impl ALARM0_R { + pub(crate) fn new(bits: bool) -> Self { + ALARM0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ALARM0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MASK0` reader - MASK 0 Register Busy"] +pub struct MASK0_R(crate::FieldReader); +impl MASK0_R { + pub(crate) fn new(bits: bool) -> Self { + MASK0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for MASK0_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CLOCKSYNC` reader - Clock Read Synchronization Enable Bit Busy"] +pub struct CLOCKSYNC_R(crate::FieldReader); +impl CLOCKSYNC_R { + pub(crate) fn new(bits: bool) -> Self { + CLOCKSYNC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CLOCKSYNC_R { + type Target = crate::FieldReader; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bit 0 - Software Reset Bit Busy"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Enable Bit Busy"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - FREQCORR Register Busy"] + #[inline(always)] + pub fn freqcorr(&self) -> FREQCORR_R { + FREQCORR_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - CLOCK Register Busy"] + #[inline(always)] + pub fn clock(&self) -> CLOCK_R { + CLOCK_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 5 - ALARM 0 Register Busy"] + #[inline(always)] + pub fn alarm0(&self) -> ALARM0_R { + ALARM0_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 11 - MASK 0 Register Busy"] + #[inline(always)] + pub fn mask0(&self) -> MASK0_R { + MASK0_R::new(((self.bits >> 11) & 0x01) != 0) + } + #[doc = "Bit 15 - Clock Read Synchronization Enable Bit Busy"] + #[inline(always)] + pub fn clocksync(&self) -> CLOCKSYNC_R { + CLOCKSYNC_R::new(((self.bits >> 15) & 0x01) != 0) + } +} +#[doc = "MODE2 Synchronization Busy Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] +pub struct SYNCBUSY_SPEC; +impl crate::RegisterSpec for SYNCBUSY_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] +impl crate::Readable for SYNCBUSY_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets SYNCBUSY to value 0"] +impl crate::Resettable for SYNCBUSY_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} -- cgit v1.2.3-70-g09d2