#[doc = "Register `CTRLA` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTRLA` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SWRST` reader - Software Reset"] pub struct SWRST_R(crate::FieldReader); impl SWRST_R { pub(crate) fn new(bits: bool) -> Self { SWRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWRST` writer - Software Reset"] pub struct SWRST_W<'a> { w: &'a mut W, } impl<'a> SWRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `ENABLE` reader - Enable"] pub struct ENABLE_R(crate::FieldReader); impl ENABLE_R { pub(crate) fn new(bits: bool) -> Self { ENABLE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ENABLE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ENABLE` writer - Enable"] pub struct ENABLE_W<'a> { w: &'a mut W, } impl<'a> ENABLE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Operating Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] #[repr(u8)] pub enum MODE_A { #[doc = "0: USART with external clock"] USART_EXT_CLK = 0, #[doc = "1: USART with internal clock"] USART_INT_CLK = 1, #[doc = "2: SPI in slave operation"] SPI_SLAVE = 2, #[doc = "3: SPI in master operation"] SPI_MASTER = 3, #[doc = "4: I2C slave operation"] I2C_SLAVE = 4, #[doc = "5: I2C master operation"] I2C_MASTER = 5, } impl From for u8 { #[inline(always)] fn from(variant: MODE_A) -> Self { variant as _ } } #[doc = "Field `MODE` reader - Operating Mode"] pub struct MODE_R(crate::FieldReader); impl MODE_R { pub(crate) fn new(bits: u8) -> Self { MODE_R(crate::FieldReader::new(bits)) } #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> Option { match self.bits { 0 => Some(MODE_A::USART_EXT_CLK), 1 => Some(MODE_A::USART_INT_CLK), 2 => Some(MODE_A::SPI_SLAVE), 3 => Some(MODE_A::SPI_MASTER), 4 => Some(MODE_A::I2C_SLAVE), 5 => Some(MODE_A::I2C_MASTER), _ => None, } } #[doc = "Checks if the value of the field is `USART_EXT_CLK`"] #[inline(always)] pub fn is_usart_ext_clk(&self) -> bool { **self == MODE_A::USART_EXT_CLK } #[doc = "Checks if the value of the field is `USART_INT_CLK`"] #[inline(always)] pub fn is_usart_int_clk(&self) -> bool { **self == MODE_A::USART_INT_CLK } #[doc = "Checks if the value of the field is `SPI_SLAVE`"] #[inline(always)] pub fn is_spi_slave(&self) -> bool { **self == MODE_A::SPI_SLAVE } #[doc = "Checks if the value of the field is `SPI_MASTER`"] #[inline(always)] pub fn is_spi_master(&self) -> bool { **self == MODE_A::SPI_MASTER } #[doc = "Checks if the value of the field is `I2C_SLAVE`"] #[inline(always)] pub fn is_i2c_slave(&self) -> bool { **self == MODE_A::I2C_SLAVE } #[doc = "Checks if the value of the field is `I2C_MASTER`"] #[inline(always)] pub fn is_i2c_master(&self) -> bool { **self == MODE_A::I2C_MASTER } } impl core::ops::Deref for MODE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MODE` writer - Operating Mode"] pub struct MODE_W<'a> { w: &'a mut W, } impl<'a> MODE_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: MODE_A) -> &'a mut W { unsafe { self.bits(variant.into()) } } #[doc = "USART with external clock"] #[inline(always)] pub fn usart_ext_clk(self) -> &'a mut W { self.variant(MODE_A::USART_EXT_CLK) } #[doc = "USART with internal clock"] #[inline(always)] pub fn usart_int_clk(self) -> &'a mut W { self.variant(MODE_A::USART_INT_CLK) } #[doc = "SPI in slave operation"] #[inline(always)] pub fn spi_slave(self) -> &'a mut W { self.variant(MODE_A::SPI_SLAVE) } #[doc = "SPI in master operation"] #[inline(always)] pub fn spi_master(self) -> &'a mut W { self.variant(MODE_A::SPI_MASTER) } #[doc = "I2C slave operation"] #[inline(always)] pub fn i2c_slave(self) -> &'a mut W { self.variant(MODE_A::I2C_SLAVE) } #[doc = "I2C master operation"] #[inline(always)] pub fn i2c_master(self) -> &'a mut W { self.variant(MODE_A::I2C_MASTER) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 2)) | ((value as u32 & 0x07) << 2); self.w } } #[doc = "Field `RUNSTDBY` reader - Run in Standby"] pub struct RUNSTDBY_R(crate::FieldReader); impl RUNSTDBY_R { pub(crate) fn new(bits: bool) -> Self { RUNSTDBY_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RUNSTDBY_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RUNSTDBY` writer - Run in Standby"] pub struct RUNSTDBY_W<'a> { w: &'a mut W, } impl<'a> RUNSTDBY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `PINOUT` reader - Pin Usage"] pub struct PINOUT_R(crate::FieldReader); impl PINOUT_R { pub(crate) fn new(bits: bool) -> Self { PINOUT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PINOUT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PINOUT` writer - Pin Usage"] pub struct PINOUT_W<'a> { w: &'a mut W, } impl<'a> PINOUT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "SDA Hold Time\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] #[repr(u8)] pub enum SDAHOLD_A { #[doc = "0: Disabled"] DISABLE = 0, #[doc = "1: 50-100ns hold time"] _75NS = 1, #[doc = "2: 300-600ns hold time"] _450NS = 2, #[doc = "3: 400-800ns hold time"] _600NS = 3, } impl From for u8 { #[inline(always)] fn from(variant: SDAHOLD_A) -> Self { variant as _ } } #[doc = "Field `SDAHOLD` reader - SDA Hold Time"] pub struct SDAHOLD_R(crate::FieldReader); impl SDAHOLD_R { pub(crate) fn new(bits: u8) -> Self { SDAHOLD_R(crate::FieldReader::new(bits)) } #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> SDAHOLD_A { match self.bits { 0 => SDAHOLD_A::DISABLE, 1 => SDAHOLD_A::_75NS, 2 => SDAHOLD_A::_450NS, 3 => SDAHOLD_A::_600NS, _ => unreachable!(), } } #[doc = "Checks if the value of the field is `DISABLE`"] #[inline(always)] pub fn is_disable(&self) -> bool { **self == SDAHOLD_A::DISABLE } #[doc = "Checks if the value of the field is `_75NS`"] #[inline(always)] pub fn is_75ns(&self) -> bool { **self == SDAHOLD_A::_75NS } #[doc = "Checks if the value of the field is `_450NS`"] #[inline(always)] pub fn is_450ns(&self) -> bool { **self == SDAHOLD_A::_450NS } #[doc = "Checks if the value of the field is `_600NS`"] #[inline(always)] pub fn is_600ns(&self) -> bool { **self == SDAHOLD_A::_600NS } } impl core::ops::Deref for SDAHOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SDAHOLD` writer - SDA Hold Time"] pub struct SDAHOLD_W<'a> { w: &'a mut W, } impl<'a> SDAHOLD_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SDAHOLD_A) -> &'a mut W { self.bits(variant.into()) } #[doc = "Disabled"] #[inline(always)] pub fn disable(self) -> &'a mut W { self.variant(SDAHOLD_A::DISABLE) } #[doc = "50-100ns hold time"] #[inline(always)] pub fn _75ns(self) -> &'a mut W { self.variant(SDAHOLD_A::_75NS) } #[doc = "300-600ns hold time"] #[inline(always)] pub fn _450ns(self) -> &'a mut W { self.variant(SDAHOLD_A::_450NS) } #[doc = "400-800ns hold time"] #[inline(always)] pub fn _600ns(self) -> &'a mut W { self.variant(SDAHOLD_A::_600NS) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `MEXTTOEN` reader - Master SCL Low Extend Timeout"] pub struct MEXTTOEN_R(crate::FieldReader); impl MEXTTOEN_R { pub(crate) fn new(bits: bool) -> Self { MEXTTOEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MEXTTOEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MEXTTOEN` writer - Master SCL Low Extend Timeout"] pub struct MEXTTOEN_W<'a> { w: &'a mut W, } impl<'a> MEXTTOEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `SEXTTOEN` reader - Slave SCL Low Extend Timeout"] pub struct SEXTTOEN_R(crate::FieldReader); impl SEXTTOEN_R { pub(crate) fn new(bits: bool) -> Self { SEXTTOEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEXTTOEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEXTTOEN` writer - Slave SCL Low Extend Timeout"] pub struct SEXTTOEN_W<'a> { w: &'a mut W, } impl<'a> SEXTTOEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Transfer Speed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] #[repr(u8)] pub enum SPEED_A { #[doc = "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm) Upto 400kHz "] STANDARD_AND_FAST_MODE = 0, #[doc = "1: Fast-mode Plus Upto 1MHz"] FASTPLUS_MODE = 1, #[doc = "2: High-speed mode Upto 3.4MHz"] HIGH_SPEED_MODE = 2, } impl From for u8 { #[inline(always)] fn from(variant: SPEED_A) -> Self { variant as _ } } #[doc = "Field `SPEED` reader - Transfer Speed"] pub struct SPEED_R(crate::FieldReader); impl SPEED_R { pub(crate) fn new(bits: u8) -> Self { SPEED_R(crate::FieldReader::new(bits)) } #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> Option { match self.bits { 0 => Some(SPEED_A::STANDARD_AND_FAST_MODE), 1 => Some(SPEED_A::FASTPLUS_MODE), 2 => Some(SPEED_A::HIGH_SPEED_MODE), _ => None, } } #[doc = "Checks if the value of the field is `STANDARD_AND_FAST_MODE`"] #[inline(always)] pub fn is_standard_and_fast_mode(&self) -> bool { **self == SPEED_A::STANDARD_AND_FAST_MODE } #[doc = "Checks if the value of the field is `FASTPLUS_MODE`"] #[inline(always)] pub fn is_fastplus_mode(&self) -> bool { **self == SPEED_A::FASTPLUS_MODE } #[doc = "Checks if the value of the field is `HIGH_SPEED_MODE`"] #[inline(always)] pub fn is_high_speed_mode(&self) -> bool { **self == SPEED_A::HIGH_SPEED_MODE } } impl core::ops::Deref for SPEED_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPEED` writer - Transfer Speed"] pub struct SPEED_W<'a> { w: &'a mut W, } impl<'a> SPEED_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SPEED_A) -> &'a mut W { unsafe { self.bits(variant.into()) } } #[doc = "Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm) Upto 400kHz"] #[inline(always)] pub fn standard_and_fast_mode(self) -> &'a mut W { self.variant(SPEED_A::STANDARD_AND_FAST_MODE) } #[doc = "Fast-mode Plus Upto 1MHz"] #[inline(always)] pub fn fastplus_mode(self) -> &'a mut W { self.variant(SPEED_A::FASTPLUS_MODE) } #[doc = "High-speed mode Upto 3.4MHz"] #[inline(always)] pub fn high_speed_mode(self) -> &'a mut W { self.variant(SPEED_A::HIGH_SPEED_MODE) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `SCLSM` reader - SCL Clock Stretch Mode"] pub struct SCLSM_R(crate::FieldReader); impl SCLSM_R { pub(crate) fn new(bits: bool) -> Self { SCLSM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SCLSM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SCLSM` writer - SCL Clock Stretch Mode"] pub struct SCLSM_W<'a> { w: &'a mut W, } impl<'a> SCLSM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Inactive Time-Out\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] #[repr(u8)] pub enum INACTOUT_A { #[doc = "0: Disabled"] DISABLE = 0, #[doc = "1: 5-6 SCL Time-Out(50-60us)"] _55US = 1, #[doc = "2: 10-11 SCL Time-Out(100-110us)"] _105US = 2, #[doc = "3: 20-21 SCL Time-Out(200-210us)"] _205US = 3, } impl From for u8 { #[inline(always)] fn from(variant: INACTOUT_A) -> Self { variant as _ } } #[doc = "Field `INACTOUT` reader - Inactive Time-Out"] pub struct INACTOUT_R(crate::FieldReader); impl INACTOUT_R { pub(crate) fn new(bits: u8) -> Self { INACTOUT_R(crate::FieldReader::new(bits)) } #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> INACTOUT_A { match self.bits { 0 => INACTOUT_A::DISABLE, 1 => INACTOUT_A::_55US, 2 => INACTOUT_A::_105US, 3 => INACTOUT_A::_205US, _ => unreachable!(), } } #[doc = "Checks if the value of the field is `DISABLE`"] #[inline(always)] pub fn is_disable(&self) -> bool { **self == INACTOUT_A::DISABLE } #[doc = "Checks if the value of the field is `_55US`"] #[inline(always)] pub fn is_55us(&self) -> bool { **self == INACTOUT_A::_55US } #[doc = "Checks if the value of the field is `_105US`"] #[inline(always)] pub fn is_105us(&self) -> bool { **self == INACTOUT_A::_105US } #[doc = "Checks if the value of the field is `_205US`"] #[inline(always)] pub fn is_205us(&self) -> bool { **self == INACTOUT_A::_205US } } impl core::ops::Deref for INACTOUT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INACTOUT` writer - Inactive Time-Out"] pub struct INACTOUT_W<'a> { w: &'a mut W, } impl<'a> INACTOUT_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: INACTOUT_A) -> &'a mut W { self.bits(variant.into()) } #[doc = "Disabled"] #[inline(always)] pub fn disable(self) -> &'a mut W { self.variant(INACTOUT_A::DISABLE) } #[doc = "5-6 SCL Time-Out(50-60us)"] #[inline(always)] pub fn _55us(self) -> &'a mut W { self.variant(INACTOUT_A::_55US) } #[doc = "10-11 SCL Time-Out(100-110us)"] #[inline(always)] pub fn _105us(self) -> &'a mut W { self.variant(INACTOUT_A::_105US) } #[doc = "20-21 SCL Time-Out(200-210us)"] #[inline(always)] pub fn _205us(self) -> &'a mut W { self.variant(INACTOUT_A::_205US) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `LOWTOUTEN` reader - SCL Low Timeout Enable"] pub struct LOWTOUTEN_R(crate::FieldReader); impl LOWTOUTEN_R { pub(crate) fn new(bits: bool) -> Self { LOWTOUTEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LOWTOUTEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LOWTOUTEN` writer - SCL Low Timeout Enable"] pub struct LOWTOUTEN_W<'a> { w: &'a mut W, } impl<'a> LOWTOUTEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } impl R { #[doc = "Bit 0 - Software Reset"] #[inline(always)] pub fn swrst(&self) -> SWRST_R { SWRST_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Enable"] #[inline(always)] pub fn enable(&self) -> ENABLE_R { ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bits 2:4 - Operating Mode"] #[inline(always)] pub fn mode(&self) -> MODE_R { MODE_R::new(((self.bits >> 2) & 0x07) as u8) } #[doc = "Bit 7 - Run in Standby"] #[inline(always)] pub fn runstdby(&self) -> RUNSTDBY_R { RUNSTDBY_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 16 - Pin Usage"] #[inline(always)] pub fn pinout(&self) -> PINOUT_R { PINOUT_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bits 20:21 - SDA Hold Time"] #[inline(always)] pub fn sdahold(&self) -> SDAHOLD_R { SDAHOLD_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bit 22 - Master SCL Low Extend Timeout"] #[inline(always)] pub fn mexttoen(&self) -> MEXTTOEN_R { MEXTTOEN_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 23 - Slave SCL Low Extend Timeout"] #[inline(always)] pub fn sexttoen(&self) -> SEXTTOEN_R { SEXTTOEN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bits 24:25 - Transfer Speed"] #[inline(always)] pub fn speed(&self) -> SPEED_R { SPEED_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bit 27 - SCL Clock Stretch Mode"] #[inline(always)] pub fn sclsm(&self) -> SCLSM_R { SCLSM_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bits 28:29 - Inactive Time-Out"] #[inline(always)] pub fn inactout(&self) -> INACTOUT_R { INACTOUT_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bit 30 - SCL Low Timeout Enable"] #[inline(always)] pub fn lowtouten(&self) -> LOWTOUTEN_R { LOWTOUTEN_R::new(((self.bits >> 30) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Software Reset"] #[inline(always)] pub fn swrst(&mut self) -> SWRST_W { SWRST_W { w: self } } #[doc = "Bit 1 - Enable"] #[inline(always)] pub fn enable(&mut self) -> ENABLE_W { ENABLE_W { w: self } } #[doc = "Bits 2:4 - Operating Mode"] #[inline(always)] pub fn mode(&mut self) -> MODE_W { MODE_W { w: self } } #[doc = "Bit 7 - Run in Standby"] #[inline(always)] pub fn runstdby(&mut self) -> RUNSTDBY_W { RUNSTDBY_W { w: self } } #[doc = "Bit 16 - Pin Usage"] #[inline(always)] pub fn pinout(&mut self) -> PINOUT_W { PINOUT_W { w: self } } #[doc = "Bits 20:21 - SDA Hold Time"] #[inline(always)] pub fn sdahold(&mut self) -> SDAHOLD_W { SDAHOLD_W { w: self } } #[doc = "Bit 22 - Master SCL Low Extend Timeout"] #[inline(always)] pub fn mexttoen(&mut self) -> MEXTTOEN_W { MEXTTOEN_W { w: self } } #[doc = "Bit 23 - Slave SCL Low Extend Timeout"] #[inline(always)] pub fn sexttoen(&mut self) -> SEXTTOEN_W { SEXTTOEN_W { w: self } } #[doc = "Bits 24:25 - Transfer Speed"] #[inline(always)] pub fn speed(&mut self) -> SPEED_W { SPEED_W { w: self } } #[doc = "Bit 27 - SCL Clock Stretch Mode"] #[inline(always)] pub fn sclsm(&mut self) -> SCLSM_W { SCLSM_W { w: self } } #[doc = "Bits 28:29 - Inactive Time-Out"] #[inline(always)] pub fn inactout(&mut self) -> INACTOUT_W { INACTOUT_W { w: self } } #[doc = "Bit 30 - SCL Low Timeout Enable"] #[inline(always)] pub fn lowtouten(&mut self) -> LOWTOUTEN_W { LOWTOUTEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "I2CM Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"] pub struct CTRLA_SPEC; impl crate::RegisterSpec for CTRLA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctrla::R](R) reader structure"] impl crate::Readable for CTRLA_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"] impl crate::Writable for CTRLA_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTRLA to value 0"] impl crate::Resettable for CTRLA_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } }