diff options
| author | Arne Dußin | 2021-11-06 11:50:33 +0100 |
|---|---|---|
| committer | Arne Dußin | 2021-11-06 11:50:33 +0100 |
| commit | 0666a6ba1dbd66cf8b93c113e362ccbcd99152a0 (patch) | |
| tree | a184284dbd2316f4624f092e4e7521ea8c90855b /src/dsu | |
| download | samc21-0666a6ba1dbd66cf8b93c113e362ccbcd99152a0.tar.gz samc21-0666a6ba1dbd66cf8b93c113e362ccbcd99152a0.zip | |
Initial commit
Diffstat (limited to 'src/dsu')
| -rw-r--r-- | src/dsu/addr.rs | 138 | ||||
| -rw-r--r-- | src/dsu/cid0.rs | 52 | ||||
| -rw-r--r-- | src/dsu/cid1.rs | 71 | ||||
| -rw-r--r-- | src/dsu/cid2.rs | 52 | ||||
| -rw-r--r-- | src/dsu/cid3.rs | 52 | ||||
| -rw-r--r-- | src/dsu/ctrl.rs | 207 | ||||
| -rw-r--r-- | src/dsu/data.rs | 102 | ||||
| -rw-r--r-- | src/dsu/dcc.rs | 103 | ||||
| -rw-r--r-- | src/dsu/dcfg.rs | 103 | ||||
| -rw-r--r-- | src/dsu/did.rs | 273 | ||||
| -rw-r--r-- | src/dsu/end.rs | 52 | ||||
| -rw-r--r-- | src/dsu/entry0.rs | 90 | ||||
| -rw-r--r-- | src/dsu/entry1.rs | 31 | ||||
| -rw-r--r-- | src/dsu/length.rs | 102 | ||||
| -rw-r--r-- | src/dsu/memtype.rs | 52 | ||||
| -rw-r--r-- | src/dsu/pid0.rs | 52 | ||||
| -rw-r--r-- | src/dsu/pid1.rs | 71 | ||||
| -rw-r--r-- | src/dsu/pid2.rs | 90 | ||||
| -rw-r--r-- | src/dsu/pid3.rs | 71 | ||||
| -rw-r--r-- | src/dsu/pid4.rs | 71 | ||||
| -rw-r--r-- | src/dsu/pid5.rs | 31 | ||||
| -rw-r--r-- | src/dsu/pid6.rs | 31 | ||||
| -rw-r--r-- | src/dsu/pid7.rs | 31 | ||||
| -rw-r--r-- | src/dsu/statusa.rs | 296 | ||||
| -rw-r--r-- | src/dsu/statusb.rs | 128 |
25 files changed, 2352 insertions, 0 deletions
diff --git a/src/dsu/addr.rs b/src/dsu/addr.rs new file mode 100644 index 0000000..0b008bc --- /dev/null +++ b/src/dsu/addr.rs @@ -0,0 +1,138 @@ +#[doc = "Register `ADDR` reader"] +pub struct R(crate::R<ADDR_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<ADDR_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<ADDR_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<ADDR_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `ADDR` writer"] +pub struct W(crate::W<ADDR_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<ADDR_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<ADDR_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<ADDR_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `AMOD` reader - Access Mode"] +pub struct AMOD_R(crate::FieldReader<u8, u8>); +impl AMOD_R { + pub(crate) fn new(bits: u8) -> Self { + AMOD_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for AMOD_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `AMOD` writer - Access Mode"] +pub struct AMOD_W<'a> { + w: &'a mut W, +} +impl<'a> AMOD_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); + self.w + } +} +#[doc = "Field `ADDR` reader - Address"] +pub struct ADDR_R(crate::FieldReader<u32, u32>); +impl ADDR_R { + pub(crate) fn new(bits: u32) -> Self { + ADDR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ADDR_R { + type Target = crate::FieldReader<u32, u32>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ADDR` writer - Address"] +pub struct ADDR_W<'a> { + w: &'a mut W, +} +impl<'a> ADDR_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u32) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x3fff_ffff << 2)) | ((value as u32 & 0x3fff_ffff) << 2); + self.w + } +} +impl R { + #[doc = "Bits 0:1 - Access Mode"] + #[inline(always)] + pub fn amod(&self) -> AMOD_R { + AMOD_R::new((self.bits & 0x03) as u8) + } + #[doc = "Bits 2:31 - Address"] + #[inline(always)] + pub fn addr(&self) -> ADDR_R { + ADDR_R::new(((self.bits >> 2) & 0x3fff_ffff) as u32) + } +} +impl W { + #[doc = "Bits 0:1 - Access Mode"] + #[inline(always)] + pub fn amod(&mut self) -> AMOD_W { + AMOD_W { w: self } + } + #[doc = "Bits 2:31 - Address"] + #[inline(always)] + pub fn addr(&mut self) -> ADDR_W { + ADDR_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addr](index.html) module"] +pub struct ADDR_SPEC; +impl crate::RegisterSpec for ADDR_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [addr::R](R) reader structure"] +impl crate::Readable for ADDR_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [addr::W](W) writer structure"] +impl crate::Writable for ADDR_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets ADDR to value 0"] +impl crate::Resettable for ADDR_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/cid0.rs b/src/dsu/cid0.rs new file mode 100644 index 0000000..e3c1f72 --- /dev/null +++ b/src/dsu/cid0.rs @@ -0,0 +1,52 @@ +#[doc = "Register `CID0` reader"] +pub struct R(crate::R<CID0_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CID0_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CID0_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CID0_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `PREAMBLEB0` reader - Preamble Byte 0"] +pub struct PREAMBLEB0_R(crate::FieldReader<u8, u8>); +impl PREAMBLEB0_R { + pub(crate) fn new(bits: u8) -> Self { + PREAMBLEB0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PREAMBLEB0_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:7 - Preamble Byte 0"] + #[inline(always)] + pub fn preambleb0(&self) -> PREAMBLEB0_R { + PREAMBLEB0_R::new((self.bits & 0xff) as u8) + } +} +#[doc = "Component Identification 0\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cid0](index.html) module"] +pub struct CID0_SPEC; +impl crate::RegisterSpec for CID0_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [cid0::R](R) reader structure"] +impl crate::Readable for CID0_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets CID0 to value 0x0d"] +impl crate::Resettable for CID0_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0x0d + } +} diff --git a/src/dsu/cid1.rs b/src/dsu/cid1.rs new file mode 100644 index 0000000..222843d --- /dev/null +++ b/src/dsu/cid1.rs @@ -0,0 +1,71 @@ +#[doc = "Register `CID1` reader"] +pub struct R(crate::R<CID1_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CID1_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CID1_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CID1_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `PREAMBLE` reader - Preamble"] +pub struct PREAMBLE_R(crate::FieldReader<u8, u8>); +impl PREAMBLE_R { + pub(crate) fn new(bits: u8) -> Self { + PREAMBLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PREAMBLE_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CCLASS` reader - Component Class"] +pub struct CCLASS_R(crate::FieldReader<u8, u8>); +impl CCLASS_R { + pub(crate) fn new(bits: u8) -> Self { + CCLASS_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CCLASS_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:3 - Preamble"] + #[inline(always)] + pub fn preamble(&self) -> PREAMBLE_R { + PREAMBLE_R::new((self.bits & 0x0f) as u8) + } + #[doc = "Bits 4:7 - Component Class"] + #[inline(always)] + pub fn cclass(&self) -> CCLASS_R { + CCLASS_R::new(((self.bits >> 4) & 0x0f) as u8) + } +} +#[doc = "Component Identification 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cid1](index.html) module"] +pub struct CID1_SPEC; +impl crate::RegisterSpec for CID1_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [cid1::R](R) reader structure"] +impl crate::Readable for CID1_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets CID1 to value 0x10"] +impl crate::Resettable for CID1_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0x10 + } +} diff --git a/src/dsu/cid2.rs b/src/dsu/cid2.rs new file mode 100644 index 0000000..50bd618 --- /dev/null +++ b/src/dsu/cid2.rs @@ -0,0 +1,52 @@ +#[doc = "Register `CID2` reader"] +pub struct R(crate::R<CID2_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CID2_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CID2_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CID2_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `PREAMBLEB2` reader - Preamble Byte 2"] +pub struct PREAMBLEB2_R(crate::FieldReader<u8, u8>); +impl PREAMBLEB2_R { + pub(crate) fn new(bits: u8) -> Self { + PREAMBLEB2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PREAMBLEB2_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:7 - Preamble Byte 2"] + #[inline(always)] + pub fn preambleb2(&self) -> PREAMBLEB2_R { + PREAMBLEB2_R::new((self.bits & 0xff) as u8) + } +} +#[doc = "Component Identification 2\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cid2](index.html) module"] +pub struct CID2_SPEC; +impl crate::RegisterSpec for CID2_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [cid2::R](R) reader structure"] +impl crate::Readable for CID2_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets CID2 to value 0x05"] +impl crate::Resettable for CID2_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0x05 + } +} diff --git a/src/dsu/cid3.rs b/src/dsu/cid3.rs new file mode 100644 index 0000000..0e152f4 --- /dev/null +++ b/src/dsu/cid3.rs @@ -0,0 +1,52 @@ +#[doc = "Register `CID3` reader"] +pub struct R(crate::R<CID3_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CID3_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CID3_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CID3_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `PREAMBLEB3` reader - Preamble Byte 3"] +pub struct PREAMBLEB3_R(crate::FieldReader<u8, u8>); +impl PREAMBLEB3_R { + pub(crate) fn new(bits: u8) -> Self { + PREAMBLEB3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PREAMBLEB3_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:7 - Preamble Byte 3"] + #[inline(always)] + pub fn preambleb3(&self) -> PREAMBLEB3_R { + PREAMBLEB3_R::new((self.bits & 0xff) as u8) + } +} +#[doc = "Component Identification 3\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cid3](index.html) module"] +pub struct CID3_SPEC; +impl crate::RegisterSpec for CID3_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [cid3::R](R) reader structure"] +impl crate::Readable for CID3_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets CID3 to value 0xb1"] +impl crate::Resettable for CID3_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0xb1 + } +} diff --git a/src/dsu/ctrl.rs b/src/dsu/ctrl.rs new file mode 100644 index 0000000..0a19db5 --- /dev/null +++ b/src/dsu/ctrl.rs @@ -0,0 +1,207 @@ +#[doc = "Register `CTRL` writer"] +pub struct W(crate::W<CTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<CTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<CTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<CTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `SWRST` writer - Software Reset"] +pub struct SWRST_W<'a> { + w: &'a mut W, +} +impl<'a> SWRST_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +#[doc = "Field `CRC` writer - 32-bit Cyclic Redundancy Code"] +pub struct CRC_W<'a> { + w: &'a mut W, +} +impl<'a> CRC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2); + self.w + } +} +#[doc = "Field `MBIST` writer - Memory built-in self-test"] +pub struct MBIST_W<'a> { + w: &'a mut W, +} +impl<'a> MBIST_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3); + self.w + } +} +#[doc = "Field `CE` writer - Chip-Erase"] +pub struct CE_W<'a> { + w: &'a mut W, +} +impl<'a> CE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4); + self.w + } +} +#[doc = "Field `ARR` writer - Auxiliary Row Read"] +pub struct ARR_W<'a> { + w: &'a mut W, +} +impl<'a> ARR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u8 & 0x01) << 6); + self.w + } +} +#[doc = "Field `SMSA` writer - Start Memory Stream Access"] +pub struct SMSA_W<'a> { + w: &'a mut W, +} +impl<'a> SMSA_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7); + self.w + } +} +impl W { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&mut self) -> SWRST_W { + SWRST_W { w: self } + } + #[doc = "Bit 2 - 32-bit Cyclic Redundancy Code"] + #[inline(always)] + pub fn crc(&mut self) -> CRC_W { + CRC_W { w: self } + } + #[doc = "Bit 3 - Memory built-in self-test"] + #[inline(always)] + pub fn mbist(&mut self) -> MBIST_W { + MBIST_W { w: self } + } + #[doc = "Bit 4 - Chip-Erase"] + #[inline(always)] + pub fn ce(&mut self) -> CE_W { + CE_W { w: self } + } + #[doc = "Bit 6 - Auxiliary Row Read"] + #[inline(always)] + pub fn arr(&mut self) -> ARR_W { + ARR_W { w: self } + } + #[doc = "Bit 7 - Start Memory Stream Access"] + #[inline(always)] + pub fn smsa(&mut self) -> SMSA_W { + SMSA_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Control\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"] +pub struct CTRL_SPEC; +impl crate::RegisterSpec for CTRL_SPEC { + type Ux = u8; +} +#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"] +impl crate::Writable for CTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CTRL to value 0"] +impl crate::Resettable for CTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/data.rs b/src/dsu/data.rs new file mode 100644 index 0000000..083149b --- /dev/null +++ b/src/dsu/data.rs @@ -0,0 +1,102 @@ +#[doc = "Register `DATA` reader"] +pub struct R(crate::R<DATA_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<DATA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<DATA_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<DATA_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `DATA` writer"] +pub struct W(crate::W<DATA_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<DATA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<DATA_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<DATA_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `DATA` reader - Data"] +pub struct DATA_R(crate::FieldReader<u32, u32>); +impl DATA_R { + pub(crate) fn new(bits: u32) -> Self { + DATA_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DATA_R { + type Target = crate::FieldReader<u32, u32>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DATA` writer - Data"] +pub struct DATA_W<'a> { + w: &'a mut W, +} +impl<'a> DATA_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u32) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff); + self.w + } +} +impl R { + #[doc = "Bits 0:31 - Data"] + #[inline(always)] + pub fn data(&self) -> DATA_R { + DATA_R::new((self.bits & 0xffff_ffff) as u32) + } +} +impl W { + #[doc = "Bits 0:31 - Data"] + #[inline(always)] + pub fn data(&mut self) -> DATA_W { + DATA_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Data\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"] +pub struct DATA_SPEC; +impl crate::RegisterSpec for DATA_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [data::R](R) reader structure"] +impl crate::Readable for DATA_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"] +impl crate::Writable for DATA_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets DATA to value 0"] +impl crate::Resettable for DATA_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/dcc.rs b/src/dsu/dcc.rs new file mode 100644 index 0000000..4dce67a --- /dev/null +++ b/src/dsu/dcc.rs @@ -0,0 +1,103 @@ +#[doc = "Register `DCC[%s]` reader"] +pub struct R(crate::R<DCC_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<DCC_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<DCC_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<DCC_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `DCC[%s]` writer"] +pub struct W(crate::W<DCC_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<DCC_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<DCC_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<DCC_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `DATA` reader - Data"] +pub struct DATA_R(crate::FieldReader<u32, u32>); +impl DATA_R { + pub(crate) fn new(bits: u32) -> Self { + DATA_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DATA_R { + type Target = crate::FieldReader<u32, u32>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DATA` writer - Data"] +pub struct DATA_W<'a> { + w: &'a mut W, +} +impl<'a> DATA_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u32) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff); + self.w + } +} +impl R { + #[doc = "Bits 0:31 - Data"] + #[inline(always)] + pub fn data(&self) -> DATA_R { + DATA_R::new((self.bits & 0xffff_ffff) as u32) + } +} +impl W { + #[doc = "Bits 0:31 - Data"] + #[inline(always)] + pub fn data(&mut self) -> DATA_W { + DATA_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Debug Communication Channel n\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcc](index.html) module"] +pub struct DCC_SPEC; +impl crate::RegisterSpec for DCC_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [dcc::R](R) reader structure"] +impl crate::Readable for DCC_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [dcc::W](W) writer structure"] +impl crate::Writable for DCC_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets DCC[%s] +to value 0"] +impl crate::Resettable for DCC_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/dcfg.rs b/src/dsu/dcfg.rs new file mode 100644 index 0000000..0b5efb3 --- /dev/null +++ b/src/dsu/dcfg.rs @@ -0,0 +1,103 @@ +#[doc = "Register `DCFG[%s]` reader"] +pub struct R(crate::R<DCFG_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<DCFG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<DCFG_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<DCFG_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `DCFG[%s]` writer"] +pub struct W(crate::W<DCFG_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<DCFG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<DCFG_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<DCFG_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `DCFG` reader - Device Configuration"] +pub struct DCFG_R(crate::FieldReader<u32, u32>); +impl DCFG_R { + pub(crate) fn new(bits: u32) -> Self { + DCFG_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DCFG_R { + type Target = crate::FieldReader<u32, u32>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DCFG` writer - Device Configuration"] +pub struct DCFG_W<'a> { + w: &'a mut W, +} +impl<'a> DCFG_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u32) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff); + self.w + } +} +impl R { + #[doc = "Bits 0:31 - Device Configuration"] + #[inline(always)] + pub fn dcfg(&self) -> DCFG_R { + DCFG_R::new((self.bits & 0xffff_ffff) as u32) + } +} +impl W { + #[doc = "Bits 0:31 - Device Configuration"] + #[inline(always)] + pub fn dcfg(&mut self) -> DCFG_W { + DCFG_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Device Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcfg](index.html) module"] +pub struct DCFG_SPEC; +impl crate::RegisterSpec for DCFG_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [dcfg::R](R) reader structure"] +impl crate::Readable for DCFG_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [dcfg::W](W) writer structure"] +impl crate::Writable for DCFG_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets DCFG[%s] +to value 0"] +impl crate::Resettable for DCFG_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/did.rs b/src/dsu/did.rs new file mode 100644 index 0000000..d279282 --- /dev/null +++ b/src/dsu/did.rs @@ -0,0 +1,273 @@ +#[doc = "Register `DID` reader"] +pub struct R(crate::R<DID_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<DID_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<DID_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<DID_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `DEVSEL` reader - Device Select"] +pub struct DEVSEL_R(crate::FieldReader<u8, u8>); +impl DEVSEL_R { + pub(crate) fn new(bits: u8) -> Self { + DEVSEL_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DEVSEL_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `REVISION` reader - Revision Number"] +pub struct REVISION_R(crate::FieldReader<u8, u8>); +impl REVISION_R { + pub(crate) fn new(bits: u8) -> Self { + REVISION_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for REVISION_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DIE` reader - Die Number"] +pub struct DIE_R(crate::FieldReader<u8, u8>); +impl DIE_R { + pub(crate) fn new(bits: u8) -> Self { + DIE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DIE_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Series\n\nValue on reset: 1"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SERIES_A { + #[doc = "0: Cortex-M0+ processor, basic feature set"] + _0 = 0, + #[doc = "1: Cortex-M0+ processor, USB"] + _1 = 1, +} +impl From<SERIES_A> for u8 { + #[inline(always)] + fn from(variant: SERIES_A) -> Self { + variant as _ + } +} +#[doc = "Field `SERIES` reader - Series"] +pub struct SERIES_R(crate::FieldReader<u8, SERIES_A>); +impl SERIES_R { + pub(crate) fn new(bits: u8) -> Self { + SERIES_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<SERIES_A> { + match self.bits { + 0 => Some(SERIES_A::_0), + 1 => Some(SERIES_A::_1), + _ => None, + } + } + #[doc = "Checks if the value of the field is `_0`"] + #[inline(always)] + pub fn is_0(&self) -> bool { + **self == SERIES_A::_0 + } + #[doc = "Checks if the value of the field is `_1`"] + #[inline(always)] + pub fn is_1(&self) -> bool { + **self == SERIES_A::_1 + } +} +impl core::ops::Deref for SERIES_R { + type Target = crate::FieldReader<u8, SERIES_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Family\n\nValue on reset: 2"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum FAMILY_A { + #[doc = "0: General purpose microcontroller"] + _0 = 0, + #[doc = "1: PicoPower"] + _1 = 1, + #[doc = "2: 5V Industrial"] + _2 = 2, +} +impl From<FAMILY_A> for u8 { + #[inline(always)] + fn from(variant: FAMILY_A) -> Self { + variant as _ + } +} +#[doc = "Field `FAMILY` reader - Family"] +pub struct FAMILY_R(crate::FieldReader<u8, FAMILY_A>); +impl FAMILY_R { + pub(crate) fn new(bits: u8) -> Self { + FAMILY_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<FAMILY_A> { + match self.bits { + 0 => Some(FAMILY_A::_0), + 1 => Some(FAMILY_A::_1), + 2 => Some(FAMILY_A::_2), + _ => None, + } + } + #[doc = "Checks if the value of the field is `_0`"] + #[inline(always)] + pub fn is_0(&self) -> bool { + **self == FAMILY_A::_0 + } + #[doc = "Checks if the value of the field is `_1`"] + #[inline(always)] + pub fn is_1(&self) -> bool { + **self == FAMILY_A::_1 + } + #[doc = "Checks if the value of the field is `_2`"] + #[inline(always)] + pub fn is_2(&self) -> bool { + **self == FAMILY_A::_2 + } +} +impl core::ops::Deref for FAMILY_R { + type Target = crate::FieldReader<u8, FAMILY_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Processor\n\nValue on reset: 1"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum PROCESSOR_A { + #[doc = "0: Cortex-M0"] + _0 = 0, + #[doc = "1: Cortex-M0+"] + _1 = 1, + #[doc = "2: Cortex-M3"] + _2 = 2, + #[doc = "3: Cortex-M4"] + _3 = 3, +} +impl From<PROCESSOR_A> for u8 { + #[inline(always)] + fn from(variant: PROCESSOR_A) -> Self { + variant as _ + } +} +#[doc = "Field `PROCESSOR` reader - Processor"] +pub struct PROCESSOR_R(crate::FieldReader<u8, PROCESSOR_A>); +impl PROCESSOR_R { + pub(crate) fn new(bits: u8) -> Self { + PROCESSOR_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<PROCESSOR_A> { + match self.bits { + 0 => Some(PROCESSOR_A::_0), + 1 => Some(PROCESSOR_A::_1), + 2 => Some(PROCESSOR_A::_2), + 3 => Some(PROCESSOR_A::_3), + _ => None, + } + } + #[doc = "Checks if the value of the field is `_0`"] + #[inline(always)] + pub fn is_0(&self) -> bool { + **self == PROCESSOR_A::_0 + } + #[doc = "Checks if the value of the field is `_1`"] + #[inline(always)] + pub fn is_1(&self) -> bool { + **self == PROCESSOR_A::_1 + } + #[doc = "Checks if the value of the field is `_2`"] + #[inline(always)] + pub fn is_2(&self) -> bool { + **self == PROCESSOR_A::_2 + } + #[doc = "Checks if the value of the field is `_3`"] + #[inline(always)] + pub fn is_3(&self) -> bool { + **self == PROCESSOR_A::_3 + } +} +impl core::ops::Deref for PROCESSOR_R { + type Target = crate::FieldReader<u8, PROCESSOR_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:7 - Device Select"] + #[inline(always)] + pub fn devsel(&self) -> DEVSEL_R { + DEVSEL_R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:11 - Revision Number"] + #[inline(always)] + pub fn revision(&self) -> REVISION_R { + REVISION_R::new(((self.bits >> 8) & 0x0f) as u8) + } + #[doc = "Bits 12:15 - Die Number"] + #[inline(always)] + pub fn die(&self) -> DIE_R { + DIE_R::new(((self.bits >> 12) & 0x0f) as u8) + } + #[doc = "Bits 16:21 - Series"] + #[inline(always)] + pub fn series(&self) -> SERIES_R { + SERIES_R::new(((self.bits >> 16) & 0x3f) as u8) + } + #[doc = "Bits 23:27 - Family"] + #[inline(always)] + pub fn family(&self) -> FAMILY_R { + FAMILY_R::new(((self.bits >> 23) & 0x1f) as u8) + } + #[doc = "Bits 28:31 - Processor"] + #[inline(always)] + pub fn processor(&self) -> PROCESSOR_R { + PROCESSOR_R::new(((self.bits >> 28) & 0x0f) as u8) + } +} +#[doc = "Device Identification\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [did](index.html) module"] +pub struct DID_SPEC; +impl crate::RegisterSpec for DID_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [did::R](R) reader structure"] +impl crate::Readable for DID_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets DID to value 0x1101_1420"] +impl crate::Resettable for DID_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0x1101_1420 + } +} diff --git a/src/dsu/end.rs b/src/dsu/end.rs new file mode 100644 index 0000000..d9dd475 --- /dev/null +++ b/src/dsu/end.rs @@ -0,0 +1,52 @@ +#[doc = "Register `END` reader"] +pub struct R(crate::R<END_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<END_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<END_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<END_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `END` reader - End Marker"] +pub struct END_R(crate::FieldReader<u32, u32>); +impl END_R { + pub(crate) fn new(bits: u32) -> Self { + END_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for END_R { + type Target = crate::FieldReader<u32, u32>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:31 - End Marker"] + #[inline(always)] + pub fn end(&self) -> END_R { + END_R::new((self.bits & 0xffff_ffff) as u32) + } +} +#[doc = "CoreSight ROM Table End\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [end](index.html) module"] +pub struct END_SPEC; +impl crate::RegisterSpec for END_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [end::R](R) reader structure"] +impl crate::Readable for END_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets END to value 0"] +impl crate::Resettable for END_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/entry0.rs b/src/dsu/entry0.rs new file mode 100644 index 0000000..37db7e4 --- /dev/null +++ b/src/dsu/entry0.rs @@ -0,0 +1,90 @@ +#[doc = "Register `ENTRY0` reader"] +pub struct R(crate::R<ENTRY0_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<ENTRY0_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<ENTRY0_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<ENTRY0_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `EPRES` reader - Entry Present"] +pub struct EPRES_R(crate::FieldReader<bool, bool>); +impl EPRES_R { + pub(crate) fn new(bits: bool) -> Self { + EPRES_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for EPRES_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FMT` reader - Format"] +pub struct FMT_R(crate::FieldReader<bool, bool>); +impl FMT_R { + pub(crate) fn new(bits: bool) -> Self { + FMT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FMT_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ADDOFF` reader - Address Offset"] +pub struct ADDOFF_R(crate::FieldReader<u32, u32>); +impl ADDOFF_R { + pub(crate) fn new(bits: u32) -> Self { + ADDOFF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ADDOFF_R { + type Target = crate::FieldReader<u32, u32>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bit 0 - Entry Present"] + #[inline(always)] + pub fn epres(&self) -> EPRES_R { + EPRES_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Format"] + #[inline(always)] + pub fn fmt(&self) -> FMT_R { + FMT_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bits 12:31 - Address Offset"] + #[inline(always)] + pub fn addoff(&self) -> ADDOFF_R { + ADDOFF_R::new(((self.bits >> 12) & 0x000f_ffff) as u32) + } +} +#[doc = "CoreSight ROM Table Entry 0\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [entry0](index.html) module"] +pub struct ENTRY0_SPEC; +impl crate::RegisterSpec for ENTRY0_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [entry0::R](R) reader structure"] +impl crate::Readable for ENTRY0_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets ENTRY0 to value 0x9f0f_c002"] +impl crate::Resettable for ENTRY0_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0x9f0f_c002 + } +} diff --git a/src/dsu/entry1.rs b/src/dsu/entry1.rs new file mode 100644 index 0000000..cec8fa3 --- /dev/null +++ b/src/dsu/entry1.rs @@ -0,0 +1,31 @@ +#[doc = "Register `ENTRY1` reader"] +pub struct R(crate::R<ENTRY1_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<ENTRY1_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<ENTRY1_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<ENTRY1_SPEC>) -> Self { + R(reader) + } +} +#[doc = "CoreSight ROM Table Entry 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [entry1](index.html) module"] +pub struct ENTRY1_SPEC; +impl crate::RegisterSpec for ENTRY1_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [entry1::R](R) reader structure"] +impl crate::Readable for ENTRY1_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets ENTRY1 to value 0x5002"] +impl crate::Resettable for ENTRY1_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0x5002 + } +} diff --git a/src/dsu/length.rs b/src/dsu/length.rs new file mode 100644 index 0000000..58078c3 --- /dev/null +++ b/src/dsu/length.rs @@ -0,0 +1,102 @@ +#[doc = "Register `LENGTH` reader"] +pub struct R(crate::R<LENGTH_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<LENGTH_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<LENGTH_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<LENGTH_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `LENGTH` writer"] +pub struct W(crate::W<LENGTH_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<LENGTH_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<LENGTH_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<LENGTH_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `LENGTH` reader - Length"] +pub struct LENGTH_R(crate::FieldReader<u32, u32>); +impl LENGTH_R { + pub(crate) fn new(bits: u32) -> Self { + LENGTH_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for LENGTH_R { + type Target = crate::FieldReader<u32, u32>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `LENGTH` writer - Length"] +pub struct LENGTH_W<'a> { + w: &'a mut W, +} +impl<'a> LENGTH_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u32) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x3fff_ffff << 2)) | ((value as u32 & 0x3fff_ffff) << 2); + self.w + } +} +impl R { + #[doc = "Bits 2:31 - Length"] + #[inline(always)] + pub fn length(&self) -> LENGTH_R { + LENGTH_R::new(((self.bits >> 2) & 0x3fff_ffff) as u32) + } +} +impl W { + #[doc = "Bits 2:31 - Length"] + #[inline(always)] + pub fn length(&mut self) -> LENGTH_W { + LENGTH_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [length](index.html) module"] +pub struct LENGTH_SPEC; +impl crate::RegisterSpec for LENGTH_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [length::R](R) reader structure"] +impl crate::Readable for LENGTH_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [length::W](W) writer structure"] +impl crate::Writable for LENGTH_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets LENGTH to value 0"] +impl crate::Resettable for LENGTH_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/memtype.rs b/src/dsu/memtype.rs new file mode 100644 index 0000000..6a360d3 --- /dev/null +++ b/src/dsu/memtype.rs @@ -0,0 +1,52 @@ +#[doc = "Register `MEMTYPE` reader"] +pub struct R(crate::R<MEMTYPE_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<MEMTYPE_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<MEMTYPE_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<MEMTYPE_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `SMEMP` reader - System Memory Present"] +pub struct SMEMP_R(crate::FieldReader<bool, bool>); +impl SMEMP_R { + pub(crate) fn new(bits: bool) -> Self { + SMEMP_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SMEMP_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bit 0 - System Memory Present"] + #[inline(always)] + pub fn smemp(&self) -> SMEMP_R { + SMEMP_R::new((self.bits & 0x01) != 0) + } +} +#[doc = "CoreSight ROM Table Memory Type\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [memtype](index.html) module"] +pub struct MEMTYPE_SPEC; +impl crate::RegisterSpec for MEMTYPE_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [memtype::R](R) reader structure"] +impl crate::Readable for MEMTYPE_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets MEMTYPE to value 0"] +impl crate::Resettable for MEMTYPE_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/pid0.rs b/src/dsu/pid0.rs new file mode 100644 index 0000000..9c9cb1d --- /dev/null +++ b/src/dsu/pid0.rs @@ -0,0 +1,52 @@ +#[doc = "Register `PID0` reader"] +pub struct R(crate::R<PID0_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<PID0_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<PID0_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<PID0_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `PARTNBL` reader - Part Number Low"] +pub struct PARTNBL_R(crate::FieldReader<u8, u8>); +impl PARTNBL_R { + pub(crate) fn new(bits: u8) -> Self { + PARTNBL_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PARTNBL_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:7 - Part Number Low"] + #[inline(always)] + pub fn partnbl(&self) -> PARTNBL_R { + PARTNBL_R::new((self.bits & 0xff) as u8) + } +} +#[doc = "Peripheral Identification 0\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pid0](index.html) module"] +pub struct PID0_SPEC; +impl crate::RegisterSpec for PID0_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [pid0::R](R) reader structure"] +impl crate::Readable for PID0_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets PID0 to value 0xd0"] +impl crate::Resettable for PID0_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0xd0 + } +} diff --git a/src/dsu/pid1.rs b/src/dsu/pid1.rs new file mode 100644 index 0000000..20be906 --- /dev/null +++ b/src/dsu/pid1.rs @@ -0,0 +1,71 @@ +#[doc = "Register `PID1` reader"] +pub struct R(crate::R<PID1_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<PID1_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<PID1_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<PID1_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `PARTNBH` reader - Part Number High"] +pub struct PARTNBH_R(crate::FieldReader<u8, u8>); +impl PARTNBH_R { + pub(crate) fn new(bits: u8) -> Self { + PARTNBH_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PARTNBH_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `JEPIDCL` reader - Low part of the JEP-106 Identity Code"] +pub struct JEPIDCL_R(crate::FieldReader<u8, u8>); +impl JEPIDCL_R { + pub(crate) fn new(bits: u8) -> Self { + JEPIDCL_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for JEPIDCL_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:3 - Part Number High"] + #[inline(always)] + pub fn partnbh(&self) -> PARTNBH_R { + PARTNBH_R::new((self.bits & 0x0f) as u8) + } + #[doc = "Bits 4:7 - Low part of the JEP-106 Identity Code"] + #[inline(always)] + pub fn jepidcl(&self) -> JEPIDCL_R { + JEPIDCL_R::new(((self.bits >> 4) & 0x0f) as u8) + } +} +#[doc = "Peripheral Identification 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pid1](index.html) module"] +pub struct PID1_SPEC; +impl crate::RegisterSpec for PID1_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [pid1::R](R) reader structure"] +impl crate::Readable for PID1_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets PID1 to value 0xfc"] +impl crate::Resettable for PID1_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0xfc + } +} diff --git a/src/dsu/pid2.rs b/src/dsu/pid2.rs new file mode 100644 index 0000000..37149ab --- /dev/null +++ b/src/dsu/pid2.rs @@ -0,0 +1,90 @@ +#[doc = "Register `PID2` reader"] +pub struct R(crate::R<PID2_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<PID2_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<PID2_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<PID2_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `JEPIDCH` reader - JEP-106 Identity Code High"] +pub struct JEPIDCH_R(crate::FieldReader<u8, u8>); +impl JEPIDCH_R { + pub(crate) fn new(bits: u8) -> Self { + JEPIDCH_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for JEPIDCH_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `JEPU` reader - JEP-106 Identity Code is used"] +pub struct JEPU_R(crate::FieldReader<bool, bool>); +impl JEPU_R { + pub(crate) fn new(bits: bool) -> Self { + JEPU_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for JEPU_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `REVISION` reader - Revision Number"] +pub struct REVISION_R(crate::FieldReader<u8, u8>); +impl REVISION_R { + pub(crate) fn new(bits: u8) -> Self { + REVISION_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for REVISION_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:2 - JEP-106 Identity Code High"] + #[inline(always)] + pub fn jepidch(&self) -> JEPIDCH_R { + JEPIDCH_R::new((self.bits & 0x07) as u8) + } + #[doc = "Bit 3 - JEP-106 Identity Code is used"] + #[inline(always)] + pub fn jepu(&self) -> JEPU_R { + JEPU_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bits 4:7 - Revision Number"] + #[inline(always)] + pub fn revision(&self) -> REVISION_R { + REVISION_R::new(((self.bits >> 4) & 0x0f) as u8) + } +} +#[doc = "Peripheral Identification 2\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pid2](index.html) module"] +pub struct PID2_SPEC; +impl crate::RegisterSpec for PID2_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [pid2::R](R) reader structure"] +impl crate::Readable for PID2_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets PID2 to value 0x09"] +impl crate::Resettable for PID2_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0x09 + } +} diff --git a/src/dsu/pid3.rs b/src/dsu/pid3.rs new file mode 100644 index 0000000..5513d72 --- /dev/null +++ b/src/dsu/pid3.rs @@ -0,0 +1,71 @@ +#[doc = "Register `PID3` reader"] +pub struct R(crate::R<PID3_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<PID3_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<PID3_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<PID3_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `CUSMOD` reader - ARM CUSMOD"] +pub struct CUSMOD_R(crate::FieldReader<u8, u8>); +impl CUSMOD_R { + pub(crate) fn new(bits: u8) -> Self { + CUSMOD_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CUSMOD_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `REVAND` reader - Revision Number"] +pub struct REVAND_R(crate::FieldReader<u8, u8>); +impl REVAND_R { + pub(crate) fn new(bits: u8) -> Self { + REVAND_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for REVAND_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:3 - ARM CUSMOD"] + #[inline(always)] + pub fn cusmod(&self) -> CUSMOD_R { + CUSMOD_R::new((self.bits & 0x0f) as u8) + } + #[doc = "Bits 4:7 - Revision Number"] + #[inline(always)] + pub fn revand(&self) -> REVAND_R { + REVAND_R::new(((self.bits >> 4) & 0x0f) as u8) + } +} +#[doc = "Peripheral Identification 3\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pid3](index.html) module"] +pub struct PID3_SPEC; +impl crate::RegisterSpec for PID3_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [pid3::R](R) reader structure"] +impl crate::Readable for PID3_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets PID3 to value 0"] +impl crate::Resettable for PID3_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/pid4.rs b/src/dsu/pid4.rs new file mode 100644 index 0000000..be1aa63 --- /dev/null +++ b/src/dsu/pid4.rs @@ -0,0 +1,71 @@ +#[doc = "Register `PID4` reader"] +pub struct R(crate::R<PID4_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<PID4_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<PID4_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<PID4_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `JEPCC` reader - JEP-106 Continuation Code"] +pub struct JEPCC_R(crate::FieldReader<u8, u8>); +impl JEPCC_R { + pub(crate) fn new(bits: u8) -> Self { + JEPCC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for JEPCC_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FKBC` reader - 4KB count"] +pub struct FKBC_R(crate::FieldReader<u8, u8>); +impl FKBC_R { + pub(crate) fn new(bits: u8) -> Self { + FKBC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FKBC_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:3 - JEP-106 Continuation Code"] + #[inline(always)] + pub fn jepcc(&self) -> JEPCC_R { + JEPCC_R::new((self.bits & 0x0f) as u8) + } + #[doc = "Bits 4:7 - 4KB count"] + #[inline(always)] + pub fn fkbc(&self) -> FKBC_R { + FKBC_R::new(((self.bits >> 4) & 0x0f) as u8) + } +} +#[doc = "Peripheral Identification 4\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pid4](index.html) module"] +pub struct PID4_SPEC; +impl crate::RegisterSpec for PID4_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [pid4::R](R) reader structure"] +impl crate::Readable for PID4_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets PID4 to value 0"] +impl crate::Resettable for PID4_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/pid5.rs b/src/dsu/pid5.rs new file mode 100644 index 0000000..d343d48 --- /dev/null +++ b/src/dsu/pid5.rs @@ -0,0 +1,31 @@ +#[doc = "Register `PID5` reader"] +pub struct R(crate::R<PID5_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<PID5_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<PID5_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<PID5_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Peripheral Identification 5\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pid5](index.html) module"] +pub struct PID5_SPEC; +impl crate::RegisterSpec for PID5_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [pid5::R](R) reader structure"] +impl crate::Readable for PID5_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets PID5 to value 0"] +impl crate::Resettable for PID5_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/pid6.rs b/src/dsu/pid6.rs new file mode 100644 index 0000000..55cc2b8 --- /dev/null +++ b/src/dsu/pid6.rs @@ -0,0 +1,31 @@ +#[doc = "Register `PID6` reader"] +pub struct R(crate::R<PID6_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<PID6_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<PID6_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<PID6_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Peripheral Identification 6\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pid6](index.html) module"] +pub struct PID6_SPEC; +impl crate::RegisterSpec for PID6_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [pid6::R](R) reader structure"] +impl crate::Readable for PID6_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets PID6 to value 0"] +impl crate::Resettable for PID6_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/pid7.rs b/src/dsu/pid7.rs new file mode 100644 index 0000000..77664d4 --- /dev/null +++ b/src/dsu/pid7.rs @@ -0,0 +1,31 @@ +#[doc = "Register `PID7` reader"] +pub struct R(crate::R<PID7_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<PID7_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<PID7_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<PID7_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Peripheral Identification 7\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pid7](index.html) module"] +pub struct PID7_SPEC; +impl crate::RegisterSpec for PID7_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [pid7::R](R) reader structure"] +impl crate::Readable for PID7_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets PID7 to value 0"] +impl crate::Resettable for PID7_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/statusa.rs b/src/dsu/statusa.rs new file mode 100644 index 0000000..2dcf8f6 --- /dev/null +++ b/src/dsu/statusa.rs @@ -0,0 +1,296 @@ +#[doc = "Register `STATUSA` reader"] +pub struct R(crate::R<STATUSA_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<STATUSA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<STATUSA_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<STATUSA_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `STATUSA` writer"] +pub struct W(crate::W<STATUSA_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<STATUSA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<STATUSA_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<STATUSA_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `DONE` reader - Done"] +pub struct DONE_R(crate::FieldReader<bool, bool>); +impl DONE_R { + pub(crate) fn new(bits: bool) -> Self { + DONE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DONE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DONE` writer - Done"] +pub struct DONE_W<'a> { + w: &'a mut W, +} +impl<'a> DONE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +#[doc = "Field `CRSTEXT` reader - CPU Reset Phase Extension"] +pub struct CRSTEXT_R(crate::FieldReader<bool, bool>); +impl CRSTEXT_R { + pub(crate) fn new(bits: bool) -> Self { + CRSTEXT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CRSTEXT_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CRSTEXT` writer - CPU Reset Phase Extension"] +pub struct CRSTEXT_W<'a> { + w: &'a mut W, +} +impl<'a> CRSTEXT_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1); + self.w + } +} +#[doc = "Field `BERR` reader - Bus Error"] +pub struct BERR_R(crate::FieldReader<bool, bool>); +impl BERR_R { + pub(crate) fn new(bits: bool) -> Self { + BERR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for BERR_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `BERR` writer - Bus Error"] +pub struct BERR_W<'a> { + w: &'a mut W, +} +impl<'a> BERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2); + self.w + } +} +#[doc = "Field `FAIL` reader - Failure"] +pub struct FAIL_R(crate::FieldReader<bool, bool>); +impl FAIL_R { + pub(crate) fn new(bits: bool) -> Self { + FAIL_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FAIL_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FAIL` writer - Failure"] +pub struct FAIL_W<'a> { + w: &'a mut W, +} +impl<'a> FAIL_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3); + self.w + } +} +#[doc = "Field `PERR` reader - Protection Error"] +pub struct PERR_R(crate::FieldReader<bool, bool>); +impl PERR_R { + pub(crate) fn new(bits: bool) -> Self { + PERR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PERR_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PERR` writer - Protection Error"] +pub struct PERR_W<'a> { + w: &'a mut W, +} +impl<'a> PERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4); + self.w + } +} +impl R { + #[doc = "Bit 0 - Done"] + #[inline(always)] + pub fn done(&self) -> DONE_R { + DONE_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - CPU Reset Phase Extension"] + #[inline(always)] + pub fn crstext(&self) -> CRSTEXT_R { + CRSTEXT_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Bus Error"] + #[inline(always)] + pub fn berr(&self) -> BERR_R { + BERR_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Failure"] + #[inline(always)] + pub fn fail(&self) -> FAIL_R { + FAIL_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Protection Error"] + #[inline(always)] + pub fn perr(&self) -> PERR_R { + PERR_R::new(((self.bits >> 4) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Done"] + #[inline(always)] + pub fn done(&mut self) -> DONE_W { + DONE_W { w: self } + } + #[doc = "Bit 1 - CPU Reset Phase Extension"] + #[inline(always)] + pub fn crstext(&mut self) -> CRSTEXT_W { + CRSTEXT_W { w: self } + } + #[doc = "Bit 2 - Bus Error"] + #[inline(always)] + pub fn berr(&mut self) -> BERR_W { + BERR_W { w: self } + } + #[doc = "Bit 3 - Failure"] + #[inline(always)] + pub fn fail(&mut self) -> FAIL_W { + FAIL_W { w: self } + } + #[doc = "Bit 4 - Protection Error"] + #[inline(always)] + pub fn perr(&mut self) -> PERR_W { + PERR_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Status A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [statusa](index.html) module"] +pub struct STATUSA_SPEC; +impl crate::RegisterSpec for STATUSA_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [statusa::R](R) reader structure"] +impl crate::Readable for STATUSA_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [statusa::W](W) writer structure"] +impl crate::Writable for STATUSA_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets STATUSA to value 0"] +impl crate::Resettable for STATUSA_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/dsu/statusb.rs b/src/dsu/statusb.rs new file mode 100644 index 0000000..5c95d62 --- /dev/null +++ b/src/dsu/statusb.rs @@ -0,0 +1,128 @@ +#[doc = "Register `STATUSB` reader"] +pub struct R(crate::R<STATUSB_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<STATUSB_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<STATUSB_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<STATUSB_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `PROT` reader - Protected"] +pub struct PROT_R(crate::FieldReader<bool, bool>); +impl PROT_R { + pub(crate) fn new(bits: bool) -> Self { + PROT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PROT_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DBGPRES` reader - Debugger Present"] +pub struct DBGPRES_R(crate::FieldReader<bool, bool>); +impl DBGPRES_R { + pub(crate) fn new(bits: bool) -> Self { + DBGPRES_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DBGPRES_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DCCD0` reader - Debug Communication Channel 0 Dirty"] +pub struct DCCD0_R(crate::FieldReader<bool, bool>); +impl DCCD0_R { + pub(crate) fn new(bits: bool) -> Self { + DCCD0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DCCD0_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DCCD1` reader - Debug Communication Channel 1 Dirty"] +pub struct DCCD1_R(crate::FieldReader<bool, bool>); +impl DCCD1_R { + pub(crate) fn new(bits: bool) -> Self { + DCCD1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DCCD1_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `HPE` reader - Hot-Plugging Enable"] +pub struct HPE_R(crate::FieldReader<bool, bool>); +impl HPE_R { + pub(crate) fn new(bits: bool) -> Self { + HPE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for HPE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bit 0 - Protected"] + #[inline(always)] + pub fn prot(&self) -> PROT_R { + PROT_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Debugger Present"] + #[inline(always)] + pub fn dbgpres(&self) -> DBGPRES_R { + DBGPRES_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Debug Communication Channel 0 Dirty"] + #[inline(always)] + pub fn dccd0(&self) -> DCCD0_R { + DCCD0_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Debug Communication Channel 1 Dirty"] + #[inline(always)] + pub fn dccd1(&self) -> DCCD1_R { + DCCD1_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Hot-Plugging Enable"] + #[inline(always)] + pub fn hpe(&self) -> HPE_R { + HPE_R::new(((self.bits >> 4) & 0x01) != 0) + } +} +#[doc = "Status B\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [statusb](index.html) module"] +pub struct STATUSB_SPEC; +impl crate::RegisterSpec for STATUSB_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [statusb::R](R) reader structure"] +impl crate::Readable for STATUSB_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets STATUSB to value 0"] +impl crate::Resettable for STATUSB_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} |
