Initial commit

1 files changed, 609 insertions, 0 deletions

diff --git a/src/rtc/mode2/ctrla.rs b/src/rtc/mode2/ctrla.rs
new file mode 100644
index 0000000..2f1557a
--- /dev/null
+++ b/src/rtc/mode2/ctrla.rs
@@ -0,0 +1,609 @@
+#[doc = "Register `CTRLA` reader"]
+pub struct R(crate::R<CTRLA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLA` writer"]
+pub struct W(crate::W<CTRLA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SWRST` writer - Software Reset"]
+pub struct SWRST_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SWRST_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Operating Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum MODE_A {
+    #[doc = "0: Mode 0: 32-bit Counter"]
+    COUNT32 = 0,
+    #[doc = "1: Mode 1: 16-bit Counter"]
+    COUNT16 = 1,
+    #[doc = "2: Mode 2: Clock/Calendar"]
+    CLOCK = 2,
+}
+impl From<MODE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: MODE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `MODE` reader - Operating Mode"]
+pub struct MODE_R(crate::FieldReader<u8, MODE_A>);
+impl MODE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        MODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<MODE_A> {
+        match self.bits {
+            0 => Some(MODE_A::COUNT32),
+            1 => Some(MODE_A::COUNT16),
+            2 => Some(MODE_A::CLOCK),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `COUNT32`"]
+    #[inline(always)]
+    pub fn is_count32(&self) -> bool {
+        **self == MODE_A::COUNT32
+    }
+    #[doc = "Checks if the value of the field is `COUNT16`"]
+    #[inline(always)]
+    pub fn is_count16(&self) -> bool {
+        **self == MODE_A::COUNT16
+    }
+    #[doc = "Checks if the value of the field is `CLOCK`"]
+    #[inline(always)]
+    pub fn is_clock(&self) -> bool {
+        **self == MODE_A::CLOCK
+    }
+}
+impl core::ops::Deref for MODE_R {
+    type Target = crate::FieldReader<u8, MODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MODE` writer - Operating Mode"]
+pub struct MODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: MODE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "Mode 0: 32-bit Counter"]
+    #[inline(always)]
+    pub fn count32(self) -> &'a mut W {
+        self.variant(MODE_A::COUNT32)
+    }
+    #[doc = "Mode 1: 16-bit Counter"]
+    #[inline(always)]
+    pub fn count16(self) -> &'a mut W {
+        self.variant(MODE_A::COUNT16)
+    }
+    #[doc = "Mode 2: Clock/Calendar"]
+    #[inline(always)]
+    pub fn clock(self) -> &'a mut W {
+        self.variant(MODE_A::CLOCK)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u16 & 0x03) << 2);
+        self.w
+    }
+}
+#[doc = "Field `CLKREP` reader - Clock Representation"]
+pub struct CLKREP_R(crate::FieldReader<bool, bool>);
+impl CLKREP_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CLKREP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CLKREP_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CLKREP` writer - Clock Representation"]
+pub struct CLKREP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CLKREP_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6);
+        self.w
+    }
+}
+#[doc = "Field `MATCHCLR` reader - Clear on Match"]
+pub struct MATCHCLR_R(crate::FieldReader<bool, bool>);
+impl MATCHCLR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        MATCHCLR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MATCHCLR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MATCHCLR` writer - Clear on Match"]
+pub struct MATCHCLR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MATCHCLR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7);
+        self.w
+    }
+}
+#[doc = "Prescaler\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum PRESCALER_A {
+    #[doc = "0: CLK_RTC_CNT = GCLK_RTC/1"]
+    OFF = 0,
+    #[doc = "1: CLK_RTC_CNT = GCLK_RTC/1"]
+    DIV1 = 1,
+    #[doc = "2: CLK_RTC_CNT = GCLK_RTC/2"]
+    DIV2 = 2,
+    #[doc = "3: CLK_RTC_CNT = GCLK_RTC/4"]
+    DIV4 = 3,
+    #[doc = "4: CLK_RTC_CNT = GCLK_RTC/8"]
+    DIV8 = 4,
+    #[doc = "5: CLK_RTC_CNT = GCLK_RTC/16"]
+    DIV16 = 5,
+    #[doc = "6: CLK_RTC_CNT = GCLK_RTC/32"]
+    DIV32 = 6,
+    #[doc = "7: CLK_RTC_CNT = GCLK_RTC/64"]
+    DIV64 = 7,
+    #[doc = "8: CLK_RTC_CNT = GCLK_RTC/128"]
+    DIV128 = 8,
+    #[doc = "9: CLK_RTC_CNT = GCLK_RTC/256"]
+    DIV256 = 9,
+    #[doc = "10: CLK_RTC_CNT = GCLK_RTC/512"]
+    DIV512 = 10,
+    #[doc = "11: CLK_RTC_CNT = GCLK_RTC/1024"]
+    DIV1024 = 11,
+}
+impl From<PRESCALER_A> for u8 {
+    #[inline(always)]
+    fn from(variant: PRESCALER_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `PRESCALER` reader - Prescaler"]
+pub struct PRESCALER_R(crate::FieldReader<u8, PRESCALER_A>);
+impl PRESCALER_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        PRESCALER_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<PRESCALER_A> {
+        match self.bits {
+            0 => Some(PRESCALER_A::OFF),
+            1 => Some(PRESCALER_A::DIV1),
+            2 => Some(PRESCALER_A::DIV2),
+            3 => Some(PRESCALER_A::DIV4),
+            4 => Some(PRESCALER_A::DIV8),
+            5 => Some(PRESCALER_A::DIV16),
+            6 => Some(PRESCALER_A::DIV32),
+            7 => Some(PRESCALER_A::DIV64),
+            8 => Some(PRESCALER_A::DIV128),
+            9 => Some(PRESCALER_A::DIV256),
+            10 => Some(PRESCALER_A::DIV512),
+            11 => Some(PRESCALER_A::DIV1024),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `OFF`"]
+    #[inline(always)]
+    pub fn is_off(&self) -> bool {
+        **self == PRESCALER_A::OFF
+    }
+    #[doc = "Checks if the value of the field is `DIV1`"]
+    #[inline(always)]
+    pub fn is_div1(&self) -> bool {
+        **self == PRESCALER_A::DIV1
+    }
+    #[doc = "Checks if the value of the field is `DIV2`"]
+    #[inline(always)]
+    pub fn is_div2(&self) -> bool {
+        **self == PRESCALER_A::DIV2
+    }
+    #[doc = "Checks if the value of the field is `DIV4`"]
+    #[inline(always)]
+    pub fn is_div4(&self) -> bool {
+        **self == PRESCALER_A::DIV4
+    }
+    #[doc = "Checks if the value of the field is `DIV8`"]
+    #[inline(always)]
+    pub fn is_div8(&self) -> bool {
+        **self == PRESCALER_A::DIV8
+    }
+    #[doc = "Checks if the value of the field is `DIV16`"]
+    #[inline(always)]
+    pub fn is_div16(&self) -> bool {
+        **self == PRESCALER_A::DIV16
+    }
+    #[doc = "Checks if the value of the field is `DIV32`"]
+    #[inline(always)]
+    pub fn is_div32(&self) -> bool {
+        **self == PRESCALER_A::DIV32
+    }
+    #[doc = "Checks if the value of the field is `DIV64`"]
+    #[inline(always)]
+    pub fn is_div64(&self) -> bool {
+        **self == PRESCALER_A::DIV64
+    }
+    #[doc = "Checks if the value of the field is `DIV128`"]
+    #[inline(always)]
+    pub fn is_div128(&self) -> bool {
+        **self == PRESCALER_A::DIV128
+    }
+    #[doc = "Checks if the value of the field is `DIV256`"]
+    #[inline(always)]
+    pub fn is_div256(&self) -> bool {
+        **self == PRESCALER_A::DIV256
+    }
+    #[doc = "Checks if the value of the field is `DIV512`"]
+    #[inline(always)]
+    pub fn is_div512(&self) -> bool {
+        **self == PRESCALER_A::DIV512
+    }
+    #[doc = "Checks if the value of the field is `DIV1024`"]
+    #[inline(always)]
+    pub fn is_div1024(&self) -> bool {
+        **self == PRESCALER_A::DIV1024
+    }
+}
+impl core::ops::Deref for PRESCALER_R {
+    type Target = crate::FieldReader<u8, PRESCALER_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PRESCALER` writer - Prescaler"]
+pub struct PRESCALER_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PRESCALER_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: PRESCALER_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "CLK_RTC_CNT = GCLK_RTC/1"]
+    #[inline(always)]
+    pub fn off(self) -> &'a mut W {
+        self.variant(PRESCALER_A::OFF)
+    }
+    #[doc = "CLK_RTC_CNT = GCLK_RTC/1"]
+    #[inline(always)]
+    pub fn div1(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV1)
+    }
+    #[doc = "CLK_RTC_CNT = GCLK_RTC/2"]
+    #[inline(always)]
+    pub fn div2(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV2)
+    }
+    #[doc = "CLK_RTC_CNT = GCLK_RTC/4"]
+    #[inline(always)]
+    pub fn div4(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV4)
+    }
+    #[doc = "CLK_RTC_CNT = GCLK_RTC/8"]
+    #[inline(always)]
+    pub fn div8(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV8)
+    }
+    #[doc = "CLK_RTC_CNT = GCLK_RTC/16"]
+    #[inline(always)]
+    pub fn div16(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV16)
+    }
+    #[doc = "CLK_RTC_CNT = GCLK_RTC/32"]
+    #[inline(always)]
+    pub fn div32(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV32)
+    }
+    #[doc = "CLK_RTC_CNT = GCLK_RTC/64"]
+    #[inline(always)]
+    pub fn div64(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV64)
+    }
+    #[doc = "CLK_RTC_CNT = GCLK_RTC/128"]
+    #[inline(always)]
+    pub fn div128(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV128)
+    }
+    #[doc = "CLK_RTC_CNT = GCLK_RTC/256"]
+    #[inline(always)]
+    pub fn div256(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV256)
+    }
+    #[doc = "CLK_RTC_CNT = GCLK_RTC/512"]
+    #[inline(always)]
+    pub fn div512(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV512)
+    }
+    #[doc = "CLK_RTC_CNT = GCLK_RTC/1024"]
+    #[inline(always)]
+    pub fn div1024(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV1024)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u16 & 0x0f) << 8);
+        self.w
+    }
+}
+#[doc = "Field `CLOCKSYNC` reader - Clock Read Synchronization Enable"]
+pub struct CLOCKSYNC_R(crate::FieldReader<bool, bool>);
+impl CLOCKSYNC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CLOCKSYNC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CLOCKSYNC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CLOCKSYNC` writer - Clock Read Synchronization Enable"]
+pub struct CLOCKSYNC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CLOCKSYNC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u16 & 0x01) << 15);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bits 2:3 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&self) -> MODE_R {
+        MODE_R::new(((self.bits >> 2) & 0x03) as u8)
+    }
+    #[doc = "Bit 6 - Clock Representation"]
+    #[inline(always)]
+    pub fn clkrep(&self) -> CLKREP_R {
+        CLKREP_R::new(((self.bits >> 6) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Clear on Match"]
+    #[inline(always)]
+    pub fn matchclr(&self) -> MATCHCLR_R {
+        MATCHCLR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+    #[doc = "Bits 8:11 - Prescaler"]
+    #[inline(always)]
+    pub fn prescaler(&self) -> PRESCALER_R {
+        PRESCALER_R::new(((self.bits >> 8) & 0x0f) as u8)
+    }
+    #[doc = "Bit 15 - Clock Read Synchronization Enable"]
+    #[inline(always)]
+    pub fn clocksync(&self) -> CLOCKSYNC_R {
+        CLOCKSYNC_R::new(((self.bits >> 15) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&mut self) -> SWRST_W {
+        SWRST_W { w: self }
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Bits 2:3 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&mut self) -> MODE_W {
+        MODE_W { w: self }
+    }
+    #[doc = "Bit 6 - Clock Representation"]
+    #[inline(always)]
+    pub fn clkrep(&mut self) -> CLKREP_W {
+        CLKREP_W { w: self }
+    }
+    #[doc = "Bit 7 - Clear on Match"]
+    #[inline(always)]
+    pub fn matchclr(&mut self) -> MATCHCLR_W {
+        MATCHCLR_W { w: self }
+    }
+    #[doc = "Bits 8:11 - Prescaler"]
+    #[inline(always)]
+    pub fn prescaler(&mut self) -> PRESCALER_W {
+        PRESCALER_W { w: self }
+    }
+    #[doc = "Bit 15 - Clock Read Synchronization Enable"]
+    #[inline(always)]
+    pub fn clocksync(&mut self) -> CLOCKSYNC_W {
+        CLOCKSYNC_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "MODE2 Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
+pub struct CTRLA_SPEC;
+impl crate::RegisterSpec for CTRLA_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
+impl crate::Readable for CTRLA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
+impl crate::Writable for CTRLA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLA to value 0"]
+impl crate::Resettable for CTRLA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}