Initial commit

78 files changed, 20720 insertions, 0 deletions

diff --git a/src/sercom0/i2cm.rs b/src/sercom0/i2cm.rs
new file mode 100644
index 0000000..8aa217d
--- /dev/null
+++ b/src/sercom0/i2cm.rs
@@ -0,0 +1,44 @@
+#[doc = "CTRLA register accessor: an alias for `Reg<CTRLA_SPEC>`"]
+pub type CTRLA = crate::Reg<ctrla::CTRLA_SPEC>;
+#[doc = "I2CM Control A"]
+pub mod ctrla;
+#[doc = "CTRLB register accessor: an alias for `Reg<CTRLB_SPEC>`"]
+pub type CTRLB = crate::Reg<ctrlb::CTRLB_SPEC>;
+#[doc = "I2CM Control B"]
+pub mod ctrlb;
+#[doc = "BAUD register accessor: an alias for `Reg<BAUD_SPEC>`"]
+pub type BAUD = crate::Reg<baud::BAUD_SPEC>;
+#[doc = "I2CM Baud Rate"]
+pub mod baud;
+#[doc = "INTENCLR register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "I2CM Interrupt Enable Clear"]
+pub mod intenclr;
+#[doc = "INTENSET register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "I2CM Interrupt Enable Set"]
+pub mod intenset;
+#[doc = "INTFLAG register accessor: an alias for `Reg<INTFLAG_SPEC>`"]
+pub type INTFLAG = crate::Reg<intflag::INTFLAG_SPEC>;
+#[doc = "I2CM Interrupt Flag Status and Clear"]
+pub mod intflag;
+#[doc = "STATUS register accessor: an alias for `Reg<STATUS_SPEC>`"]
+pub type STATUS = crate::Reg<status::STATUS_SPEC>;
+#[doc = "I2CM Status"]
+pub mod status;
+#[doc = "SYNCBUSY register accessor: an alias for `Reg<SYNCBUSY_SPEC>`"]
+pub type SYNCBUSY = crate::Reg<syncbusy::SYNCBUSY_SPEC>;
+#[doc = "I2CM Synchronization Busy"]
+pub mod syncbusy;
+#[doc = "ADDR register accessor: an alias for `Reg<ADDR_SPEC>`"]
+pub type ADDR = crate::Reg<addr::ADDR_SPEC>;
+#[doc = "I2CM Address"]
+pub mod addr;
+#[doc = "DATA register accessor: an alias for `Reg<DATA_SPEC>`"]
+pub type DATA = crate::Reg<data::DATA_SPEC>;
+#[doc = "I2CM Data"]
+pub mod data;
+#[doc = "DBGCTRL register accessor: an alias for `Reg<DBGCTRL_SPEC>`"]
+pub type DBGCTRL = crate::Reg<dbgctrl::DBGCTRL_SPEC>;
+#[doc = "I2CM Debug Control"]
+pub mod dbgctrl;
diff --git a/src/sercom0/i2cm/addr.rs b/src/sercom0/i2cm/addr.rs
new file mode 100644
index 0000000..26dce82
--- /dev/null
+++ b/src/sercom0/i2cm/addr.rs
@@ -0,0 +1,276 @@
+#[doc = "Register `ADDR` reader"]
+pub struct R(crate::R<ADDR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ADDR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ADDR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ADDR` writer"]
+pub struct W(crate::W<ADDR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ADDR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ADDR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ADDR` reader - Address Value"]
+pub struct ADDR_R(crate::FieldReader<u16, u16>);
+impl ADDR_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        ADDR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ADDR_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ADDR` writer - Address Value"]
+pub struct ADDR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ADDR_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff);
+        self.w
+    }
+}
+#[doc = "Field `LENEN` reader - Length Enable"]
+pub struct LENEN_R(crate::FieldReader<bool, bool>);
+impl LENEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        LENEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LENEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LENEN` writer - Length Enable"]
+pub struct LENEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LENEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
+        self.w
+    }
+}
+#[doc = "Field `HS` reader - High Speed Mode"]
+pub struct HS_R(crate::FieldReader<bool, bool>);
+impl HS_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        HS_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for HS_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `HS` writer - High Speed Mode"]
+pub struct HS_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> HS_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
+        self.w
+    }
+}
+#[doc = "Field `TENBITEN` reader - Ten Bit Addressing Enable"]
+pub struct TENBITEN_R(crate::FieldReader<bool, bool>);
+impl TENBITEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TENBITEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TENBITEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TENBITEN` writer - Ten Bit Addressing Enable"]
+pub struct TENBITEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TENBITEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
+        self.w
+    }
+}
+#[doc = "Field `LEN` reader - Length"]
+pub struct LEN_R(crate::FieldReader<u8, u8>);
+impl LEN_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        LEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LEN_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LEN` writer - Length"]
+pub struct LEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LEN_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0xff << 16)) | ((value as u32 & 0xff) << 16);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:10 - Address Value"]
+    #[inline(always)]
+    pub fn addr(&self) -> ADDR_R {
+        ADDR_R::new((self.bits & 0x07ff) as u16)
+    }
+    #[doc = "Bit 13 - Length Enable"]
+    #[inline(always)]
+    pub fn lenen(&self) -> LENEN_R {
+        LENEN_R::new(((self.bits >> 13) & 0x01) != 0)
+    }
+    #[doc = "Bit 14 - High Speed Mode"]
+    #[inline(always)]
+    pub fn hs(&self) -> HS_R {
+        HS_R::new(((self.bits >> 14) & 0x01) != 0)
+    }
+    #[doc = "Bit 15 - Ten Bit Addressing Enable"]
+    #[inline(always)]
+    pub fn tenbiten(&self) -> TENBITEN_R {
+        TENBITEN_R::new(((self.bits >> 15) & 0x01) != 0)
+    }
+    #[doc = "Bits 16:23 - Length"]
+    #[inline(always)]
+    pub fn len(&self) -> LEN_R {
+        LEN_R::new(((self.bits >> 16) & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:10 - Address Value"]
+    #[inline(always)]
+    pub fn addr(&mut self) -> ADDR_W {
+        ADDR_W { w: self }
+    }
+    #[doc = "Bit 13 - Length Enable"]
+    #[inline(always)]
+    pub fn lenen(&mut self) -> LENEN_W {
+        LENEN_W { w: self }
+    }
+    #[doc = "Bit 14 - High Speed Mode"]
+    #[inline(always)]
+    pub fn hs(&mut self) -> HS_W {
+        HS_W { w: self }
+    }
+    #[doc = "Bit 15 - Ten Bit Addressing Enable"]
+    #[inline(always)]
+    pub fn tenbiten(&mut self) -> TENBITEN_W {
+        TENBITEN_W { w: self }
+    }
+    #[doc = "Bits 16:23 - Length"]
+    #[inline(always)]
+    pub fn len(&mut self) -> LEN_W {
+        LEN_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CM Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addr](index.html) module"]
+pub struct ADDR_SPEC;
+impl crate::RegisterSpec for ADDR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [addr::R](R) reader structure"]
+impl crate::Readable for ADDR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [addr::W](W) writer structure"]
+impl crate::Writable for ADDR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ADDR to value 0"]
+impl crate::Resettable for ADDR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cm/baud.rs b/src/sercom0/i2cm/baud.rs
new file mode 100644
index 0000000..0866b75
--- /dev/null
+++ b/src/sercom0/i2cm/baud.rs
@@ -0,0 +1,210 @@
+#[doc = "Register `BAUD` reader"]
+pub struct R(crate::R<BAUD_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<BAUD_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<BAUD_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<BAUD_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `BAUD` writer"]
+pub struct W(crate::W<BAUD_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<BAUD_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<BAUD_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<BAUD_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BAUD` reader - Baud Rate Value"]
+pub struct BAUD_R(crate::FieldReader<u8, u8>);
+impl BAUD_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        BAUD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BAUD_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BAUD` writer - Baud Rate Value"]
+pub struct BAUD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BAUD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff);
+        self.w
+    }
+}
+#[doc = "Field `BAUDLOW` reader - Baud Rate Value Low"]
+pub struct BAUDLOW_R(crate::FieldReader<u8, u8>);
+impl BAUDLOW_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        BAUDLOW_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BAUDLOW_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BAUDLOW` writer - Baud Rate Value Low"]
+pub struct BAUDLOW_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BAUDLOW_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8);
+        self.w
+    }
+}
+#[doc = "Field `HSBAUD` reader - High Speed Baud Rate Value"]
+pub struct HSBAUD_R(crate::FieldReader<u8, u8>);
+impl HSBAUD_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        HSBAUD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for HSBAUD_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `HSBAUD` writer - High Speed Baud Rate Value"]
+pub struct HSBAUD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> HSBAUD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0xff << 16)) | ((value as u32 & 0xff) << 16);
+        self.w
+    }
+}
+#[doc = "Field `HSBAUDLOW` reader - High Speed Baud Rate Value Low"]
+pub struct HSBAUDLOW_R(crate::FieldReader<u8, u8>);
+impl HSBAUDLOW_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        HSBAUDLOW_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for HSBAUDLOW_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `HSBAUDLOW` writer - High Speed Baud Rate Value Low"]
+pub struct HSBAUDLOW_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> HSBAUDLOW_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0xff << 24)) | ((value as u32 & 0xff) << 24);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&self) -> BAUD_R {
+        BAUD_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bits 8:15 - Baud Rate Value Low"]
+    #[inline(always)]
+    pub fn baudlow(&self) -> BAUDLOW_R {
+        BAUDLOW_R::new(((self.bits >> 8) & 0xff) as u8)
+    }
+    #[doc = "Bits 16:23 - High Speed Baud Rate Value"]
+    #[inline(always)]
+    pub fn hsbaud(&self) -> HSBAUD_R {
+        HSBAUD_R::new(((self.bits >> 16) & 0xff) as u8)
+    }
+    #[doc = "Bits 24:31 - High Speed Baud Rate Value Low"]
+    #[inline(always)]
+    pub fn hsbaudlow(&self) -> HSBAUDLOW_R {
+        HSBAUDLOW_R::new(((self.bits >> 24) & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&mut self) -> BAUD_W {
+        BAUD_W { w: self }
+    }
+    #[doc = "Bits 8:15 - Baud Rate Value Low"]
+    #[inline(always)]
+    pub fn baudlow(&mut self) -> BAUDLOW_W {
+        BAUDLOW_W { w: self }
+    }
+    #[doc = "Bits 16:23 - High Speed Baud Rate Value"]
+    #[inline(always)]
+    pub fn hsbaud(&mut self) -> HSBAUD_W {
+        HSBAUD_W { w: self }
+    }
+    #[doc = "Bits 24:31 - High Speed Baud Rate Value Low"]
+    #[inline(always)]
+    pub fn hsbaudlow(&mut self) -> HSBAUDLOW_W {
+        HSBAUDLOW_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CM Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud](index.html) module"]
+pub struct BAUD_SPEC;
+impl crate::RegisterSpec for BAUD_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [baud::R](R) reader structure"]
+impl crate::Readable for BAUD_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [baud::W](W) writer structure"]
+impl crate::Writable for BAUD_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets BAUD to value 0"]
+impl crate::Resettable for BAUD_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cm/ctrla.rs b/src/sercom0/i2cm/ctrla.rs
new file mode 100644
index 0000000..6aa87b5
--- /dev/null
+++ b/src/sercom0/i2cm/ctrla.rs
@@ -0,0 +1,891 @@
+#[doc = "Register `CTRLA` reader"]
+pub struct R(crate::R<CTRLA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLA` writer"]
+pub struct W(crate::W<CTRLA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SWRST` writer - Software Reset"]
+pub struct SWRST_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SWRST_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Operating Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum MODE_A {
+    #[doc = "0: USART with external clock"]
+    USART_EXT_CLK = 0,
+    #[doc = "1: USART with internal clock"]
+    USART_INT_CLK = 1,
+    #[doc = "2: SPI in slave operation"]
+    SPI_SLAVE = 2,
+    #[doc = "3: SPI in master operation"]
+    SPI_MASTER = 3,
+    #[doc = "4: I2C slave operation"]
+    I2C_SLAVE = 4,
+    #[doc = "5: I2C master operation"]
+    I2C_MASTER = 5,
+}
+impl From<MODE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: MODE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `MODE` reader - Operating Mode"]
+pub struct MODE_R(crate::FieldReader<u8, MODE_A>);
+impl MODE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        MODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<MODE_A> {
+        match self.bits {
+            0 => Some(MODE_A::USART_EXT_CLK),
+            1 => Some(MODE_A::USART_INT_CLK),
+            2 => Some(MODE_A::SPI_SLAVE),
+            3 => Some(MODE_A::SPI_MASTER),
+            4 => Some(MODE_A::I2C_SLAVE),
+            5 => Some(MODE_A::I2C_MASTER),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `USART_EXT_CLK`"]
+    #[inline(always)]
+    pub fn is_usart_ext_clk(&self) -> bool {
+        **self == MODE_A::USART_EXT_CLK
+    }
+    #[doc = "Checks if the value of the field is `USART_INT_CLK`"]
+    #[inline(always)]
+    pub fn is_usart_int_clk(&self) -> bool {
+        **self == MODE_A::USART_INT_CLK
+    }
+    #[doc = "Checks if the value of the field is `SPI_SLAVE`"]
+    #[inline(always)]
+    pub fn is_spi_slave(&self) -> bool {
+        **self == MODE_A::SPI_SLAVE
+    }
+    #[doc = "Checks if the value of the field is `SPI_MASTER`"]
+    #[inline(always)]
+    pub fn is_spi_master(&self) -> bool {
+        **self == MODE_A::SPI_MASTER
+    }
+    #[doc = "Checks if the value of the field is `I2C_SLAVE`"]
+    #[inline(always)]
+    pub fn is_i2c_slave(&self) -> bool {
+        **self == MODE_A::I2C_SLAVE
+    }
+    #[doc = "Checks if the value of the field is `I2C_MASTER`"]
+    #[inline(always)]
+    pub fn is_i2c_master(&self) -> bool {
+        **self == MODE_A::I2C_MASTER
+    }
+}
+impl core::ops::Deref for MODE_R {
+    type Target = crate::FieldReader<u8, MODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MODE` writer - Operating Mode"]
+pub struct MODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: MODE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "USART with external clock"]
+    #[inline(always)]
+    pub fn usart_ext_clk(self) -> &'a mut W {
+        self.variant(MODE_A::USART_EXT_CLK)
+    }
+    #[doc = "USART with internal clock"]
+    #[inline(always)]
+    pub fn usart_int_clk(self) -> &'a mut W {
+        self.variant(MODE_A::USART_INT_CLK)
+    }
+    #[doc = "SPI in slave operation"]
+    #[inline(always)]
+    pub fn spi_slave(self) -> &'a mut W {
+        self.variant(MODE_A::SPI_SLAVE)
+    }
+    #[doc = "SPI in master operation"]
+    #[inline(always)]
+    pub fn spi_master(self) -> &'a mut W {
+        self.variant(MODE_A::SPI_MASTER)
+    }
+    #[doc = "I2C slave operation"]
+    #[inline(always)]
+    pub fn i2c_slave(self) -> &'a mut W {
+        self.variant(MODE_A::I2C_SLAVE)
+    }
+    #[doc = "I2C master operation"]
+    #[inline(always)]
+    pub fn i2c_master(self) -> &'a mut W {
+        self.variant(MODE_A::I2C_MASTER)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 2)) | ((value as u32 & 0x07) << 2);
+        self.w
+    }
+}
+#[doc = "Field `RUNSTDBY` reader - Run in Standby"]
+pub struct RUNSTDBY_R(crate::FieldReader<bool, bool>);
+impl RUNSTDBY_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RUNSTDBY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RUNSTDBY_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RUNSTDBY` writer - Run in Standby"]
+pub struct RUNSTDBY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RUNSTDBY_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
+        self.w
+    }
+}
+#[doc = "Field `PINOUT` reader - Pin Usage"]
+pub struct PINOUT_R(crate::FieldReader<bool, bool>);
+impl PINOUT_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        PINOUT_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for PINOUT_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PINOUT` writer - Pin Usage"]
+pub struct PINOUT_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PINOUT_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
+        self.w
+    }
+}
+#[doc = "SDA Hold Time\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SDAHOLD_A {
+    #[doc = "0: Disabled"]
+    DISABLE = 0,
+    #[doc = "1: 50-100ns hold time"]
+    _75NS = 1,
+    #[doc = "2: 300-600ns hold time"]
+    _450NS = 2,
+    #[doc = "3: 400-800ns hold time"]
+    _600NS = 3,
+}
+impl From<SDAHOLD_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SDAHOLD_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `SDAHOLD` reader - SDA Hold Time"]
+pub struct SDAHOLD_R(crate::FieldReader<u8, SDAHOLD_A>);
+impl SDAHOLD_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        SDAHOLD_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SDAHOLD_A {
+        match self.bits {
+            0 => SDAHOLD_A::DISABLE,
+            1 => SDAHOLD_A::_75NS,
+            2 => SDAHOLD_A::_450NS,
+            3 => SDAHOLD_A::_600NS,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLE`"]
+    #[inline(always)]
+    pub fn is_disable(&self) -> bool {
+        **self == SDAHOLD_A::DISABLE
+    }
+    #[doc = "Checks if the value of the field is `_75NS`"]
+    #[inline(always)]
+    pub fn is_75ns(&self) -> bool {
+        **self == SDAHOLD_A::_75NS
+    }
+    #[doc = "Checks if the value of the field is `_450NS`"]
+    #[inline(always)]
+    pub fn is_450ns(&self) -> bool {
+        **self == SDAHOLD_A::_450NS
+    }
+    #[doc = "Checks if the value of the field is `_600NS`"]
+    #[inline(always)]
+    pub fn is_600ns(&self) -> bool {
+        **self == SDAHOLD_A::_600NS
+    }
+}
+impl core::ops::Deref for SDAHOLD_R {
+    type Target = crate::FieldReader<u8, SDAHOLD_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SDAHOLD` writer - SDA Hold Time"]
+pub struct SDAHOLD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SDAHOLD_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: SDAHOLD_A) -> &'a mut W {
+        self.bits(variant.into())
+    }
+    #[doc = "Disabled"]
+    #[inline(always)]
+    pub fn disable(self) -> &'a mut W {
+        self.variant(SDAHOLD_A::DISABLE)
+    }
+    #[doc = "50-100ns hold time"]
+    #[inline(always)]
+    pub fn _75ns(self) -> &'a mut W {
+        self.variant(SDAHOLD_A::_75NS)
+    }
+    #[doc = "300-600ns hold time"]
+    #[inline(always)]
+    pub fn _450ns(self) -> &'a mut W {
+        self.variant(SDAHOLD_A::_450NS)
+    }
+    #[doc = "400-800ns hold time"]
+    #[inline(always)]
+    pub fn _600ns(self) -> &'a mut W {
+        self.variant(SDAHOLD_A::_600NS)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20);
+        self.w
+    }
+}
+#[doc = "Field `MEXTTOEN` reader - Master SCL Low Extend Timeout"]
+pub struct MEXTTOEN_R(crate::FieldReader<bool, bool>);
+impl MEXTTOEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        MEXTTOEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MEXTTOEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MEXTTOEN` writer - Master SCL Low Extend Timeout"]
+pub struct MEXTTOEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MEXTTOEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
+        self.w
+    }
+}
+#[doc = "Field `SEXTTOEN` reader - Slave SCL Low Extend Timeout"]
+pub struct SEXTTOEN_R(crate::FieldReader<bool, bool>);
+impl SEXTTOEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SEXTTOEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SEXTTOEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SEXTTOEN` writer - Slave SCL Low Extend Timeout"]
+pub struct SEXTTOEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SEXTTOEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
+        self.w
+    }
+}
+#[doc = "Transfer Speed\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SPEED_A {
+    #[doc = "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm) Upto 400kHz "]
+    STANDARD_AND_FAST_MODE = 0,
+    #[doc = "1: Fast-mode Plus Upto 1MHz"]
+    FASTPLUS_MODE = 1,
+    #[doc = "2: High-speed mode Upto 3.4MHz"]
+    HIGH_SPEED_MODE = 2,
+}
+impl From<SPEED_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SPEED_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `SPEED` reader - Transfer Speed"]
+pub struct SPEED_R(crate::FieldReader<u8, SPEED_A>);
+impl SPEED_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        SPEED_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SPEED_A> {
+        match self.bits {
+            0 => Some(SPEED_A::STANDARD_AND_FAST_MODE),
+            1 => Some(SPEED_A::FASTPLUS_MODE),
+            2 => Some(SPEED_A::HIGH_SPEED_MODE),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `STANDARD_AND_FAST_MODE`"]
+    #[inline(always)]
+    pub fn is_standard_and_fast_mode(&self) -> bool {
+        **self == SPEED_A::STANDARD_AND_FAST_MODE
+    }
+    #[doc = "Checks if the value of the field is `FASTPLUS_MODE`"]
+    #[inline(always)]
+    pub fn is_fastplus_mode(&self) -> bool {
+        **self == SPEED_A::FASTPLUS_MODE
+    }
+    #[doc = "Checks if the value of the field is `HIGH_SPEED_MODE`"]
+    #[inline(always)]
+    pub fn is_high_speed_mode(&self) -> bool {
+        **self == SPEED_A::HIGH_SPEED_MODE
+    }
+}
+impl core::ops::Deref for SPEED_R {
+    type Target = crate::FieldReader<u8, SPEED_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SPEED` writer - Transfer Speed"]
+pub struct SPEED_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SPEED_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: SPEED_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm) Upto 400kHz"]
+    #[inline(always)]
+    pub fn standard_and_fast_mode(self) -> &'a mut W {
+        self.variant(SPEED_A::STANDARD_AND_FAST_MODE)
+    }
+    #[doc = "Fast-mode Plus Upto 1MHz"]
+    #[inline(always)]
+    pub fn fastplus_mode(self) -> &'a mut W {
+        self.variant(SPEED_A::FASTPLUS_MODE)
+    }
+    #[doc = "High-speed mode Upto 3.4MHz"]
+    #[inline(always)]
+    pub fn high_speed_mode(self) -> &'a mut W {
+        self.variant(SPEED_A::HIGH_SPEED_MODE)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24);
+        self.w
+    }
+}
+#[doc = "Field `SCLSM` reader - SCL Clock Stretch Mode"]
+pub struct SCLSM_R(crate::FieldReader<bool, bool>);
+impl SCLSM_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SCLSM_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SCLSM_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SCLSM` writer - SCL Clock Stretch Mode"]
+pub struct SCLSM_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SCLSM_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27);
+        self.w
+    }
+}
+#[doc = "Inactive Time-Out\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum INACTOUT_A {
+    #[doc = "0: Disabled"]
+    DISABLE = 0,
+    #[doc = "1: 5-6 SCL Time-Out(50-60us)"]
+    _55US = 1,
+    #[doc = "2: 10-11 SCL Time-Out(100-110us)"]
+    _105US = 2,
+    #[doc = "3: 20-21 SCL Time-Out(200-210us)"]
+    _205US = 3,
+}
+impl From<INACTOUT_A> for u8 {
+    #[inline(always)]
+    fn from(variant: INACTOUT_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `INACTOUT` reader - Inactive Time-Out"]
+pub struct INACTOUT_R(crate::FieldReader<u8, INACTOUT_A>);
+impl INACTOUT_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        INACTOUT_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> INACTOUT_A {
+        match self.bits {
+            0 => INACTOUT_A::DISABLE,
+            1 => INACTOUT_A::_55US,
+            2 => INACTOUT_A::_105US,
+            3 => INACTOUT_A::_205US,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLE`"]
+    #[inline(always)]
+    pub fn is_disable(&self) -> bool {
+        **self == INACTOUT_A::DISABLE
+    }
+    #[doc = "Checks if the value of the field is `_55US`"]
+    #[inline(always)]
+    pub fn is_55us(&self) -> bool {
+        **self == INACTOUT_A::_55US
+    }
+    #[doc = "Checks if the value of the field is `_105US`"]
+    #[inline(always)]
+    pub fn is_105us(&self) -> bool {
+        **self == INACTOUT_A::_105US
+    }
+    #[doc = "Checks if the value of the field is `_205US`"]
+    #[inline(always)]
+    pub fn is_205us(&self) -> bool {
+        **self == INACTOUT_A::_205US
+    }
+}
+impl core::ops::Deref for INACTOUT_R {
+    type Target = crate::FieldReader<u8, INACTOUT_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `INACTOUT` writer - Inactive Time-Out"]
+pub struct INACTOUT_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> INACTOUT_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: INACTOUT_A) -> &'a mut W {
+        self.bits(variant.into())
+    }
+    #[doc = "Disabled"]
+    #[inline(always)]
+    pub fn disable(self) -> &'a mut W {
+        self.variant(INACTOUT_A::DISABLE)
+    }
+    #[doc = "5-6 SCL Time-Out(50-60us)"]
+    #[inline(always)]
+    pub fn _55us(self) -> &'a mut W {
+        self.variant(INACTOUT_A::_55US)
+    }
+    #[doc = "10-11 SCL Time-Out(100-110us)"]
+    #[inline(always)]
+    pub fn _105us(self) -> &'a mut W {
+        self.variant(INACTOUT_A::_105US)
+    }
+    #[doc = "20-21 SCL Time-Out(200-210us)"]
+    #[inline(always)]
+    pub fn _205us(self) -> &'a mut W {
+        self.variant(INACTOUT_A::_205US)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28);
+        self.w
+    }
+}
+#[doc = "Field `LOWTOUTEN` reader - SCL Low Timeout Enable"]
+pub struct LOWTOUTEN_R(crate::FieldReader<bool, bool>);
+impl LOWTOUTEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        LOWTOUTEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LOWTOUTEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LOWTOUTEN` writer - SCL Low Timeout Enable"]
+pub struct LOWTOUTEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LOWTOUTEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bits 2:4 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&self) -> MODE_R {
+        MODE_R::new(((self.bits >> 2) & 0x07) as u8)
+    }
+    #[doc = "Bit 7 - Run in Standby"]
+    #[inline(always)]
+    pub fn runstdby(&self) -> RUNSTDBY_R {
+        RUNSTDBY_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+    #[doc = "Bit 16 - Pin Usage"]
+    #[inline(always)]
+    pub fn pinout(&self) -> PINOUT_R {
+        PINOUT_R::new(((self.bits >> 16) & 0x01) != 0)
+    }
+    #[doc = "Bits 20:21 - SDA Hold Time"]
+    #[inline(always)]
+    pub fn sdahold(&self) -> SDAHOLD_R {
+        SDAHOLD_R::new(((self.bits >> 20) & 0x03) as u8)
+    }
+    #[doc = "Bit 22 - Master SCL Low Extend Timeout"]
+    #[inline(always)]
+    pub fn mexttoen(&self) -> MEXTTOEN_R {
+        MEXTTOEN_R::new(((self.bits >> 22) & 0x01) != 0)
+    }
+    #[doc = "Bit 23 - Slave SCL Low Extend Timeout"]
+    #[inline(always)]
+    pub fn sexttoen(&self) -> SEXTTOEN_R {
+        SEXTTOEN_R::new(((self.bits >> 23) & 0x01) != 0)
+    }
+    #[doc = "Bits 24:25 - Transfer Speed"]
+    #[inline(always)]
+    pub fn speed(&self) -> SPEED_R {
+        SPEED_R::new(((self.bits >> 24) & 0x03) as u8)
+    }
+    #[doc = "Bit 27 - SCL Clock Stretch Mode"]
+    #[inline(always)]
+    pub fn sclsm(&self) -> SCLSM_R {
+        SCLSM_R::new(((self.bits >> 27) & 0x01) != 0)
+    }
+    #[doc = "Bits 28:29 - Inactive Time-Out"]
+    #[inline(always)]
+    pub fn inactout(&self) -> INACTOUT_R {
+        INACTOUT_R::new(((self.bits >> 28) & 0x03) as u8)
+    }
+    #[doc = "Bit 30 - SCL Low Timeout Enable"]
+    #[inline(always)]
+    pub fn lowtouten(&self) -> LOWTOUTEN_R {
+        LOWTOUTEN_R::new(((self.bits >> 30) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&mut self) -> SWRST_W {
+        SWRST_W { w: self }
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Bits 2:4 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&mut self) -> MODE_W {
+        MODE_W { w: self }
+    }
+    #[doc = "Bit 7 - Run in Standby"]
+    #[inline(always)]
+    pub fn runstdby(&mut self) -> RUNSTDBY_W {
+        RUNSTDBY_W { w: self }
+    }
+    #[doc = "Bit 16 - Pin Usage"]
+    #[inline(always)]
+    pub fn pinout(&mut self) -> PINOUT_W {
+        PINOUT_W { w: self }
+    }
+    #[doc = "Bits 20:21 - SDA Hold Time"]
+    #[inline(always)]
+    pub fn sdahold(&mut self) -> SDAHOLD_W {
+        SDAHOLD_W { w: self }
+    }
+    #[doc = "Bit 22 - Master SCL Low Extend Timeout"]
+    #[inline(always)]
+    pub fn mexttoen(&mut self) -> MEXTTOEN_W {
+        MEXTTOEN_W { w: self }
+    }
+    #[doc = "Bit 23 - Slave SCL Low Extend Timeout"]
+    #[inline(always)]
+    pub fn sexttoen(&mut self) -> SEXTTOEN_W {
+        SEXTTOEN_W { w: self }
+    }
+    #[doc = "Bits 24:25 - Transfer Speed"]
+    #[inline(always)]
+    pub fn speed(&mut self) -> SPEED_W {
+        SPEED_W { w: self }
+    }
+    #[doc = "Bit 27 - SCL Clock Stretch Mode"]
+    #[inline(always)]
+    pub fn sclsm(&mut self) -> SCLSM_W {
+        SCLSM_W { w: self }
+    }
+    #[doc = "Bits 28:29 - Inactive Time-Out"]
+    #[inline(always)]
+    pub fn inactout(&mut self) -> INACTOUT_W {
+        INACTOUT_W { w: self }
+    }
+    #[doc = "Bit 30 - SCL Low Timeout Enable"]
+    #[inline(always)]
+    pub fn lowtouten(&mut self) -> LOWTOUTEN_W {
+        LOWTOUTEN_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CM Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
+pub struct CTRLA_SPEC;
+impl crate::RegisterSpec for CTRLA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
+impl crate::Readable for CTRLA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
+impl crate::Writable for CTRLA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLA to value 0"]
+impl crate::Resettable for CTRLA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cm/ctrlb.rs b/src/sercom0/i2cm/ctrlb.rs
new file mode 100644
index 0000000..03070a3
--- /dev/null
+++ b/src/sercom0/i2cm/ctrlb.rs
@@ -0,0 +1,240 @@
+#[doc = "Register `CTRLB` reader"]
+pub struct R(crate::R<CTRLB_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLB_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLB_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLB` writer"]
+pub struct W(crate::W<CTRLB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SMEN` reader - Smart Mode Enable"]
+pub struct SMEN_R(crate::FieldReader<bool, bool>);
+impl SMEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SMEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SMEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SMEN` writer - Smart Mode Enable"]
+pub struct SMEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SMEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
+        self.w
+    }
+}
+#[doc = "Field `QCEN` reader - Quick Command Enable"]
+pub struct QCEN_R(crate::FieldReader<bool, bool>);
+impl QCEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        QCEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for QCEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `QCEN` writer - Quick Command Enable"]
+pub struct QCEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> QCEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
+        self.w
+    }
+}
+#[doc = "Field `CMD` reader - Command"]
+pub struct CMD_R(crate::FieldReader<u8, u8>);
+impl CMD_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        CMD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CMD_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CMD` writer - Command"]
+pub struct CMD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CMD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16);
+        self.w
+    }
+}
+#[doc = "Field `ACKACT` reader - Acknowledge Action"]
+pub struct ACKACT_R(crate::FieldReader<bool, bool>);
+impl ACKACT_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ACKACT_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ACKACT_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ACKACT` writer - Acknowledge Action"]
+pub struct ACKACT_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ACKACT_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 8 - Smart Mode Enable"]
+    #[inline(always)]
+    pub fn smen(&self) -> SMEN_R {
+        SMEN_R::new(((self.bits >> 8) & 0x01) != 0)
+    }
+    #[doc = "Bit 9 - Quick Command Enable"]
+    #[inline(always)]
+    pub fn qcen(&self) -> QCEN_R {
+        QCEN_R::new(((self.bits >> 9) & 0x01) != 0)
+    }
+    #[doc = "Bits 16:17 - Command"]
+    #[inline(always)]
+    pub fn cmd(&self) -> CMD_R {
+        CMD_R::new(((self.bits >> 16) & 0x03) as u8)
+    }
+    #[doc = "Bit 18 - Acknowledge Action"]
+    #[inline(always)]
+    pub fn ackact(&self) -> ACKACT_R {
+        ACKACT_R::new(((self.bits >> 18) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 8 - Smart Mode Enable"]
+    #[inline(always)]
+    pub fn smen(&mut self) -> SMEN_W {
+        SMEN_W { w: self }
+    }
+    #[doc = "Bit 9 - Quick Command Enable"]
+    #[inline(always)]
+    pub fn qcen(&mut self) -> QCEN_W {
+        QCEN_W { w: self }
+    }
+    #[doc = "Bits 16:17 - Command"]
+    #[inline(always)]
+    pub fn cmd(&mut self) -> CMD_W {
+        CMD_W { w: self }
+    }
+    #[doc = "Bit 18 - Acknowledge Action"]
+    #[inline(always)]
+    pub fn ackact(&mut self) -> ACKACT_W {
+        ACKACT_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CM Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"]
+pub struct CTRLB_SPEC;
+impl crate::RegisterSpec for CTRLB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrlb::R](R) reader structure"]
+impl crate::Readable for CTRLB_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"]
+impl crate::Writable for CTRLB_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLB to value 0"]
+impl crate::Resettable for CTRLB_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cm/data.rs b/src/sercom0/i2cm/data.rs
new file mode 100644
index 0000000..f6a5b08
--- /dev/null
+++ b/src/sercom0/i2cm/data.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `DATA` reader"]
+pub struct R(crate::R<DATA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DATA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DATA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DATA` writer"]
+pub struct W(crate::W<DATA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DATA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DATA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DATA` reader - Data Value"]
+pub struct DATA_R(crate::FieldReader<u8, u8>);
+impl DATA_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        DATA_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DATA_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DATA` writer - Data Value"]
+pub struct DATA_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DATA_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xff) | (value as u8 & 0xff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Data Value"]
+    #[inline(always)]
+    pub fn data(&self) -> DATA_R {
+        DATA_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Data Value"]
+    #[inline(always)]
+    pub fn data(&mut self) -> DATA_W {
+        DATA_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CM Data\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"]
+pub struct DATA_SPEC;
+impl crate::RegisterSpec for DATA_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [data::R](R) reader structure"]
+impl crate::Readable for DATA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"]
+impl crate::Writable for DATA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DATA to value 0"]
+impl crate::Resettable for DATA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cm/dbgctrl.rs b/src/sercom0/i2cm/dbgctrl.rs
new file mode 100644
index 0000000..f4213b0
--- /dev/null
+++ b/src/sercom0/i2cm/dbgctrl.rs
@@ -0,0 +1,112 @@
+#[doc = "Register `DBGCTRL` reader"]
+pub struct R(crate::R<DBGCTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DBGCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DBGCTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DBGCTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DBGCTRL` writer"]
+pub struct W(crate::W<DBGCTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DBGCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DBGCTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DBGCTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DBGSTOP` reader - Debug Mode"]
+pub struct DBGSTOP_R(crate::FieldReader<bool, bool>);
+impl DBGSTOP_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DBGSTOP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DBGSTOP_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DBGSTOP` writer - Debug Mode"]
+pub struct DBGSTOP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DBGSTOP_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Debug Mode"]
+    #[inline(always)]
+    pub fn dbgstop(&self) -> DBGSTOP_R {
+        DBGSTOP_R::new((self.bits & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Debug Mode"]
+    #[inline(always)]
+    pub fn dbgstop(&mut self) -> DBGSTOP_W {
+        DBGSTOP_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CM Debug Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgctrl](index.html) module"]
+pub struct DBGCTRL_SPEC;
+impl crate::RegisterSpec for DBGCTRL_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [dbgctrl::R](R) reader structure"]
+impl crate::Readable for DBGCTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [dbgctrl::W](W) writer structure"]
+impl crate::Writable for DBGCTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DBGCTRL to value 0"]
+impl crate::Resettable for DBGCTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cm/intenclr.rs b/src/sercom0/i2cm/intenclr.rs
new file mode 100644
index 0000000..81b0874
--- /dev/null
+++ b/src/sercom0/i2cm/intenclr.rs
@@ -0,0 +1,204 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `MB` reader - Master On Bus Interrupt Disable"]
+pub struct MB_R(crate::FieldReader<bool, bool>);
+impl MB_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        MB_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MB_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MB` writer - Master On Bus Interrupt Disable"]
+pub struct MB_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MB_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `SB` reader - Slave On Bus Interrupt Disable"]
+pub struct SB_R(crate::FieldReader<bool, bool>);
+impl SB_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SB_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SB_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SB` writer - Slave On Bus Interrupt Disable"]
+pub struct SB_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SB_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt Disable"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt Disable"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Master On Bus Interrupt Disable"]
+    #[inline(always)]
+    pub fn mb(&self) -> MB_R {
+        MB_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Slave On Bus Interrupt Disable"]
+    #[inline(always)]
+    pub fn sb(&self) -> SB_R {
+        SB_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Disable"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Master On Bus Interrupt Disable"]
+    #[inline(always)]
+    pub fn mb(&mut self) -> MB_W {
+        MB_W { w: self }
+    }
+    #[doc = "Bit 1 - Slave On Bus Interrupt Disable"]
+    #[inline(always)]
+    pub fn sb(&mut self) -> SB_W {
+        SB_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Disable"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CM Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cm/intenset.rs b/src/sercom0/i2cm/intenset.rs
new file mode 100644
index 0000000..f763635
--- /dev/null
+++ b/src/sercom0/i2cm/intenset.rs
@@ -0,0 +1,204 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `MB` reader - Master On Bus Interrupt Enable"]
+pub struct MB_R(crate::FieldReader<bool, bool>);
+impl MB_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        MB_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MB_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MB` writer - Master On Bus Interrupt Enable"]
+pub struct MB_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MB_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `SB` reader - Slave On Bus Interrupt Enable"]
+pub struct SB_R(crate::FieldReader<bool, bool>);
+impl SB_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SB_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SB_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SB` writer - Slave On Bus Interrupt Enable"]
+pub struct SB_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SB_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt Enable"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt Enable"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Master On Bus Interrupt Enable"]
+    #[inline(always)]
+    pub fn mb(&self) -> MB_R {
+        MB_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Slave On Bus Interrupt Enable"]
+    #[inline(always)]
+    pub fn sb(&self) -> SB_R {
+        SB_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Enable"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Master On Bus Interrupt Enable"]
+    #[inline(always)]
+    pub fn mb(&mut self) -> MB_W {
+        MB_W { w: self }
+    }
+    #[doc = "Bit 1 - Slave On Bus Interrupt Enable"]
+    #[inline(always)]
+    pub fn sb(&mut self) -> SB_W {
+        SB_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Enable"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CM Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cm/intflag.rs b/src/sercom0/i2cm/intflag.rs
new file mode 100644
index 0000000..36b65cc
--- /dev/null
+++ b/src/sercom0/i2cm/intflag.rs
@@ -0,0 +1,204 @@
+#[doc = "Register `INTFLAG` reader"]
+pub struct R(crate::R<INTFLAG_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTFLAG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTFLAG_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTFLAG_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTFLAG` writer"]
+pub struct W(crate::W<INTFLAG_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTFLAG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTFLAG_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTFLAG_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `MB` reader - Master On Bus Interrupt"]
+pub struct MB_R(crate::FieldReader<bool, bool>);
+impl MB_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        MB_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MB_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MB` writer - Master On Bus Interrupt"]
+pub struct MB_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MB_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `SB` reader - Slave On Bus Interrupt"]
+pub struct SB_R(crate::FieldReader<bool, bool>);
+impl SB_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SB_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SB_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SB` writer - Slave On Bus Interrupt"]
+pub struct SB_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SB_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Master On Bus Interrupt"]
+    #[inline(always)]
+    pub fn mb(&self) -> MB_R {
+        MB_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Slave On Bus Interrupt"]
+    #[inline(always)]
+    pub fn sb(&self) -> SB_R {
+        SB_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Master On Bus Interrupt"]
+    #[inline(always)]
+    pub fn mb(&mut self) -> MB_W {
+        MB_W { w: self }
+    }
+    #[doc = "Bit 1 - Slave On Bus Interrupt"]
+    #[inline(always)]
+    pub fn sb(&mut self) -> SB_W {
+        SB_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CM Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"]
+pub struct INTFLAG_SPEC;
+impl crate::RegisterSpec for INTFLAG_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intflag::R](R) reader structure"]
+impl crate::Readable for INTFLAG_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"]
+impl crate::Writable for INTFLAG_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTFLAG to value 0"]
+impl crate::Resettable for INTFLAG_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cm/status.rs b/src/sercom0/i2cm/status.rs
new file mode 100644
index 0000000..9089571
--- /dev/null
+++ b/src/sercom0/i2cm/status.rs
@@ -0,0 +1,470 @@
+#[doc = "Register `STATUS` reader"]
+pub struct R(crate::R<STATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<STATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `STATUS` writer"]
+pub struct W(crate::W<STATUS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<STATUS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<STATUS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BUSERR` reader - Bus Error"]
+pub struct BUSERR_R(crate::FieldReader<bool, bool>);
+impl BUSERR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        BUSERR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BUSERR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BUSERR` writer - Bus Error"]
+pub struct BUSERR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BUSERR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `ARBLOST` reader - Arbitration Lost"]
+pub struct ARBLOST_R(crate::FieldReader<bool, bool>);
+impl ARBLOST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ARBLOST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ARBLOST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ARBLOST` writer - Arbitration Lost"]
+pub struct ARBLOST_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ARBLOST_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXNACK` reader - Received Not Acknowledge"]
+pub struct RXNACK_R(crate::FieldReader<bool, bool>);
+impl RXNACK_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXNACK_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXNACK_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXNACK` writer - Received Not Acknowledge"]
+pub struct RXNACK_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXNACK_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `BUSSTATE` reader - Bus State"]
+pub struct BUSSTATE_R(crate::FieldReader<u8, u8>);
+impl BUSSTATE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        BUSSTATE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BUSSTATE_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BUSSTATE` writer - Bus State"]
+pub struct BUSSTATE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BUSSTATE_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u16 & 0x03) << 4);
+        self.w
+    }
+}
+#[doc = "Field `LOWTOUT` reader - SCL Low Timeout"]
+pub struct LOWTOUT_R(crate::FieldReader<bool, bool>);
+impl LOWTOUT_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        LOWTOUT_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LOWTOUT_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LOWTOUT` writer - SCL Low Timeout"]
+pub struct LOWTOUT_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LOWTOUT_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6);
+        self.w
+    }
+}
+#[doc = "Field `CLKHOLD` reader - Clock Hold"]
+pub struct CLKHOLD_R(crate::FieldReader<bool, bool>);
+impl CLKHOLD_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CLKHOLD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CLKHOLD_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CLKHOLD` writer - Clock Hold"]
+pub struct CLKHOLD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CLKHOLD_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7);
+        self.w
+    }
+}
+#[doc = "Field `MEXTTOUT` reader - Master SCL Low Extend Timeout"]
+pub struct MEXTTOUT_R(crate::FieldReader<bool, bool>);
+impl MEXTTOUT_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        MEXTTOUT_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MEXTTOUT_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MEXTTOUT` writer - Master SCL Low Extend Timeout"]
+pub struct MEXTTOUT_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MEXTTOUT_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u16 & 0x01) << 8);
+        self.w
+    }
+}
+#[doc = "Field `SEXTTOUT` reader - Slave SCL Low Extend Timeout"]
+pub struct SEXTTOUT_R(crate::FieldReader<bool, bool>);
+impl SEXTTOUT_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SEXTTOUT_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SEXTTOUT_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SEXTTOUT` writer - Slave SCL Low Extend Timeout"]
+pub struct SEXTTOUT_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SEXTTOUT_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u16 & 0x01) << 9);
+        self.w
+    }
+}
+#[doc = "Field `LENERR` reader - Length Error"]
+pub struct LENERR_R(crate::FieldReader<bool, bool>);
+impl LENERR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        LENERR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LENERR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LENERR` writer - Length Error"]
+pub struct LENERR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LENERR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u16 & 0x01) << 10);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Bus Error"]
+    #[inline(always)]
+    pub fn buserr(&self) -> BUSERR_R {
+        BUSERR_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Arbitration Lost"]
+    #[inline(always)]
+    pub fn arblost(&self) -> ARBLOST_R {
+        ARBLOST_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Received Not Acknowledge"]
+    #[inline(always)]
+    pub fn rxnack(&self) -> RXNACK_R {
+        RXNACK_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bits 4:5 - Bus State"]
+    #[inline(always)]
+    pub fn busstate(&self) -> BUSSTATE_R {
+        BUSSTATE_R::new(((self.bits >> 4) & 0x03) as u8)
+    }
+    #[doc = "Bit 6 - SCL Low Timeout"]
+    #[inline(always)]
+    pub fn lowtout(&self) -> LOWTOUT_R {
+        LOWTOUT_R::new(((self.bits >> 6) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Clock Hold"]
+    #[inline(always)]
+    pub fn clkhold(&self) -> CLKHOLD_R {
+        CLKHOLD_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+    #[doc = "Bit 8 - Master SCL Low Extend Timeout"]
+    #[inline(always)]
+    pub fn mexttout(&self) -> MEXTTOUT_R {
+        MEXTTOUT_R::new(((self.bits >> 8) & 0x01) != 0)
+    }
+    #[doc = "Bit 9 - Slave SCL Low Extend Timeout"]
+    #[inline(always)]
+    pub fn sexttout(&self) -> SEXTTOUT_R {
+        SEXTTOUT_R::new(((self.bits >> 9) & 0x01) != 0)
+    }
+    #[doc = "Bit 10 - Length Error"]
+    #[inline(always)]
+    pub fn lenerr(&self) -> LENERR_R {
+        LENERR_R::new(((self.bits >> 10) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Bus Error"]
+    #[inline(always)]
+    pub fn buserr(&mut self) -> BUSERR_W {
+        BUSERR_W { w: self }
+    }
+    #[doc = "Bit 1 - Arbitration Lost"]
+    #[inline(always)]
+    pub fn arblost(&mut self) -> ARBLOST_W {
+        ARBLOST_W { w: self }
+    }
+    #[doc = "Bit 2 - Received Not Acknowledge"]
+    #[inline(always)]
+    pub fn rxnack(&mut self) -> RXNACK_W {
+        RXNACK_W { w: self }
+    }
+    #[doc = "Bits 4:5 - Bus State"]
+    #[inline(always)]
+    pub fn busstate(&mut self) -> BUSSTATE_W {
+        BUSSTATE_W { w: self }
+    }
+    #[doc = "Bit 6 - SCL Low Timeout"]
+    #[inline(always)]
+    pub fn lowtout(&mut self) -> LOWTOUT_W {
+        LOWTOUT_W { w: self }
+    }
+    #[doc = "Bit 7 - Clock Hold"]
+    #[inline(always)]
+    pub fn clkhold(&mut self) -> CLKHOLD_W {
+        CLKHOLD_W { w: self }
+    }
+    #[doc = "Bit 8 - Master SCL Low Extend Timeout"]
+    #[inline(always)]
+    pub fn mexttout(&mut self) -> MEXTTOUT_W {
+        MEXTTOUT_W { w: self }
+    }
+    #[doc = "Bit 9 - Slave SCL Low Extend Timeout"]
+    #[inline(always)]
+    pub fn sexttout(&mut self) -> SEXTTOUT_W {
+        SEXTTOUT_W { w: self }
+    }
+    #[doc = "Bit 10 - Length Error"]
+    #[inline(always)]
+    pub fn lenerr(&mut self) -> LENERR_W {
+        LENERR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CM Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
+pub struct STATUS_SPEC;
+impl crate::RegisterSpec for STATUS_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [status::R](R) reader structure"]
+impl crate::Readable for STATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"]
+impl crate::Writable for STATUS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets STATUS to value 0"]
+impl crate::Resettable for STATUS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cm/syncbusy.rs b/src/sercom0/i2cm/syncbusy.rs
new file mode 100644
index 0000000..57289aa
--- /dev/null
+++ b/src/sercom0/i2cm/syncbusy.rs
@@ -0,0 +1,90 @@
+#[doc = "Register `SYNCBUSY` reader"]
+pub struct R(crate::R<SYNCBUSY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYNCBUSY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYNCBUSY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset Synchronization Busy"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` reader - SERCOM Enable Synchronization Busy"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SYSOP` reader - System Operation Synchronization Busy"]
+pub struct SYSOP_R(crate::FieldReader<bool, bool>);
+impl SYSOP_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SYSOP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SYSOP_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset Synchronization Busy"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - SERCOM Enable Synchronization Busy"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - System Operation Synchronization Busy"]
+    #[inline(always)]
+    pub fn sysop(&self) -> SYSOP_R {
+        SYSOP_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+}
+#[doc = "I2CM Synchronization Busy\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"]
+pub struct SYNCBUSY_SPEC;
+impl crate::RegisterSpec for SYNCBUSY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [syncbusy::R](R) reader structure"]
+impl crate::Readable for SYNCBUSY_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets SYNCBUSY to value 0"]
+impl crate::Resettable for SYNCBUSY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cs.rs b/src/sercom0/i2cs.rs
new file mode 100644
index 0000000..baf9513
--- /dev/null
+++ b/src/sercom0/i2cs.rs
@@ -0,0 +1,36 @@
+#[doc = "CTRLA register accessor: an alias for `Reg<CTRLA_SPEC>`"]
+pub type CTRLA = crate::Reg<ctrla::CTRLA_SPEC>;
+#[doc = "I2CS Control A"]
+pub mod ctrla;
+#[doc = "CTRLB register accessor: an alias for `Reg<CTRLB_SPEC>`"]
+pub type CTRLB = crate::Reg<ctrlb::CTRLB_SPEC>;
+#[doc = "I2CS Control B"]
+pub mod ctrlb;
+#[doc = "INTENCLR register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "I2CS Interrupt Enable Clear"]
+pub mod intenclr;
+#[doc = "INTENSET register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "I2CS Interrupt Enable Set"]
+pub mod intenset;
+#[doc = "INTFLAG register accessor: an alias for `Reg<INTFLAG_SPEC>`"]
+pub type INTFLAG = crate::Reg<intflag::INTFLAG_SPEC>;
+#[doc = "I2CS Interrupt Flag Status and Clear"]
+pub mod intflag;
+#[doc = "STATUS register accessor: an alias for `Reg<STATUS_SPEC>`"]
+pub type STATUS = crate::Reg<status::STATUS_SPEC>;
+#[doc = "I2CS Status"]
+pub mod status;
+#[doc = "SYNCBUSY register accessor: an alias for `Reg<SYNCBUSY_SPEC>`"]
+pub type SYNCBUSY = crate::Reg<syncbusy::SYNCBUSY_SPEC>;
+#[doc = "I2CS Synchronization Busy"]
+pub mod syncbusy;
+#[doc = "ADDR register accessor: an alias for `Reg<ADDR_SPEC>`"]
+pub type ADDR = crate::Reg<addr::ADDR_SPEC>;
+#[doc = "I2CS Address"]
+pub mod addr;
+#[doc = "DATA register accessor: an alias for `Reg<DATA_SPEC>`"]
+pub type DATA = crate::Reg<data::DATA_SPEC>;
+#[doc = "I2CS Data"]
+pub mod data;
diff --git a/src/sercom0/i2cs/addr.rs b/src/sercom0/i2cs/addr.rs
new file mode 100644
index 0000000..13c1569
--- /dev/null
+++ b/src/sercom0/i2cs/addr.rs
@@ -0,0 +1,230 @@
+#[doc = "Register `ADDR` reader"]
+pub struct R(crate::R<ADDR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ADDR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ADDR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ADDR` writer"]
+pub struct W(crate::W<ADDR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ADDR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ADDR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `GENCEN` reader - General Call Address Enable"]
+pub struct GENCEN_R(crate::FieldReader<bool, bool>);
+impl GENCEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        GENCEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for GENCEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `GENCEN` writer - General Call Address Enable"]
+pub struct GENCEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> GENCEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `ADDR` reader - Address Value"]
+pub struct ADDR_R(crate::FieldReader<u16, u16>);
+impl ADDR_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        ADDR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ADDR_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ADDR` writer - Address Value"]
+pub struct ADDR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ADDR_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03ff << 1)) | ((value as u32 & 0x03ff) << 1);
+        self.w
+    }
+}
+#[doc = "Field `TENBITEN` reader - Ten Bit Addressing Enable"]
+pub struct TENBITEN_R(crate::FieldReader<bool, bool>);
+impl TENBITEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TENBITEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TENBITEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TENBITEN` writer - Ten Bit Addressing Enable"]
+pub struct TENBITEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TENBITEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
+        self.w
+    }
+}
+#[doc = "Field `ADDRMASK` reader - Address Mask"]
+pub struct ADDRMASK_R(crate::FieldReader<u16, u16>);
+impl ADDRMASK_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        ADDRMASK_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ADDRMASK_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ADDRMASK` writer - Address Mask"]
+pub struct ADDRMASK_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ADDRMASK_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03ff << 17)) | ((value as u32 & 0x03ff) << 17);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - General Call Address Enable"]
+    #[inline(always)]
+    pub fn gencen(&self) -> GENCEN_R {
+        GENCEN_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bits 1:10 - Address Value"]
+    #[inline(always)]
+    pub fn addr(&self) -> ADDR_R {
+        ADDR_R::new(((self.bits >> 1) & 0x03ff) as u16)
+    }
+    #[doc = "Bit 15 - Ten Bit Addressing Enable"]
+    #[inline(always)]
+    pub fn tenbiten(&self) -> TENBITEN_R {
+        TENBITEN_R::new(((self.bits >> 15) & 0x01) != 0)
+    }
+    #[doc = "Bits 17:26 - Address Mask"]
+    #[inline(always)]
+    pub fn addrmask(&self) -> ADDRMASK_R {
+        ADDRMASK_R::new(((self.bits >> 17) & 0x03ff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - General Call Address Enable"]
+    #[inline(always)]
+    pub fn gencen(&mut self) -> GENCEN_W {
+        GENCEN_W { w: self }
+    }
+    #[doc = "Bits 1:10 - Address Value"]
+    #[inline(always)]
+    pub fn addr(&mut self) -> ADDR_W {
+        ADDR_W { w: self }
+    }
+    #[doc = "Bit 15 - Ten Bit Addressing Enable"]
+    #[inline(always)]
+    pub fn tenbiten(&mut self) -> TENBITEN_W {
+        TENBITEN_W { w: self }
+    }
+    #[doc = "Bits 17:26 - Address Mask"]
+    #[inline(always)]
+    pub fn addrmask(&mut self) -> ADDRMASK_W {
+        ADDRMASK_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CS Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addr](index.html) module"]
+pub struct ADDR_SPEC;
+impl crate::RegisterSpec for ADDR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [addr::R](R) reader structure"]
+impl crate::Readable for ADDR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [addr::W](W) writer structure"]
+impl crate::Writable for ADDR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ADDR to value 0"]
+impl crate::Resettable for ADDR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cs/ctrla.rs b/src/sercom0/i2cs/ctrla.rs
new file mode 100644
index 0000000..2b1a451
--- /dev/null
+++ b/src/sercom0/i2cs/ctrla.rs
@@ -0,0 +1,734 @@
+#[doc = "Register `CTRLA` reader"]
+pub struct R(crate::R<CTRLA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLA` writer"]
+pub struct W(crate::W<CTRLA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SWRST` writer - Software Reset"]
+pub struct SWRST_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SWRST_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Operating Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum MODE_A {
+    #[doc = "0: USART with external clock"]
+    USART_EXT_CLK = 0,
+    #[doc = "1: USART with internal clock"]
+    USART_INT_CLK = 1,
+    #[doc = "2: SPI in slave operation"]
+    SPI_SLAVE = 2,
+    #[doc = "3: SPI in master operation"]
+    SPI_MASTER = 3,
+    #[doc = "4: I2C slave operation"]
+    I2C_SLAVE = 4,
+    #[doc = "5: I2C master operation"]
+    I2C_MASTER = 5,
+}
+impl From<MODE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: MODE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `MODE` reader - Operating Mode"]
+pub struct MODE_R(crate::FieldReader<u8, MODE_A>);
+impl MODE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        MODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<MODE_A> {
+        match self.bits {
+            0 => Some(MODE_A::USART_EXT_CLK),
+            1 => Some(MODE_A::USART_INT_CLK),
+            2 => Some(MODE_A::SPI_SLAVE),
+            3 => Some(MODE_A::SPI_MASTER),
+            4 => Some(MODE_A::I2C_SLAVE),
+            5 => Some(MODE_A::I2C_MASTER),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `USART_EXT_CLK`"]
+    #[inline(always)]
+    pub fn is_usart_ext_clk(&self) -> bool {
+        **self == MODE_A::USART_EXT_CLK
+    }
+    #[doc = "Checks if the value of the field is `USART_INT_CLK`"]
+    #[inline(always)]
+    pub fn is_usart_int_clk(&self) -> bool {
+        **self == MODE_A::USART_INT_CLK
+    }
+    #[doc = "Checks if the value of the field is `SPI_SLAVE`"]
+    #[inline(always)]
+    pub fn is_spi_slave(&self) -> bool {
+        **self == MODE_A::SPI_SLAVE
+    }
+    #[doc = "Checks if the value of the field is `SPI_MASTER`"]
+    #[inline(always)]
+    pub fn is_spi_master(&self) -> bool {
+        **self == MODE_A::SPI_MASTER
+    }
+    #[doc = "Checks if the value of the field is `I2C_SLAVE`"]
+    #[inline(always)]
+    pub fn is_i2c_slave(&self) -> bool {
+        **self == MODE_A::I2C_SLAVE
+    }
+    #[doc = "Checks if the value of the field is `I2C_MASTER`"]
+    #[inline(always)]
+    pub fn is_i2c_master(&self) -> bool {
+        **self == MODE_A::I2C_MASTER
+    }
+}
+impl core::ops::Deref for MODE_R {
+    type Target = crate::FieldReader<u8, MODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MODE` writer - Operating Mode"]
+pub struct MODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: MODE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "USART with external clock"]
+    #[inline(always)]
+    pub fn usart_ext_clk(self) -> &'a mut W {
+        self.variant(MODE_A::USART_EXT_CLK)
+    }
+    #[doc = "USART with internal clock"]
+    #[inline(always)]
+    pub fn usart_int_clk(self) -> &'a mut W {
+        self.variant(MODE_A::USART_INT_CLK)
+    }
+    #[doc = "SPI in slave operation"]
+    #[inline(always)]
+    pub fn spi_slave(self) -> &'a mut W {
+        self.variant(MODE_A::SPI_SLAVE)
+    }
+    #[doc = "SPI in master operation"]
+    #[inline(always)]
+    pub fn spi_master(self) -> &'a mut W {
+        self.variant(MODE_A::SPI_MASTER)
+    }
+    #[doc = "I2C slave operation"]
+    #[inline(always)]
+    pub fn i2c_slave(self) -> &'a mut W {
+        self.variant(MODE_A::I2C_SLAVE)
+    }
+    #[doc = "I2C master operation"]
+    #[inline(always)]
+    pub fn i2c_master(self) -> &'a mut W {
+        self.variant(MODE_A::I2C_MASTER)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 2)) | ((value as u32 & 0x07) << 2);
+        self.w
+    }
+}
+#[doc = "Field `RUNSTDBY` reader - Run during Standby"]
+pub struct RUNSTDBY_R(crate::FieldReader<bool, bool>);
+impl RUNSTDBY_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RUNSTDBY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RUNSTDBY_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RUNSTDBY` writer - Run during Standby"]
+pub struct RUNSTDBY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RUNSTDBY_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
+        self.w
+    }
+}
+#[doc = "Field `PINOUT` reader - Pin Usage"]
+pub struct PINOUT_R(crate::FieldReader<bool, bool>);
+impl PINOUT_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        PINOUT_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for PINOUT_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PINOUT` writer - Pin Usage"]
+pub struct PINOUT_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PINOUT_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
+        self.w
+    }
+}
+#[doc = "SDA Hold Time\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SDAHOLD_A {
+    #[doc = "0: Disabled"]
+    DISABLE = 0,
+    #[doc = "1: 50-100ns hold time"]
+    _75NS = 1,
+    #[doc = "2: 300-600ns hold time"]
+    _450NS = 2,
+    #[doc = "3: 400-800ns hold time"]
+    _600NS = 3,
+}
+impl From<SDAHOLD_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SDAHOLD_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `SDAHOLD` reader - SDA Hold Time"]
+pub struct SDAHOLD_R(crate::FieldReader<u8, SDAHOLD_A>);
+impl SDAHOLD_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        SDAHOLD_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SDAHOLD_A {
+        match self.bits {
+            0 => SDAHOLD_A::DISABLE,
+            1 => SDAHOLD_A::_75NS,
+            2 => SDAHOLD_A::_450NS,
+            3 => SDAHOLD_A::_600NS,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLE`"]
+    #[inline(always)]
+    pub fn is_disable(&self) -> bool {
+        **self == SDAHOLD_A::DISABLE
+    }
+    #[doc = "Checks if the value of the field is `_75NS`"]
+    #[inline(always)]
+    pub fn is_75ns(&self) -> bool {
+        **self == SDAHOLD_A::_75NS
+    }
+    #[doc = "Checks if the value of the field is `_450NS`"]
+    #[inline(always)]
+    pub fn is_450ns(&self) -> bool {
+        **self == SDAHOLD_A::_450NS
+    }
+    #[doc = "Checks if the value of the field is `_600NS`"]
+    #[inline(always)]
+    pub fn is_600ns(&self) -> bool {
+        **self == SDAHOLD_A::_600NS
+    }
+}
+impl core::ops::Deref for SDAHOLD_R {
+    type Target = crate::FieldReader<u8, SDAHOLD_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SDAHOLD` writer - SDA Hold Time"]
+pub struct SDAHOLD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SDAHOLD_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: SDAHOLD_A) -> &'a mut W {
+        self.bits(variant.into())
+    }
+    #[doc = "Disabled"]
+    #[inline(always)]
+    pub fn disable(self) -> &'a mut W {
+        self.variant(SDAHOLD_A::DISABLE)
+    }
+    #[doc = "50-100ns hold time"]
+    #[inline(always)]
+    pub fn _75ns(self) -> &'a mut W {
+        self.variant(SDAHOLD_A::_75NS)
+    }
+    #[doc = "300-600ns hold time"]
+    #[inline(always)]
+    pub fn _450ns(self) -> &'a mut W {
+        self.variant(SDAHOLD_A::_450NS)
+    }
+    #[doc = "400-800ns hold time"]
+    #[inline(always)]
+    pub fn _600ns(self) -> &'a mut W {
+        self.variant(SDAHOLD_A::_600NS)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20);
+        self.w
+    }
+}
+#[doc = "Field `SEXTTOEN` reader - Slave SCL Low Extend Timeout"]
+pub struct SEXTTOEN_R(crate::FieldReader<bool, bool>);
+impl SEXTTOEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SEXTTOEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SEXTTOEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SEXTTOEN` writer - Slave SCL Low Extend Timeout"]
+pub struct SEXTTOEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SEXTTOEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
+        self.w
+    }
+}
+#[doc = "Transfer Speed\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SPEED_A {
+    #[doc = "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm) Upto 400kHz "]
+    STANDARD_AND_FAST_MODE = 0,
+    #[doc = "1: Fast-mode Plus Upto 1MHz"]
+    FASTPLUS_MODE = 1,
+    #[doc = "2: High-speed mode Upto 3.4MHz"]
+    HIGH_SPEED_MODE = 2,
+}
+impl From<SPEED_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SPEED_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `SPEED` reader - Transfer Speed"]
+pub struct SPEED_R(crate::FieldReader<u8, SPEED_A>);
+impl SPEED_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        SPEED_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SPEED_A> {
+        match self.bits {
+            0 => Some(SPEED_A::STANDARD_AND_FAST_MODE),
+            1 => Some(SPEED_A::FASTPLUS_MODE),
+            2 => Some(SPEED_A::HIGH_SPEED_MODE),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `STANDARD_AND_FAST_MODE`"]
+    #[inline(always)]
+    pub fn is_standard_and_fast_mode(&self) -> bool {
+        **self == SPEED_A::STANDARD_AND_FAST_MODE
+    }
+    #[doc = "Checks if the value of the field is `FASTPLUS_MODE`"]
+    #[inline(always)]
+    pub fn is_fastplus_mode(&self) -> bool {
+        **self == SPEED_A::FASTPLUS_MODE
+    }
+    #[doc = "Checks if the value of the field is `HIGH_SPEED_MODE`"]
+    #[inline(always)]
+    pub fn is_high_speed_mode(&self) -> bool {
+        **self == SPEED_A::HIGH_SPEED_MODE
+    }
+}
+impl core::ops::Deref for SPEED_R {
+    type Target = crate::FieldReader<u8, SPEED_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SPEED` writer - Transfer Speed"]
+pub struct SPEED_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SPEED_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: SPEED_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm) Upto 400kHz"]
+    #[inline(always)]
+    pub fn standard_and_fast_mode(self) -> &'a mut W {
+        self.variant(SPEED_A::STANDARD_AND_FAST_MODE)
+    }
+    #[doc = "Fast-mode Plus Upto 1MHz"]
+    #[inline(always)]
+    pub fn fastplus_mode(self) -> &'a mut W {
+        self.variant(SPEED_A::FASTPLUS_MODE)
+    }
+    #[doc = "High-speed mode Upto 3.4MHz"]
+    #[inline(always)]
+    pub fn high_speed_mode(self) -> &'a mut W {
+        self.variant(SPEED_A::HIGH_SPEED_MODE)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24);
+        self.w
+    }
+}
+#[doc = "Field `SCLSM` reader - SCL Clock Stretch Mode"]
+pub struct SCLSM_R(crate::FieldReader<bool, bool>);
+impl SCLSM_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SCLSM_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SCLSM_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SCLSM` writer - SCL Clock Stretch Mode"]
+pub struct SCLSM_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SCLSM_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27);
+        self.w
+    }
+}
+#[doc = "Field `LOWTOUTEN` reader - SCL Low Timeout Enable"]
+pub struct LOWTOUTEN_R(crate::FieldReader<bool, bool>);
+impl LOWTOUTEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        LOWTOUTEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LOWTOUTEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LOWTOUTEN` writer - SCL Low Timeout Enable"]
+pub struct LOWTOUTEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LOWTOUTEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bits 2:4 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&self) -> MODE_R {
+        MODE_R::new(((self.bits >> 2) & 0x07) as u8)
+    }
+    #[doc = "Bit 7 - Run during Standby"]
+    #[inline(always)]
+    pub fn runstdby(&self) -> RUNSTDBY_R {
+        RUNSTDBY_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+    #[doc = "Bit 16 - Pin Usage"]
+    #[inline(always)]
+    pub fn pinout(&self) -> PINOUT_R {
+        PINOUT_R::new(((self.bits >> 16) & 0x01) != 0)
+    }
+    #[doc = "Bits 20:21 - SDA Hold Time"]
+    #[inline(always)]
+    pub fn sdahold(&self) -> SDAHOLD_R {
+        SDAHOLD_R::new(((self.bits >> 20) & 0x03) as u8)
+    }
+    #[doc = "Bit 23 - Slave SCL Low Extend Timeout"]
+    #[inline(always)]
+    pub fn sexttoen(&self) -> SEXTTOEN_R {
+        SEXTTOEN_R::new(((self.bits >> 23) & 0x01) != 0)
+    }
+    #[doc = "Bits 24:25 - Transfer Speed"]
+    #[inline(always)]
+    pub fn speed(&self) -> SPEED_R {
+        SPEED_R::new(((self.bits >> 24) & 0x03) as u8)
+    }
+    #[doc = "Bit 27 - SCL Clock Stretch Mode"]
+    #[inline(always)]
+    pub fn sclsm(&self) -> SCLSM_R {
+        SCLSM_R::new(((self.bits >> 27) & 0x01) != 0)
+    }
+    #[doc = "Bit 30 - SCL Low Timeout Enable"]
+    #[inline(always)]
+    pub fn lowtouten(&self) -> LOWTOUTEN_R {
+        LOWTOUTEN_R::new(((self.bits >> 30) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&mut self) -> SWRST_W {
+        SWRST_W { w: self }
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Bits 2:4 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&mut self) -> MODE_W {
+        MODE_W { w: self }
+    }
+    #[doc = "Bit 7 - Run during Standby"]
+    #[inline(always)]
+    pub fn runstdby(&mut self) -> RUNSTDBY_W {
+        RUNSTDBY_W { w: self }
+    }
+    #[doc = "Bit 16 - Pin Usage"]
+    #[inline(always)]
+    pub fn pinout(&mut self) -> PINOUT_W {
+        PINOUT_W { w: self }
+    }
+    #[doc = "Bits 20:21 - SDA Hold Time"]
+    #[inline(always)]
+    pub fn sdahold(&mut self) -> SDAHOLD_W {
+        SDAHOLD_W { w: self }
+    }
+    #[doc = "Bit 23 - Slave SCL Low Extend Timeout"]
+    #[inline(always)]
+    pub fn sexttoen(&mut self) -> SEXTTOEN_W {
+        SEXTTOEN_W { w: self }
+    }
+    #[doc = "Bits 24:25 - Transfer Speed"]
+    #[inline(always)]
+    pub fn speed(&mut self) -> SPEED_W {
+        SPEED_W { w: self }
+    }
+    #[doc = "Bit 27 - SCL Clock Stretch Mode"]
+    #[inline(always)]
+    pub fn sclsm(&mut self) -> SCLSM_W {
+        SCLSM_W { w: self }
+    }
+    #[doc = "Bit 30 - SCL Low Timeout Enable"]
+    #[inline(always)]
+    pub fn lowtouten(&mut self) -> LOWTOUTEN_W {
+        LOWTOUTEN_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CS Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
+pub struct CTRLA_SPEC;
+impl crate::RegisterSpec for CTRLA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
+impl crate::Readable for CTRLA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
+impl crate::Writable for CTRLA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLA to value 0"]
+impl crate::Resettable for CTRLA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cs/ctrlb.rs b/src/sercom0/i2cs/ctrlb.rs
new file mode 100644
index 0000000..62d2b85
--- /dev/null
+++ b/src/sercom0/i2cs/ctrlb.rs
@@ -0,0 +1,322 @@
+#[doc = "Register `CTRLB` reader"]
+pub struct R(crate::R<CTRLB_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLB_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLB_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLB` writer"]
+pub struct W(crate::W<CTRLB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SMEN` reader - Smart Mode Enable"]
+pub struct SMEN_R(crate::FieldReader<bool, bool>);
+impl SMEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SMEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SMEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SMEN` writer - Smart Mode Enable"]
+pub struct SMEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SMEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
+        self.w
+    }
+}
+#[doc = "Field `GCMD` reader - PMBus Group Command"]
+pub struct GCMD_R(crate::FieldReader<bool, bool>);
+impl GCMD_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        GCMD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for GCMD_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `GCMD` writer - PMBus Group Command"]
+pub struct GCMD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> GCMD_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
+        self.w
+    }
+}
+#[doc = "Field `AACKEN` reader - Automatic Address Acknowledge"]
+pub struct AACKEN_R(crate::FieldReader<bool, bool>);
+impl AACKEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        AACKEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for AACKEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `AACKEN` writer - Automatic Address Acknowledge"]
+pub struct AACKEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> AACKEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
+        self.w
+    }
+}
+#[doc = "Field `AMODE` reader - Address Mode"]
+pub struct AMODE_R(crate::FieldReader<u8, u8>);
+impl AMODE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        AMODE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for AMODE_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `AMODE` writer - Address Mode"]
+pub struct AMODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> AMODE_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14);
+        self.w
+    }
+}
+#[doc = "Field `CMD` reader - Command"]
+pub struct CMD_R(crate::FieldReader<u8, u8>);
+impl CMD_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        CMD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CMD_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CMD` writer - Command"]
+pub struct CMD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CMD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16);
+        self.w
+    }
+}
+#[doc = "Field `ACKACT` reader - Acknowledge Action"]
+pub struct ACKACT_R(crate::FieldReader<bool, bool>);
+impl ACKACT_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ACKACT_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ACKACT_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ACKACT` writer - Acknowledge Action"]
+pub struct ACKACT_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ACKACT_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 8 - Smart Mode Enable"]
+    #[inline(always)]
+    pub fn smen(&self) -> SMEN_R {
+        SMEN_R::new(((self.bits >> 8) & 0x01) != 0)
+    }
+    #[doc = "Bit 9 - PMBus Group Command"]
+    #[inline(always)]
+    pub fn gcmd(&self) -> GCMD_R {
+        GCMD_R::new(((self.bits >> 9) & 0x01) != 0)
+    }
+    #[doc = "Bit 10 - Automatic Address Acknowledge"]
+    #[inline(always)]
+    pub fn aacken(&self) -> AACKEN_R {
+        AACKEN_R::new(((self.bits >> 10) & 0x01) != 0)
+    }
+    #[doc = "Bits 14:15 - Address Mode"]
+    #[inline(always)]
+    pub fn amode(&self) -> AMODE_R {
+        AMODE_R::new(((self.bits >> 14) & 0x03) as u8)
+    }
+    #[doc = "Bits 16:17 - Command"]
+    #[inline(always)]
+    pub fn cmd(&self) -> CMD_R {
+        CMD_R::new(((self.bits >> 16) & 0x03) as u8)
+    }
+    #[doc = "Bit 18 - Acknowledge Action"]
+    #[inline(always)]
+    pub fn ackact(&self) -> ACKACT_R {
+        ACKACT_R::new(((self.bits >> 18) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 8 - Smart Mode Enable"]
+    #[inline(always)]
+    pub fn smen(&mut self) -> SMEN_W {
+        SMEN_W { w: self }
+    }
+    #[doc = "Bit 9 - PMBus Group Command"]
+    #[inline(always)]
+    pub fn gcmd(&mut self) -> GCMD_W {
+        GCMD_W { w: self }
+    }
+    #[doc = "Bit 10 - Automatic Address Acknowledge"]
+    #[inline(always)]
+    pub fn aacken(&mut self) -> AACKEN_W {
+        AACKEN_W { w: self }
+    }
+    #[doc = "Bits 14:15 - Address Mode"]
+    #[inline(always)]
+    pub fn amode(&mut self) -> AMODE_W {
+        AMODE_W { w: self }
+    }
+    #[doc = "Bits 16:17 - Command"]
+    #[inline(always)]
+    pub fn cmd(&mut self) -> CMD_W {
+        CMD_W { w: self }
+    }
+    #[doc = "Bit 18 - Acknowledge Action"]
+    #[inline(always)]
+    pub fn ackact(&mut self) -> ACKACT_W {
+        ACKACT_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CS Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"]
+pub struct CTRLB_SPEC;
+impl crate::RegisterSpec for CTRLB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrlb::R](R) reader structure"]
+impl crate::Readable for CTRLB_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"]
+impl crate::Writable for CTRLB_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLB to value 0"]
+impl crate::Resettable for CTRLB_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cs/data.rs b/src/sercom0/i2cs/data.rs
new file mode 100644
index 0000000..4908719
--- /dev/null
+++ b/src/sercom0/i2cs/data.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `DATA` reader"]
+pub struct R(crate::R<DATA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DATA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DATA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DATA` writer"]
+pub struct W(crate::W<DATA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DATA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DATA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DATA` reader - Data Value"]
+pub struct DATA_R(crate::FieldReader<u8, u8>);
+impl DATA_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        DATA_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DATA_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DATA` writer - Data Value"]
+pub struct DATA_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DATA_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xff) | (value as u8 & 0xff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Data Value"]
+    #[inline(always)]
+    pub fn data(&self) -> DATA_R {
+        DATA_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Data Value"]
+    #[inline(always)]
+    pub fn data(&mut self) -> DATA_W {
+        DATA_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CS Data\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"]
+pub struct DATA_SPEC;
+impl crate::RegisterSpec for DATA_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [data::R](R) reader structure"]
+impl crate::Readable for DATA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"]
+impl crate::Writable for DATA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DATA to value 0"]
+impl crate::Resettable for DATA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cs/intenclr.rs b/src/sercom0/i2cs/intenclr.rs
new file mode 100644
index 0000000..4025ccf
--- /dev/null
+++ b/src/sercom0/i2cs/intenclr.rs
@@ -0,0 +1,250 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PREC` reader - Stop Received Interrupt Disable"]
+pub struct PREC_R(crate::FieldReader<bool, bool>);
+impl PREC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        PREC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for PREC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PREC` writer - Stop Received Interrupt Disable"]
+pub struct PREC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PREC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `AMATCH` reader - Address Match Interrupt Disable"]
+pub struct AMATCH_R(crate::FieldReader<bool, bool>);
+impl AMATCH_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        AMATCH_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for AMATCH_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `AMATCH` writer - Address Match Interrupt Disable"]
+pub struct AMATCH_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> AMATCH_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `DRDY` reader - Data Interrupt Disable"]
+pub struct DRDY_R(crate::FieldReader<bool, bool>);
+impl DRDY_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRDY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRDY_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRDY` writer - Data Interrupt Disable"]
+pub struct DRDY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRDY_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt Disable"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt Disable"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Stop Received Interrupt Disable"]
+    #[inline(always)]
+    pub fn prec(&self) -> PREC_R {
+        PREC_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Address Match Interrupt Disable"]
+    #[inline(always)]
+    pub fn amatch(&self) -> AMATCH_R {
+        AMATCH_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Data Interrupt Disable"]
+    #[inline(always)]
+    pub fn drdy(&self) -> DRDY_R {
+        DRDY_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Disable"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop Received Interrupt Disable"]
+    #[inline(always)]
+    pub fn prec(&mut self) -> PREC_W {
+        PREC_W { w: self }
+    }
+    #[doc = "Bit 1 - Address Match Interrupt Disable"]
+    #[inline(always)]
+    pub fn amatch(&mut self) -> AMATCH_W {
+        AMATCH_W { w: self }
+    }
+    #[doc = "Bit 2 - Data Interrupt Disable"]
+    #[inline(always)]
+    pub fn drdy(&mut self) -> DRDY_W {
+        DRDY_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Disable"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CS Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cs/intenset.rs b/src/sercom0/i2cs/intenset.rs
new file mode 100644
index 0000000..8cc2318
--- /dev/null
+++ b/src/sercom0/i2cs/intenset.rs
@@ -0,0 +1,250 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PREC` reader - Stop Received Interrupt Enable"]
+pub struct PREC_R(crate::FieldReader<bool, bool>);
+impl PREC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        PREC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for PREC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PREC` writer - Stop Received Interrupt Enable"]
+pub struct PREC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PREC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `AMATCH` reader - Address Match Interrupt Enable"]
+pub struct AMATCH_R(crate::FieldReader<bool, bool>);
+impl AMATCH_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        AMATCH_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for AMATCH_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `AMATCH` writer - Address Match Interrupt Enable"]
+pub struct AMATCH_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> AMATCH_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `DRDY` reader - Data Interrupt Enable"]
+pub struct DRDY_R(crate::FieldReader<bool, bool>);
+impl DRDY_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRDY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRDY_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRDY` writer - Data Interrupt Enable"]
+pub struct DRDY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRDY_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt Enable"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt Enable"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Stop Received Interrupt Enable"]
+    #[inline(always)]
+    pub fn prec(&self) -> PREC_R {
+        PREC_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Address Match Interrupt Enable"]
+    #[inline(always)]
+    pub fn amatch(&self) -> AMATCH_R {
+        AMATCH_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Data Interrupt Enable"]
+    #[inline(always)]
+    pub fn drdy(&self) -> DRDY_R {
+        DRDY_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Enable"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop Received Interrupt Enable"]
+    #[inline(always)]
+    pub fn prec(&mut self) -> PREC_W {
+        PREC_W { w: self }
+    }
+    #[doc = "Bit 1 - Address Match Interrupt Enable"]
+    #[inline(always)]
+    pub fn amatch(&mut self) -> AMATCH_W {
+        AMATCH_W { w: self }
+    }
+    #[doc = "Bit 2 - Data Interrupt Enable"]
+    #[inline(always)]
+    pub fn drdy(&mut self) -> DRDY_W {
+        DRDY_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Enable"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CS Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cs/intflag.rs b/src/sercom0/i2cs/intflag.rs
new file mode 100644
index 0000000..a847325
--- /dev/null
+++ b/src/sercom0/i2cs/intflag.rs
@@ -0,0 +1,250 @@
+#[doc = "Register `INTFLAG` reader"]
+pub struct R(crate::R<INTFLAG_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTFLAG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTFLAG_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTFLAG_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTFLAG` writer"]
+pub struct W(crate::W<INTFLAG_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTFLAG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTFLAG_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTFLAG_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PREC` reader - Stop Received Interrupt"]
+pub struct PREC_R(crate::FieldReader<bool, bool>);
+impl PREC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        PREC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for PREC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PREC` writer - Stop Received Interrupt"]
+pub struct PREC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PREC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `AMATCH` reader - Address Match Interrupt"]
+pub struct AMATCH_R(crate::FieldReader<bool, bool>);
+impl AMATCH_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        AMATCH_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for AMATCH_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `AMATCH` writer - Address Match Interrupt"]
+pub struct AMATCH_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> AMATCH_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `DRDY` reader - Data Interrupt"]
+pub struct DRDY_R(crate::FieldReader<bool, bool>);
+impl DRDY_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRDY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRDY_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRDY` writer - Data Interrupt"]
+pub struct DRDY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRDY_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Stop Received Interrupt"]
+    #[inline(always)]
+    pub fn prec(&self) -> PREC_R {
+        PREC_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Address Match Interrupt"]
+    #[inline(always)]
+    pub fn amatch(&self) -> AMATCH_R {
+        AMATCH_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Data Interrupt"]
+    #[inline(always)]
+    pub fn drdy(&self) -> DRDY_R {
+        DRDY_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop Received Interrupt"]
+    #[inline(always)]
+    pub fn prec(&mut self) -> PREC_W {
+        PREC_W { w: self }
+    }
+    #[doc = "Bit 1 - Address Match Interrupt"]
+    #[inline(always)]
+    pub fn amatch(&mut self) -> AMATCH_W {
+        AMATCH_W { w: self }
+    }
+    #[doc = "Bit 2 - Data Interrupt"]
+    #[inline(always)]
+    pub fn drdy(&mut self) -> DRDY_W {
+        DRDY_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CS Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"]
+pub struct INTFLAG_SPEC;
+impl crate::RegisterSpec for INTFLAG_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intflag::R](R) reader structure"]
+impl crate::Readable for INTFLAG_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"]
+impl crate::Writable for INTFLAG_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTFLAG to value 0"]
+impl crate::Resettable for INTFLAG_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cs/status.rs b/src/sercom0/i2cs/status.rs
new file mode 100644
index 0000000..489716f
--- /dev/null
+++ b/src/sercom0/i2cs/status.rs
@@ -0,0 +1,480 @@
+#[doc = "Register `STATUS` reader"]
+pub struct R(crate::R<STATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<STATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `STATUS` writer"]
+pub struct W(crate::W<STATUS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<STATUS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<STATUS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BUSERR` reader - Bus Error"]
+pub struct BUSERR_R(crate::FieldReader<bool, bool>);
+impl BUSERR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        BUSERR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BUSERR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BUSERR` writer - Bus Error"]
+pub struct BUSERR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BUSERR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `COLL` reader - Transmit Collision"]
+pub struct COLL_R(crate::FieldReader<bool, bool>);
+impl COLL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        COLL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for COLL_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `COLL` writer - Transmit Collision"]
+pub struct COLL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> COLL_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXNACK` reader - Received Not Acknowledge"]
+pub struct RXNACK_R(crate::FieldReader<bool, bool>);
+impl RXNACK_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXNACK_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXNACK_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXNACK` writer - Received Not Acknowledge"]
+pub struct RXNACK_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXNACK_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `DIR` reader - Read/Write Direction"]
+pub struct DIR_R(crate::FieldReader<bool, bool>);
+impl DIR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DIR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DIR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DIR` writer - Read/Write Direction"]
+pub struct DIR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DIR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `SR` reader - Repeated Start"]
+pub struct SR_R(crate::FieldReader<bool, bool>);
+impl SR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SR` writer - Repeated Start"]
+pub struct SR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `LOWTOUT` reader - SCL Low Timeout"]
+pub struct LOWTOUT_R(crate::FieldReader<bool, bool>);
+impl LOWTOUT_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        LOWTOUT_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LOWTOUT_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LOWTOUT` writer - SCL Low Timeout"]
+pub struct LOWTOUT_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LOWTOUT_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6);
+        self.w
+    }
+}
+#[doc = "Field `CLKHOLD` reader - Clock Hold"]
+pub struct CLKHOLD_R(crate::FieldReader<bool, bool>);
+impl CLKHOLD_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CLKHOLD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CLKHOLD_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CLKHOLD` writer - Clock Hold"]
+pub struct CLKHOLD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CLKHOLD_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7);
+        self.w
+    }
+}
+#[doc = "Field `SEXTTOUT` reader - Slave SCL Low Extend Timeout"]
+pub struct SEXTTOUT_R(crate::FieldReader<bool, bool>);
+impl SEXTTOUT_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SEXTTOUT_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SEXTTOUT_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SEXTTOUT` writer - Slave SCL Low Extend Timeout"]
+pub struct SEXTTOUT_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SEXTTOUT_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u16 & 0x01) << 9);
+        self.w
+    }
+}
+#[doc = "Field `HS` reader - High Speed"]
+pub struct HS_R(crate::FieldReader<bool, bool>);
+impl HS_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        HS_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for HS_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `HS` writer - High Speed"]
+pub struct HS_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> HS_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u16 & 0x01) << 10);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Bus Error"]
+    #[inline(always)]
+    pub fn buserr(&self) -> BUSERR_R {
+        BUSERR_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Collision"]
+    #[inline(always)]
+    pub fn coll(&self) -> COLL_R {
+        COLL_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Received Not Acknowledge"]
+    #[inline(always)]
+    pub fn rxnack(&self) -> RXNACK_R {
+        RXNACK_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Read/Write Direction"]
+    #[inline(always)]
+    pub fn dir(&self) -> DIR_R {
+        DIR_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - Repeated Start"]
+    #[inline(always)]
+    pub fn sr(&self) -> SR_R {
+        SR_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 6 - SCL Low Timeout"]
+    #[inline(always)]
+    pub fn lowtout(&self) -> LOWTOUT_R {
+        LOWTOUT_R::new(((self.bits >> 6) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Clock Hold"]
+    #[inline(always)]
+    pub fn clkhold(&self) -> CLKHOLD_R {
+        CLKHOLD_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+    #[doc = "Bit 9 - Slave SCL Low Extend Timeout"]
+    #[inline(always)]
+    pub fn sexttout(&self) -> SEXTTOUT_R {
+        SEXTTOUT_R::new(((self.bits >> 9) & 0x01) != 0)
+    }
+    #[doc = "Bit 10 - High Speed"]
+    #[inline(always)]
+    pub fn hs(&self) -> HS_R {
+        HS_R::new(((self.bits >> 10) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Bus Error"]
+    #[inline(always)]
+    pub fn buserr(&mut self) -> BUSERR_W {
+        BUSERR_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Collision"]
+    #[inline(always)]
+    pub fn coll(&mut self) -> COLL_W {
+        COLL_W { w: self }
+    }
+    #[doc = "Bit 2 - Received Not Acknowledge"]
+    #[inline(always)]
+    pub fn rxnack(&mut self) -> RXNACK_W {
+        RXNACK_W { w: self }
+    }
+    #[doc = "Bit 3 - Read/Write Direction"]
+    #[inline(always)]
+    pub fn dir(&mut self) -> DIR_W {
+        DIR_W { w: self }
+    }
+    #[doc = "Bit 4 - Repeated Start"]
+    #[inline(always)]
+    pub fn sr(&mut self) -> SR_W {
+        SR_W { w: self }
+    }
+    #[doc = "Bit 6 - SCL Low Timeout"]
+    #[inline(always)]
+    pub fn lowtout(&mut self) -> LOWTOUT_W {
+        LOWTOUT_W { w: self }
+    }
+    #[doc = "Bit 7 - Clock Hold"]
+    #[inline(always)]
+    pub fn clkhold(&mut self) -> CLKHOLD_W {
+        CLKHOLD_W { w: self }
+    }
+    #[doc = "Bit 9 - Slave SCL Low Extend Timeout"]
+    #[inline(always)]
+    pub fn sexttout(&mut self) -> SEXTTOUT_W {
+        SEXTTOUT_W { w: self }
+    }
+    #[doc = "Bit 10 - High Speed"]
+    #[inline(always)]
+    pub fn hs(&mut self) -> HS_W {
+        HS_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "I2CS Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
+pub struct STATUS_SPEC;
+impl crate::RegisterSpec for STATUS_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [status::R](R) reader structure"]
+impl crate::Readable for STATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"]
+impl crate::Writable for STATUS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets STATUS to value 0"]
+impl crate::Resettable for STATUS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/i2cs/syncbusy.rs b/src/sercom0/i2cs/syncbusy.rs
new file mode 100644
index 0000000..8036450
--- /dev/null
+++ b/src/sercom0/i2cs/syncbusy.rs
@@ -0,0 +1,71 @@
+#[doc = "Register `SYNCBUSY` reader"]
+pub struct R(crate::R<SYNCBUSY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYNCBUSY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYNCBUSY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset Synchronization Busy"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` reader - SERCOM Enable Synchronization Busy"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset Synchronization Busy"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - SERCOM Enable Synchronization Busy"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+}
+#[doc = "I2CS Synchronization Busy\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"]
+pub struct SYNCBUSY_SPEC;
+impl crate::RegisterSpec for SYNCBUSY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [syncbusy::R](R) reader structure"]
+impl crate::Readable for SYNCBUSY_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets SYNCBUSY to value 0"]
+impl crate::Resettable for SYNCBUSY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spim.rs b/src/sercom0/spim.rs
new file mode 100644
index 0000000..528e38e
--- /dev/null
+++ b/src/sercom0/spim.rs
@@ -0,0 +1,44 @@
+#[doc = "CTRLA register accessor: an alias for `Reg<CTRLA_SPEC>`"]
+pub type CTRLA = crate::Reg<ctrla::CTRLA_SPEC>;
+#[doc = "SPIM Control A"]
+pub mod ctrla;
+#[doc = "CTRLB register accessor: an alias for `Reg<CTRLB_SPEC>`"]
+pub type CTRLB = crate::Reg<ctrlb::CTRLB_SPEC>;
+#[doc = "SPIM Control B"]
+pub mod ctrlb;
+#[doc = "BAUD register accessor: an alias for `Reg<BAUD_SPEC>`"]
+pub type BAUD = crate::Reg<baud::BAUD_SPEC>;
+#[doc = "SPIM Baud Rate"]
+pub mod baud;
+#[doc = "INTENCLR register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "SPIM Interrupt Enable Clear"]
+pub mod intenclr;
+#[doc = "INTENSET register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "SPIM Interrupt Enable Set"]
+pub mod intenset;
+#[doc = "INTFLAG register accessor: an alias for `Reg<INTFLAG_SPEC>`"]
+pub type INTFLAG = crate::Reg<intflag::INTFLAG_SPEC>;
+#[doc = "SPIM Interrupt Flag Status and Clear"]
+pub mod intflag;
+#[doc = "STATUS register accessor: an alias for `Reg<STATUS_SPEC>`"]
+pub type STATUS = crate::Reg<status::STATUS_SPEC>;
+#[doc = "SPIM Status"]
+pub mod status;
+#[doc = "SYNCBUSY register accessor: an alias for `Reg<SYNCBUSY_SPEC>`"]
+pub type SYNCBUSY = crate::Reg<syncbusy::SYNCBUSY_SPEC>;
+#[doc = "SPIM Synchronization Busy"]
+pub mod syncbusy;
+#[doc = "ADDR register accessor: an alias for `Reg<ADDR_SPEC>`"]
+pub type ADDR = crate::Reg<addr::ADDR_SPEC>;
+#[doc = "SPIM Address"]
+pub mod addr;
+#[doc = "DATA register accessor: an alias for `Reg<DATA_SPEC>`"]
+pub type DATA = crate::Reg<data::DATA_SPEC>;
+#[doc = "SPIM Data"]
+pub mod data;
+#[doc = "DBGCTRL register accessor: an alias for `Reg<DBGCTRL_SPEC>`"]
+pub type DBGCTRL = crate::Reg<dbgctrl::DBGCTRL_SPEC>;
+#[doc = "SPIM Debug Control"]
+pub mod dbgctrl;
diff --git a/src/sercom0/spim/addr.rs b/src/sercom0/spim/addr.rs
new file mode 100644
index 0000000..c1892a3
--- /dev/null
+++ b/src/sercom0/spim/addr.rs
@@ -0,0 +1,138 @@
+#[doc = "Register `ADDR` reader"]
+pub struct R(crate::R<ADDR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ADDR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ADDR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ADDR` writer"]
+pub struct W(crate::W<ADDR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ADDR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ADDR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ADDR` reader - Address Value"]
+pub struct ADDR_R(crate::FieldReader<u8, u8>);
+impl ADDR_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        ADDR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ADDR_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ADDR` writer - Address Value"]
+pub struct ADDR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ADDR_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff);
+        self.w
+    }
+}
+#[doc = "Field `ADDRMASK` reader - Address Mask"]
+pub struct ADDRMASK_R(crate::FieldReader<u8, u8>);
+impl ADDRMASK_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        ADDRMASK_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ADDRMASK_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ADDRMASK` writer - Address Mask"]
+pub struct ADDRMASK_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ADDRMASK_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0xff << 16)) | ((value as u32 & 0xff) << 16);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Address Value"]
+    #[inline(always)]
+    pub fn addr(&self) -> ADDR_R {
+        ADDR_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bits 16:23 - Address Mask"]
+    #[inline(always)]
+    pub fn addrmask(&self) -> ADDRMASK_R {
+        ADDRMASK_R::new(((self.bits >> 16) & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Address Value"]
+    #[inline(always)]
+    pub fn addr(&mut self) -> ADDR_W {
+        ADDR_W { w: self }
+    }
+    #[doc = "Bits 16:23 - Address Mask"]
+    #[inline(always)]
+    pub fn addrmask(&mut self) -> ADDRMASK_W {
+        ADDRMASK_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIM Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addr](index.html) module"]
+pub struct ADDR_SPEC;
+impl crate::RegisterSpec for ADDR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [addr::R](R) reader structure"]
+impl crate::Readable for ADDR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [addr::W](W) writer structure"]
+impl crate::Writable for ADDR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ADDR to value 0"]
+impl crate::Resettable for ADDR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spim/baud.rs b/src/sercom0/spim/baud.rs
new file mode 100644
index 0000000..93cfeee
--- /dev/null
+++ b/src/sercom0/spim/baud.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `BAUD` reader"]
+pub struct R(crate::R<BAUD_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<BAUD_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<BAUD_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<BAUD_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `BAUD` writer"]
+pub struct W(crate::W<BAUD_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<BAUD_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<BAUD_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<BAUD_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BAUD` reader - Baud Rate Value"]
+pub struct BAUD_R(crate::FieldReader<u8, u8>);
+impl BAUD_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        BAUD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BAUD_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BAUD` writer - Baud Rate Value"]
+pub struct BAUD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BAUD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xff) | (value as u8 & 0xff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&self) -> BAUD_R {
+        BAUD_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&mut self) -> BAUD_W {
+        BAUD_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIM Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud](index.html) module"]
+pub struct BAUD_SPEC;
+impl crate::RegisterSpec for BAUD_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [baud::R](R) reader structure"]
+impl crate::Readable for BAUD_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [baud::W](W) writer structure"]
+impl crate::Writable for BAUD_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets BAUD to value 0"]
+impl crate::Resettable for BAUD_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spim/ctrla.rs b/src/sercom0/spim/ctrla.rs
new file mode 100644
index 0000000..4fc2d85
--- /dev/null
+++ b/src/sercom0/spim/ctrla.rs
@@ -0,0 +1,981 @@
+#[doc = "Register `CTRLA` reader"]
+pub struct R(crate::R<CTRLA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLA` writer"]
+pub struct W(crate::W<CTRLA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SWRST` writer - Software Reset"]
+pub struct SWRST_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SWRST_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Operating Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum MODE_A {
+    #[doc = "0: USART with external clock"]
+    USART_EXT_CLK = 0,
+    #[doc = "1: USART with internal clock"]
+    USART_INT_CLK = 1,
+    #[doc = "2: SPI in slave operation"]
+    SPI_SLAVE = 2,
+    #[doc = "3: SPI in master operation"]
+    SPI_MASTER = 3,
+    #[doc = "4: I2C slave operation"]
+    I2C_SLAVE = 4,
+    #[doc = "5: I2C master operation"]
+    I2C_MASTER = 5,
+}
+impl From<MODE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: MODE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `MODE` reader - Operating Mode"]
+pub struct MODE_R(crate::FieldReader<u8, MODE_A>);
+impl MODE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        MODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<MODE_A> {
+        match self.bits {
+            0 => Some(MODE_A::USART_EXT_CLK),
+            1 => Some(MODE_A::USART_INT_CLK),
+            2 => Some(MODE_A::SPI_SLAVE),
+            3 => Some(MODE_A::SPI_MASTER),
+            4 => Some(MODE_A::I2C_SLAVE),
+            5 => Some(MODE_A::I2C_MASTER),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `USART_EXT_CLK`"]
+    #[inline(always)]
+    pub fn is_usart_ext_clk(&self) -> bool {
+        **self == MODE_A::USART_EXT_CLK
+    }
+    #[doc = "Checks if the value of the field is `USART_INT_CLK`"]
+    #[inline(always)]
+    pub fn is_usart_int_clk(&self) -> bool {
+        **self == MODE_A::USART_INT_CLK
+    }
+    #[doc = "Checks if the value of the field is `SPI_SLAVE`"]
+    #[inline(always)]
+    pub fn is_spi_slave(&self) -> bool {
+        **self == MODE_A::SPI_SLAVE
+    }
+    #[doc = "Checks if the value of the field is `SPI_MASTER`"]
+    #[inline(always)]
+    pub fn is_spi_master(&self) -> bool {
+        **self == MODE_A::SPI_MASTER
+    }
+    #[doc = "Checks if the value of the field is `I2C_SLAVE`"]
+    #[inline(always)]
+    pub fn is_i2c_slave(&self) -> bool {
+        **self == MODE_A::I2C_SLAVE
+    }
+    #[doc = "Checks if the value of the field is `I2C_MASTER`"]
+    #[inline(always)]
+    pub fn is_i2c_master(&self) -> bool {
+        **self == MODE_A::I2C_MASTER
+    }
+}
+impl core::ops::Deref for MODE_R {
+    type Target = crate::FieldReader<u8, MODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MODE` writer - Operating Mode"]
+pub struct MODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: MODE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "USART with external clock"]
+    #[inline(always)]
+    pub fn usart_ext_clk(self) -> &'a mut W {
+        self.variant(MODE_A::USART_EXT_CLK)
+    }
+    #[doc = "USART with internal clock"]
+    #[inline(always)]
+    pub fn usart_int_clk(self) -> &'a mut W {
+        self.variant(MODE_A::USART_INT_CLK)
+    }
+    #[doc = "SPI in slave operation"]
+    #[inline(always)]
+    pub fn spi_slave(self) -> &'a mut W {
+        self.variant(MODE_A::SPI_SLAVE)
+    }
+    #[doc = "SPI in master operation"]
+    #[inline(always)]
+    pub fn spi_master(self) -> &'a mut W {
+        self.variant(MODE_A::SPI_MASTER)
+    }
+    #[doc = "I2C slave operation"]
+    #[inline(always)]
+    pub fn i2c_slave(self) -> &'a mut W {
+        self.variant(MODE_A::I2C_SLAVE)
+    }
+    #[doc = "I2C master operation"]
+    #[inline(always)]
+    pub fn i2c_master(self) -> &'a mut W {
+        self.variant(MODE_A::I2C_MASTER)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 2)) | ((value as u32 & 0x07) << 2);
+        self.w
+    }
+}
+#[doc = "Field `RUNSTDBY` reader - Run during Standby"]
+pub struct RUNSTDBY_R(crate::FieldReader<bool, bool>);
+impl RUNSTDBY_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RUNSTDBY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RUNSTDBY_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RUNSTDBY` writer - Run during Standby"]
+pub struct RUNSTDBY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RUNSTDBY_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
+        self.w
+    }
+}
+#[doc = "Field `IBON` reader - Immediate Buffer Overflow Notification"]
+pub struct IBON_R(crate::FieldReader<bool, bool>);
+impl IBON_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        IBON_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for IBON_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `IBON` writer - Immediate Buffer Overflow Notification"]
+pub struct IBON_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> IBON_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
+        self.w
+    }
+}
+#[doc = "Data Out Pinout\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum DOPO_A {
+    #[doc = "0: DO on PAD\\[0\\], SCK on PAD\\[1\\]
+and SS on PAD\\[2\\]"]
+    PAD0 = 0,
+    #[doc = "1: DO on PAD\\[2\\], SCK on PAD\\[3\\]
+and SS on PAD\\[1\\]"]
+    PAD1 = 1,
+    #[doc = "2: DO on PAD\\[3\\], SCK on PAD\\[1\\]
+and SS on PAD\\[2\\]"]
+    PAD2 = 2,
+    #[doc = "3: DO on PAD\\[0\\], SCK on PAD\\[3\\]
+and SS on PAD\\[1\\]"]
+    PAD3 = 3,
+}
+impl From<DOPO_A> for u8 {
+    #[inline(always)]
+    fn from(variant: DOPO_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `DOPO` reader - Data Out Pinout"]
+pub struct DOPO_R(crate::FieldReader<u8, DOPO_A>);
+impl DOPO_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        DOPO_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DOPO_A {
+        match self.bits {
+            0 => DOPO_A::PAD0,
+            1 => DOPO_A::PAD1,
+            2 => DOPO_A::PAD2,
+            3 => DOPO_A::PAD3,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `PAD0`"]
+    #[inline(always)]
+    pub fn is_pad0(&self) -> bool {
+        **self == DOPO_A::PAD0
+    }
+    #[doc = "Checks if the value of the field is `PAD1`"]
+    #[inline(always)]
+    pub fn is_pad1(&self) -> bool {
+        **self == DOPO_A::PAD1
+    }
+    #[doc = "Checks if the value of the field is `PAD2`"]
+    #[inline(always)]
+    pub fn is_pad2(&self) -> bool {
+        **self == DOPO_A::PAD2
+    }
+    #[doc = "Checks if the value of the field is `PAD3`"]
+    #[inline(always)]
+    pub fn is_pad3(&self) -> bool {
+        **self == DOPO_A::PAD3
+    }
+}
+impl core::ops::Deref for DOPO_R {
+    type Target = crate::FieldReader<u8, DOPO_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DOPO` writer - Data Out Pinout"]
+pub struct DOPO_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DOPO_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: DOPO_A) -> &'a mut W {
+        self.bits(variant.into())
+    }
+    #[doc = "DO on PAD\\[0\\], SCK on PAD\\[1\\]
+and SS on PAD\\[2\\]"]
+    #[inline(always)]
+    pub fn pad0(self) -> &'a mut W {
+        self.variant(DOPO_A::PAD0)
+    }
+    #[doc = "DO on PAD\\[2\\], SCK on PAD\\[3\\]
+and SS on PAD\\[1\\]"]
+    #[inline(always)]
+    pub fn pad1(self) -> &'a mut W {
+        self.variant(DOPO_A::PAD1)
+    }
+    #[doc = "DO on PAD\\[3\\], SCK on PAD\\[1\\]
+and SS on PAD\\[2\\]"]
+    #[inline(always)]
+    pub fn pad2(self) -> &'a mut W {
+        self.variant(DOPO_A::PAD2)
+    }
+    #[doc = "DO on PAD\\[0\\], SCK on PAD\\[3\\]
+and SS on PAD\\[1\\]"]
+    #[inline(always)]
+    pub fn pad3(self) -> &'a mut W {
+        self.variant(DOPO_A::PAD3)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16);
+        self.w
+    }
+}
+#[doc = "Data In Pinout\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum DIPO_A {
+    #[doc = "0: SERCOM PAD\\[0\\]"]
+    PAD0 = 0,
+    #[doc = "1: SERCOM PAD\\[1\\]"]
+    PAD1 = 1,
+    #[doc = "2: SERCOM PAD\\[2\\]"]
+    PAD2 = 2,
+    #[doc = "3: SERCOM PAD\\[3\\]"]
+    PAD3 = 3,
+}
+impl From<DIPO_A> for u8 {
+    #[inline(always)]
+    fn from(variant: DIPO_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `DIPO` reader - Data In Pinout"]
+pub struct DIPO_R(crate::FieldReader<u8, DIPO_A>);
+impl DIPO_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        DIPO_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DIPO_A {
+        match self.bits {
+            0 => DIPO_A::PAD0,
+            1 => DIPO_A::PAD1,
+            2 => DIPO_A::PAD2,
+            3 => DIPO_A::PAD3,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `PAD0`"]
+    #[inline(always)]
+    pub fn is_pad0(&self) -> bool {
+        **self == DIPO_A::PAD0
+    }
+    #[doc = "Checks if the value of the field is `PAD1`"]
+    #[inline(always)]
+    pub fn is_pad1(&self) -> bool {
+        **self == DIPO_A::PAD1
+    }
+    #[doc = "Checks if the value of the field is `PAD2`"]
+    #[inline(always)]
+    pub fn is_pad2(&self) -> bool {
+        **self == DIPO_A::PAD2
+    }
+    #[doc = "Checks if the value of the field is `PAD3`"]
+    #[inline(always)]
+    pub fn is_pad3(&self) -> bool {
+        **self == DIPO_A::PAD3
+    }
+}
+impl core::ops::Deref for DIPO_R {
+    type Target = crate::FieldReader<u8, DIPO_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DIPO` writer - Data In Pinout"]
+pub struct DIPO_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DIPO_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: DIPO_A) -> &'a mut W {
+        self.bits(variant.into())
+    }
+    #[doc = "SERCOM PAD\\[0\\]"]
+    #[inline(always)]
+    pub fn pad0(self) -> &'a mut W {
+        self.variant(DIPO_A::PAD0)
+    }
+    #[doc = "SERCOM PAD\\[1\\]"]
+    #[inline(always)]
+    pub fn pad1(self) -> &'a mut W {
+        self.variant(DIPO_A::PAD1)
+    }
+    #[doc = "SERCOM PAD\\[2\\]"]
+    #[inline(always)]
+    pub fn pad2(self) -> &'a mut W {
+        self.variant(DIPO_A::PAD2)
+    }
+    #[doc = "SERCOM PAD\\[3\\]"]
+    #[inline(always)]
+    pub fn pad3(self) -> &'a mut W {
+        self.variant(DIPO_A::PAD3)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20);
+        self.w
+    }
+}
+#[doc = "Frame Format\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum FORM_A {
+    #[doc = "0: SPI Frame"]
+    SPI_FRAME = 0,
+    #[doc = "2: SPI Frame with Addr"]
+    SPI_FRAME_WITH_ADDR = 2,
+}
+impl From<FORM_A> for u8 {
+    #[inline(always)]
+    fn from(variant: FORM_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `FORM` reader - Frame Format"]
+pub struct FORM_R(crate::FieldReader<u8, FORM_A>);
+impl FORM_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        FORM_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<FORM_A> {
+        match self.bits {
+            0 => Some(FORM_A::SPI_FRAME),
+            2 => Some(FORM_A::SPI_FRAME_WITH_ADDR),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `SPI_FRAME`"]
+    #[inline(always)]
+    pub fn is_spi_frame(&self) -> bool {
+        **self == FORM_A::SPI_FRAME
+    }
+    #[doc = "Checks if the value of the field is `SPI_FRAME_WITH_ADDR`"]
+    #[inline(always)]
+    pub fn is_spi_frame_with_addr(&self) -> bool {
+        **self == FORM_A::SPI_FRAME_WITH_ADDR
+    }
+}
+impl core::ops::Deref for FORM_R {
+    type Target = crate::FieldReader<u8, FORM_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `FORM` writer - Frame Format"]
+pub struct FORM_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> FORM_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: FORM_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "SPI Frame"]
+    #[inline(always)]
+    pub fn spi_frame(self) -> &'a mut W {
+        self.variant(FORM_A::SPI_FRAME)
+    }
+    #[doc = "SPI Frame with Addr"]
+    #[inline(always)]
+    pub fn spi_frame_with_addr(self) -> &'a mut W {
+        self.variant(FORM_A::SPI_FRAME_WITH_ADDR)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24);
+        self.w
+    }
+}
+#[doc = "Clock Phase\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CPHA_A {
+    #[doc = "0: The data is sampled on a leading SCK edge and changed on a trailing SCK edge"]
+    LEADING_EDGE = 0,
+    #[doc = "1: The data is sampled on a trailing SCK edge and changed on a leading SCK edge"]
+    TRAILING_EDGE = 1,
+}
+impl From<CPHA_A> for bool {
+    #[inline(always)]
+    fn from(variant: CPHA_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CPHA` reader - Clock Phase"]
+pub struct CPHA_R(crate::FieldReader<bool, CPHA_A>);
+impl CPHA_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CPHA_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CPHA_A {
+        match self.bits {
+            false => CPHA_A::LEADING_EDGE,
+            true => CPHA_A::TRAILING_EDGE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LEADING_EDGE`"]
+    #[inline(always)]
+    pub fn is_leading_edge(&self) -> bool {
+        **self == CPHA_A::LEADING_EDGE
+    }
+    #[doc = "Checks if the value of the field is `TRAILING_EDGE`"]
+    #[inline(always)]
+    pub fn is_trailing_edge(&self) -> bool {
+        **self == CPHA_A::TRAILING_EDGE
+    }
+}
+impl core::ops::Deref for CPHA_R {
+    type Target = crate::FieldReader<bool, CPHA_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CPHA` writer - Clock Phase"]
+pub struct CPHA_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CPHA_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: CPHA_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "The data is sampled on a leading SCK edge and changed on a trailing SCK edge"]
+    #[inline(always)]
+    pub fn leading_edge(self) -> &'a mut W {
+        self.variant(CPHA_A::LEADING_EDGE)
+    }
+    #[doc = "The data is sampled on a trailing SCK edge and changed on a leading SCK edge"]
+    #[inline(always)]
+    pub fn trailing_edge(self) -> &'a mut W {
+        self.variant(CPHA_A::TRAILING_EDGE)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
+        self.w
+    }
+}
+#[doc = "Clock Polarity\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CPOL_A {
+    #[doc = "0: SCK is low when idle"]
+    IDLE_LOW = 0,
+    #[doc = "1: SCK is high when idle"]
+    IDLE_HIGH = 1,
+}
+impl From<CPOL_A> for bool {
+    #[inline(always)]
+    fn from(variant: CPOL_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CPOL` reader - Clock Polarity"]
+pub struct CPOL_R(crate::FieldReader<bool, CPOL_A>);
+impl CPOL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CPOL_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CPOL_A {
+        match self.bits {
+            false => CPOL_A::IDLE_LOW,
+            true => CPOL_A::IDLE_HIGH,
+        }
+    }
+    #[doc = "Checks if the value of the field is `IDLE_LOW`"]
+    #[inline(always)]
+    pub fn is_idle_low(&self) -> bool {
+        **self == CPOL_A::IDLE_LOW
+    }
+    #[doc = "Checks if the value of the field is `IDLE_HIGH`"]
+    #[inline(always)]
+    pub fn is_idle_high(&self) -> bool {
+        **self == CPOL_A::IDLE_HIGH
+    }
+}
+impl core::ops::Deref for CPOL_R {
+    type Target = crate::FieldReader<bool, CPOL_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CPOL` writer - Clock Polarity"]
+pub struct CPOL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CPOL_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: CPOL_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "SCK is low when idle"]
+    #[inline(always)]
+    pub fn idle_low(self) -> &'a mut W {
+        self.variant(CPOL_A::IDLE_LOW)
+    }
+    #[doc = "SCK is high when idle"]
+    #[inline(always)]
+    pub fn idle_high(self) -> &'a mut W {
+        self.variant(CPOL_A::IDLE_HIGH)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
+        self.w
+    }
+}
+#[doc = "Data Order\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DORD_A {
+    #[doc = "0: MSB is transferred first"]
+    MSB = 0,
+    #[doc = "1: LSB is transferred first"]
+    LSB = 1,
+}
+impl From<DORD_A> for bool {
+    #[inline(always)]
+    fn from(variant: DORD_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DORD` reader - Data Order"]
+pub struct DORD_R(crate::FieldReader<bool, DORD_A>);
+impl DORD_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DORD_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DORD_A {
+        match self.bits {
+            false => DORD_A::MSB,
+            true => DORD_A::LSB,
+        }
+    }
+    #[doc = "Checks if the value of the field is `MSB`"]
+    #[inline(always)]
+    pub fn is_msb(&self) -> bool {
+        **self == DORD_A::MSB
+    }
+    #[doc = "Checks if the value of the field is `LSB`"]
+    #[inline(always)]
+    pub fn is_lsb(&self) -> bool {
+        **self == DORD_A::LSB
+    }
+}
+impl core::ops::Deref for DORD_R {
+    type Target = crate::FieldReader<bool, DORD_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DORD` writer - Data Order"]
+pub struct DORD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DORD_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: DORD_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "MSB is transferred first"]
+    #[inline(always)]
+    pub fn msb(self) -> &'a mut W {
+        self.variant(DORD_A::MSB)
+    }
+    #[doc = "LSB is transferred first"]
+    #[inline(always)]
+    pub fn lsb(self) -> &'a mut W {
+        self.variant(DORD_A::LSB)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bits 2:4 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&self) -> MODE_R {
+        MODE_R::new(((self.bits >> 2) & 0x07) as u8)
+    }
+    #[doc = "Bit 7 - Run during Standby"]
+    #[inline(always)]
+    pub fn runstdby(&self) -> RUNSTDBY_R {
+        RUNSTDBY_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+    #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
+    #[inline(always)]
+    pub fn ibon(&self) -> IBON_R {
+        IBON_R::new(((self.bits >> 8) & 0x01) != 0)
+    }
+    #[doc = "Bits 16:17 - Data Out Pinout"]
+    #[inline(always)]
+    pub fn dopo(&self) -> DOPO_R {
+        DOPO_R::new(((self.bits >> 16) & 0x03) as u8)
+    }
+    #[doc = "Bits 20:21 - Data In Pinout"]
+    #[inline(always)]
+    pub fn dipo(&self) -> DIPO_R {
+        DIPO_R::new(((self.bits >> 20) & 0x03) as u8)
+    }
+    #[doc = "Bits 24:27 - Frame Format"]
+    #[inline(always)]
+    pub fn form(&self) -> FORM_R {
+        FORM_R::new(((self.bits >> 24) & 0x0f) as u8)
+    }
+    #[doc = "Bit 28 - Clock Phase"]
+    #[inline(always)]
+    pub fn cpha(&self) -> CPHA_R {
+        CPHA_R::new(((self.bits >> 28) & 0x01) != 0)
+    }
+    #[doc = "Bit 29 - Clock Polarity"]
+    #[inline(always)]
+    pub fn cpol(&self) -> CPOL_R {
+        CPOL_R::new(((self.bits >> 29) & 0x01) != 0)
+    }
+    #[doc = "Bit 30 - Data Order"]
+    #[inline(always)]
+    pub fn dord(&self) -> DORD_R {
+        DORD_R::new(((self.bits >> 30) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&mut self) -> SWRST_W {
+        SWRST_W { w: self }
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Bits 2:4 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&mut self) -> MODE_W {
+        MODE_W { w: self }
+    }
+    #[doc = "Bit 7 - Run during Standby"]
+    #[inline(always)]
+    pub fn runstdby(&mut self) -> RUNSTDBY_W {
+        RUNSTDBY_W { w: self }
+    }
+    #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
+    #[inline(always)]
+    pub fn ibon(&mut self) -> IBON_W {
+        IBON_W { w: self }
+    }
+    #[doc = "Bits 16:17 - Data Out Pinout"]
+    #[inline(always)]
+    pub fn dopo(&mut self) -> DOPO_W {
+        DOPO_W { w: self }
+    }
+    #[doc = "Bits 20:21 - Data In Pinout"]
+    #[inline(always)]
+    pub fn dipo(&mut self) -> DIPO_W {
+        DIPO_W { w: self }
+    }
+    #[doc = "Bits 24:27 - Frame Format"]
+    #[inline(always)]
+    pub fn form(&mut self) -> FORM_W {
+        FORM_W { w: self }
+    }
+    #[doc = "Bit 28 - Clock Phase"]
+    #[inline(always)]
+    pub fn cpha(&mut self) -> CPHA_W {
+        CPHA_W { w: self }
+    }
+    #[doc = "Bit 29 - Clock Polarity"]
+    #[inline(always)]
+    pub fn cpol(&mut self) -> CPOL_W {
+        CPOL_W { w: self }
+    }
+    #[doc = "Bit 30 - Data Order"]
+    #[inline(always)]
+    pub fn dord(&mut self) -> DORD_W {
+        DORD_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIM Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
+pub struct CTRLA_SPEC;
+impl crate::RegisterSpec for CTRLA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
+impl crate::Readable for CTRLA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
+impl crate::Writable for CTRLA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLA to value 0"]
+impl crate::Resettable for CTRLA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spim/ctrlb.rs b/src/sercom0/spim/ctrlb.rs
new file mode 100644
index 0000000..f8fe32f
--- /dev/null
+++ b/src/sercom0/spim/ctrlb.rs
@@ -0,0 +1,433 @@
+#[doc = "Register `CTRLB` reader"]
+pub struct R(crate::R<CTRLB_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLB_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLB_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLB` writer"]
+pub struct W(crate::W<CTRLB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Character Size\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum CHSIZE_A {
+    #[doc = "0: 8 bits"]
+    _8_BIT = 0,
+    #[doc = "1: 9 bits"]
+    _9_BIT = 1,
+}
+impl From<CHSIZE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: CHSIZE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `CHSIZE` reader - Character Size"]
+pub struct CHSIZE_R(crate::FieldReader<u8, CHSIZE_A>);
+impl CHSIZE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        CHSIZE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<CHSIZE_A> {
+        match self.bits {
+            0 => Some(CHSIZE_A::_8_BIT),
+            1 => Some(CHSIZE_A::_9_BIT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `_8_BIT`"]
+    #[inline(always)]
+    pub fn is_8_bit(&self) -> bool {
+        **self == CHSIZE_A::_8_BIT
+    }
+    #[doc = "Checks if the value of the field is `_9_BIT`"]
+    #[inline(always)]
+    pub fn is_9_bit(&self) -> bool {
+        **self == CHSIZE_A::_9_BIT
+    }
+}
+impl core::ops::Deref for CHSIZE_R {
+    type Target = crate::FieldReader<u8, CHSIZE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CHSIZE` writer - Character Size"]
+pub struct CHSIZE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CHSIZE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: CHSIZE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "8 bits"]
+    #[inline(always)]
+    pub fn _8_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_8_BIT)
+    }
+    #[doc = "9 bits"]
+    #[inline(always)]
+    pub fn _9_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_9_BIT)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07);
+        self.w
+    }
+}
+#[doc = "Field `PLOADEN` reader - Data Preload Enable"]
+pub struct PLOADEN_R(crate::FieldReader<bool, bool>);
+impl PLOADEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        PLOADEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for PLOADEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PLOADEN` writer - Data Preload Enable"]
+pub struct PLOADEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PLOADEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
+        self.w
+    }
+}
+#[doc = "Field `SSDE` reader - Slave Select Low Detect Enable"]
+pub struct SSDE_R(crate::FieldReader<bool, bool>);
+impl SSDE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SSDE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SSDE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SSDE` writer - Slave Select Low Detect Enable"]
+pub struct SSDE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SSDE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
+        self.w
+    }
+}
+#[doc = "Field `MSSEN` reader - Master Slave Select Enable"]
+pub struct MSSEN_R(crate::FieldReader<bool, bool>);
+impl MSSEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        MSSEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MSSEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MSSEN` writer - Master Slave Select Enable"]
+pub struct MSSEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MSSEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
+        self.w
+    }
+}
+#[doc = "Address Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum AMODE_A {
+    #[doc = "0: SPI Address mask "]
+    MASK = 0,
+    #[doc = "1: Two unique Addressess"]
+    _2_ADDRESSES = 1,
+    #[doc = "2: Address Range"]
+    RANGE = 2,
+}
+impl From<AMODE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: AMODE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `AMODE` reader - Address Mode"]
+pub struct AMODE_R(crate::FieldReader<u8, AMODE_A>);
+impl AMODE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        AMODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<AMODE_A> {
+        match self.bits {
+            0 => Some(AMODE_A::MASK),
+            1 => Some(AMODE_A::_2_ADDRESSES),
+            2 => Some(AMODE_A::RANGE),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `MASK`"]
+    #[inline(always)]
+    pub fn is_mask(&self) -> bool {
+        **self == AMODE_A::MASK
+    }
+    #[doc = "Checks if the value of the field is `_2_ADDRESSES`"]
+    #[inline(always)]
+    pub fn is_2_addresses(&self) -> bool {
+        **self == AMODE_A::_2_ADDRESSES
+    }
+    #[doc = "Checks if the value of the field is `RANGE`"]
+    #[inline(always)]
+    pub fn is_range(&self) -> bool {
+        **self == AMODE_A::RANGE
+    }
+}
+impl core::ops::Deref for AMODE_R {
+    type Target = crate::FieldReader<u8, AMODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `AMODE` writer - Address Mode"]
+pub struct AMODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> AMODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: AMODE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "SPI Address mask"]
+    #[inline(always)]
+    pub fn mask(self) -> &'a mut W {
+        self.variant(AMODE_A::MASK)
+    }
+    #[doc = "Two unique Addressess"]
+    #[inline(always)]
+    pub fn _2_addresses(self) -> &'a mut W {
+        self.variant(AMODE_A::_2_ADDRESSES)
+    }
+    #[doc = "Address Range"]
+    #[inline(always)]
+    pub fn range(self) -> &'a mut W {
+        self.variant(AMODE_A::RANGE)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14);
+        self.w
+    }
+}
+#[doc = "Field `RXEN` reader - Receiver Enable"]
+pub struct RXEN_R(crate::FieldReader<bool, bool>);
+impl RXEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXEN` writer - Receiver Enable"]
+pub struct RXEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - Character Size"]
+    #[inline(always)]
+    pub fn chsize(&self) -> CHSIZE_R {
+        CHSIZE_R::new((self.bits & 0x07) as u8)
+    }
+    #[doc = "Bit 6 - Data Preload Enable"]
+    #[inline(always)]
+    pub fn ploaden(&self) -> PLOADEN_R {
+        PLOADEN_R::new(((self.bits >> 6) & 0x01) != 0)
+    }
+    #[doc = "Bit 9 - Slave Select Low Detect Enable"]
+    #[inline(always)]
+    pub fn ssde(&self) -> SSDE_R {
+        SSDE_R::new(((self.bits >> 9) & 0x01) != 0)
+    }
+    #[doc = "Bit 13 - Master Slave Select Enable"]
+    #[inline(always)]
+    pub fn mssen(&self) -> MSSEN_R {
+        MSSEN_R::new(((self.bits >> 13) & 0x01) != 0)
+    }
+    #[doc = "Bits 14:15 - Address Mode"]
+    #[inline(always)]
+    pub fn amode(&self) -> AMODE_R {
+        AMODE_R::new(((self.bits >> 14) & 0x03) as u8)
+    }
+    #[doc = "Bit 17 - Receiver Enable"]
+    #[inline(always)]
+    pub fn rxen(&self) -> RXEN_R {
+        RXEN_R::new(((self.bits >> 17) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - Character Size"]
+    #[inline(always)]
+    pub fn chsize(&mut self) -> CHSIZE_W {
+        CHSIZE_W { w: self }
+    }
+    #[doc = "Bit 6 - Data Preload Enable"]
+    #[inline(always)]
+    pub fn ploaden(&mut self) -> PLOADEN_W {
+        PLOADEN_W { w: self }
+    }
+    #[doc = "Bit 9 - Slave Select Low Detect Enable"]
+    #[inline(always)]
+    pub fn ssde(&mut self) -> SSDE_W {
+        SSDE_W { w: self }
+    }
+    #[doc = "Bit 13 - Master Slave Select Enable"]
+    #[inline(always)]
+    pub fn mssen(&mut self) -> MSSEN_W {
+        MSSEN_W { w: self }
+    }
+    #[doc = "Bits 14:15 - Address Mode"]
+    #[inline(always)]
+    pub fn amode(&mut self) -> AMODE_W {
+        AMODE_W { w: self }
+    }
+    #[doc = "Bit 17 - Receiver Enable"]
+    #[inline(always)]
+    pub fn rxen(&mut self) -> RXEN_W {
+        RXEN_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIM Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"]
+pub struct CTRLB_SPEC;
+impl crate::RegisterSpec for CTRLB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrlb::R](R) reader structure"]
+impl crate::Readable for CTRLB_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"]
+impl crate::Writable for CTRLB_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLB to value 0"]
+impl crate::Resettable for CTRLB_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spim/data.rs b/src/sercom0/spim/data.rs
new file mode 100644
index 0000000..66fa416
--- /dev/null
+++ b/src/sercom0/spim/data.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `DATA` reader"]
+pub struct R(crate::R<DATA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DATA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DATA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DATA` writer"]
+pub struct W(crate::W<DATA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DATA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DATA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DATA` reader - Data Value"]
+pub struct DATA_R(crate::FieldReader<u16, u16>);
+impl DATA_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        DATA_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DATA_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DATA` writer - Data Value"]
+pub struct DATA_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DATA_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01ff) | (value as u32 & 0x01ff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:8 - Data Value"]
+    #[inline(always)]
+    pub fn data(&self) -> DATA_R {
+        DATA_R::new((self.bits & 0x01ff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:8 - Data Value"]
+    #[inline(always)]
+    pub fn data(&mut self) -> DATA_W {
+        DATA_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIM Data\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"]
+pub struct DATA_SPEC;
+impl crate::RegisterSpec for DATA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [data::R](R) reader structure"]
+impl crate::Readable for DATA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"]
+impl crate::Writable for DATA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DATA to value 0"]
+impl crate::Resettable for DATA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spim/dbgctrl.rs b/src/sercom0/spim/dbgctrl.rs
new file mode 100644
index 0000000..5c489c9
--- /dev/null
+++ b/src/sercom0/spim/dbgctrl.rs
@@ -0,0 +1,112 @@
+#[doc = "Register `DBGCTRL` reader"]
+pub struct R(crate::R<DBGCTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DBGCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DBGCTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DBGCTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DBGCTRL` writer"]
+pub struct W(crate::W<DBGCTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DBGCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DBGCTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DBGCTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DBGSTOP` reader - Debug Mode"]
+pub struct DBGSTOP_R(crate::FieldReader<bool, bool>);
+impl DBGSTOP_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DBGSTOP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DBGSTOP_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DBGSTOP` writer - Debug Mode"]
+pub struct DBGSTOP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DBGSTOP_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Debug Mode"]
+    #[inline(always)]
+    pub fn dbgstop(&self) -> DBGSTOP_R {
+        DBGSTOP_R::new((self.bits & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Debug Mode"]
+    #[inline(always)]
+    pub fn dbgstop(&mut self) -> DBGSTOP_W {
+        DBGSTOP_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIM Debug Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgctrl](index.html) module"]
+pub struct DBGCTRL_SPEC;
+impl crate::RegisterSpec for DBGCTRL_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [dbgctrl::R](R) reader structure"]
+impl crate::Readable for DBGCTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [dbgctrl::W](W) writer structure"]
+impl crate::Writable for DBGCTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DBGCTRL to value 0"]
+impl crate::Resettable for DBGCTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spim/intenclr.rs b/src/sercom0/spim/intenclr.rs
new file mode 100644
index 0000000..7c7cc32
--- /dev/null
+++ b/src/sercom0/spim/intenclr.rs
@@ -0,0 +1,296 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DRE` reader - Data Register Empty Interrupt Disable"]
+pub struct DRE_R(crate::FieldReader<bool, bool>);
+impl DRE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRE` writer - Data Register Empty Interrupt Disable"]
+pub struct DRE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `TXC` reader - Transmit Complete Interrupt Disable"]
+pub struct TXC_R(crate::FieldReader<bool, bool>);
+impl TXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXC` writer - Transmit Complete Interrupt Disable"]
+pub struct TXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXC` reader - Receive Complete Interrupt Disable"]
+pub struct RXC_R(crate::FieldReader<bool, bool>);
+impl RXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXC` writer - Receive Complete Interrupt Disable"]
+pub struct RXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `SSL` reader - Slave Select Low Interrupt Disable"]
+pub struct SSL_R(crate::FieldReader<bool, bool>);
+impl SSL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SSL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SSL_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SSL` writer - Slave Select Low Interrupt Disable"]
+pub struct SSL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SSL_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt Disable"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt Disable"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Disable"]
+    #[inline(always)]
+    pub fn dre(&self) -> DRE_R {
+        DRE_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn txc(&self) -> TXC_R {
+        TXC_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxc(&self) -> RXC_R {
+        RXC_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Slave Select Low Interrupt Disable"]
+    #[inline(always)]
+    pub fn ssl(&self) -> SSL_R {
+        SSL_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Disable"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Disable"]
+    #[inline(always)]
+    pub fn dre(&mut self) -> DRE_W {
+        DRE_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn txc(&mut self) -> TXC_W {
+        TXC_W { w: self }
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxc(&mut self) -> RXC_W {
+        RXC_W { w: self }
+    }
+    #[doc = "Bit 3 - Slave Select Low Interrupt Disable"]
+    #[inline(always)]
+    pub fn ssl(&mut self) -> SSL_W {
+        SSL_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Disable"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIM Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spim/intenset.rs b/src/sercom0/spim/intenset.rs
new file mode 100644
index 0000000..68cf83d
--- /dev/null
+++ b/src/sercom0/spim/intenset.rs
@@ -0,0 +1,296 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DRE` reader - Data Register Empty Interrupt Enable"]
+pub struct DRE_R(crate::FieldReader<bool, bool>);
+impl DRE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRE` writer - Data Register Empty Interrupt Enable"]
+pub struct DRE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `TXC` reader - Transmit Complete Interrupt Enable"]
+pub struct TXC_R(crate::FieldReader<bool, bool>);
+impl TXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXC` writer - Transmit Complete Interrupt Enable"]
+pub struct TXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXC` reader - Receive Complete Interrupt Enable"]
+pub struct RXC_R(crate::FieldReader<bool, bool>);
+impl RXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXC` writer - Receive Complete Interrupt Enable"]
+pub struct RXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `SSL` reader - Slave Select Low Interrupt Enable"]
+pub struct SSL_R(crate::FieldReader<bool, bool>);
+impl SSL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SSL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SSL_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SSL` writer - Slave Select Low Interrupt Enable"]
+pub struct SSL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SSL_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt Enable"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt Enable"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Enable"]
+    #[inline(always)]
+    pub fn dre(&self) -> DRE_R {
+        DRE_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn txc(&self) -> TXC_R {
+        TXC_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxc(&self) -> RXC_R {
+        RXC_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Slave Select Low Interrupt Enable"]
+    #[inline(always)]
+    pub fn ssl(&self) -> SSL_R {
+        SSL_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Enable"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Enable"]
+    #[inline(always)]
+    pub fn dre(&mut self) -> DRE_W {
+        DRE_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn txc(&mut self) -> TXC_W {
+        TXC_W { w: self }
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxc(&mut self) -> RXC_W {
+        RXC_W { w: self }
+    }
+    #[doc = "Bit 3 - Slave Select Low Interrupt Enable"]
+    #[inline(always)]
+    pub fn ssl(&mut self) -> SSL_W {
+        SSL_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Enable"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIM Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spim/intflag.rs b/src/sercom0/spim/intflag.rs
new file mode 100644
index 0000000..d3b6dbb
--- /dev/null
+++ b/src/sercom0/spim/intflag.rs
@@ -0,0 +1,296 @@
+#[doc = "Register `INTFLAG` reader"]
+pub struct R(crate::R<INTFLAG_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTFLAG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTFLAG_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTFLAG_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTFLAG` writer"]
+pub struct W(crate::W<INTFLAG_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTFLAG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTFLAG_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTFLAG_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DRE` reader - Data Register Empty Interrupt"]
+pub struct DRE_R(crate::FieldReader<bool, bool>);
+impl DRE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRE` writer - Data Register Empty Interrupt"]
+pub struct DRE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `TXC` reader - Transmit Complete Interrupt"]
+pub struct TXC_R(crate::FieldReader<bool, bool>);
+impl TXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXC` writer - Transmit Complete Interrupt"]
+pub struct TXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXC` reader - Receive Complete Interrupt"]
+pub struct RXC_R(crate::FieldReader<bool, bool>);
+impl RXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXC` writer - Receive Complete Interrupt"]
+pub struct RXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `SSL` reader - Slave Select Low Interrupt Flag"]
+pub struct SSL_R(crate::FieldReader<bool, bool>);
+impl SSL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SSL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SSL_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SSL` writer - Slave Select Low Interrupt Flag"]
+pub struct SSL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SSL_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Data Register Empty Interrupt"]
+    #[inline(always)]
+    pub fn dre(&self) -> DRE_R {
+        DRE_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt"]
+    #[inline(always)]
+    pub fn txc(&self) -> TXC_R {
+        TXC_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt"]
+    #[inline(always)]
+    pub fn rxc(&self) -> RXC_R {
+        RXC_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Slave Select Low Interrupt Flag"]
+    #[inline(always)]
+    pub fn ssl(&self) -> SSL_R {
+        SSL_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Data Register Empty Interrupt"]
+    #[inline(always)]
+    pub fn dre(&mut self) -> DRE_W {
+        DRE_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt"]
+    #[inline(always)]
+    pub fn txc(&mut self) -> TXC_W {
+        TXC_W { w: self }
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt"]
+    #[inline(always)]
+    pub fn rxc(&mut self) -> RXC_W {
+        RXC_W { w: self }
+    }
+    #[doc = "Bit 3 - Slave Select Low Interrupt Flag"]
+    #[inline(always)]
+    pub fn ssl(&mut self) -> SSL_W {
+        SSL_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIM Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"]
+pub struct INTFLAG_SPEC;
+impl crate::RegisterSpec for INTFLAG_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intflag::R](R) reader structure"]
+impl crate::Readable for INTFLAG_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"]
+impl crate::Writable for INTFLAG_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTFLAG to value 0"]
+impl crate::Resettable for INTFLAG_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spim/status.rs b/src/sercom0/spim/status.rs
new file mode 100644
index 0000000..34b72da
--- /dev/null
+++ b/src/sercom0/spim/status.rs
@@ -0,0 +1,112 @@
+#[doc = "Register `STATUS` reader"]
+pub struct R(crate::R<STATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<STATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `STATUS` writer"]
+pub struct W(crate::W<STATUS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<STATUS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<STATUS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BUFOVF` reader - Buffer Overflow"]
+pub struct BUFOVF_R(crate::FieldReader<bool, bool>);
+impl BUFOVF_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        BUFOVF_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BUFOVF_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BUFOVF` writer - Buffer Overflow"]
+pub struct BUFOVF_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BUFOVF_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 2 - Buffer Overflow"]
+    #[inline(always)]
+    pub fn bufovf(&self) -> BUFOVF_R {
+        BUFOVF_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 2 - Buffer Overflow"]
+    #[inline(always)]
+    pub fn bufovf(&mut self) -> BUFOVF_W {
+        BUFOVF_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIM Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
+pub struct STATUS_SPEC;
+impl crate::RegisterSpec for STATUS_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [status::R](R) reader structure"]
+impl crate::Readable for STATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"]
+impl crate::Writable for STATUS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets STATUS to value 0"]
+impl crate::Resettable for STATUS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spim/syncbusy.rs b/src/sercom0/spim/syncbusy.rs
new file mode 100644
index 0000000..fb0b565
--- /dev/null
+++ b/src/sercom0/spim/syncbusy.rs
@@ -0,0 +1,90 @@
+#[doc = "Register `SYNCBUSY` reader"]
+pub struct R(crate::R<SYNCBUSY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYNCBUSY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYNCBUSY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset Synchronization Busy"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` reader - SERCOM Enable Synchronization Busy"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CTRLB` reader - CTRLB Synchronization Busy"]
+pub struct CTRLB_R(crate::FieldReader<bool, bool>);
+impl CTRLB_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CTRLB_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CTRLB_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset Synchronization Busy"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - SERCOM Enable Synchronization Busy"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - CTRLB Synchronization Busy"]
+    #[inline(always)]
+    pub fn ctrlb(&self) -> CTRLB_R {
+        CTRLB_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+}
+#[doc = "SPIM Synchronization Busy\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"]
+pub struct SYNCBUSY_SPEC;
+impl crate::RegisterSpec for SYNCBUSY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [syncbusy::R](R) reader structure"]
+impl crate::Readable for SYNCBUSY_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets SYNCBUSY to value 0"]
+impl crate::Resettable for SYNCBUSY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spis.rs b/src/sercom0/spis.rs
new file mode 100644
index 0000000..eed10c9
--- /dev/null
+++ b/src/sercom0/spis.rs
@@ -0,0 +1,44 @@
+#[doc = "CTRLA register accessor: an alias for `Reg<CTRLA_SPEC>`"]
+pub type CTRLA = crate::Reg<ctrla::CTRLA_SPEC>;
+#[doc = "SPIS Control A"]
+pub mod ctrla;
+#[doc = "CTRLB register accessor: an alias for `Reg<CTRLB_SPEC>`"]
+pub type CTRLB = crate::Reg<ctrlb::CTRLB_SPEC>;
+#[doc = "SPIS Control B"]
+pub mod ctrlb;
+#[doc = "BAUD register accessor: an alias for `Reg<BAUD_SPEC>`"]
+pub type BAUD = crate::Reg<baud::BAUD_SPEC>;
+#[doc = "SPIS Baud Rate"]
+pub mod baud;
+#[doc = "INTENCLR register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "SPIS Interrupt Enable Clear"]
+pub mod intenclr;
+#[doc = "INTENSET register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "SPIS Interrupt Enable Set"]
+pub mod intenset;
+#[doc = "INTFLAG register accessor: an alias for `Reg<INTFLAG_SPEC>`"]
+pub type INTFLAG = crate::Reg<intflag::INTFLAG_SPEC>;
+#[doc = "SPIS Interrupt Flag Status and Clear"]
+pub mod intflag;
+#[doc = "STATUS register accessor: an alias for `Reg<STATUS_SPEC>`"]
+pub type STATUS = crate::Reg<status::STATUS_SPEC>;
+#[doc = "SPIS Status"]
+pub mod status;
+#[doc = "SYNCBUSY register accessor: an alias for `Reg<SYNCBUSY_SPEC>`"]
+pub type SYNCBUSY = crate::Reg<syncbusy::SYNCBUSY_SPEC>;
+#[doc = "SPIS Synchronization Busy"]
+pub mod syncbusy;
+#[doc = "ADDR register accessor: an alias for `Reg<ADDR_SPEC>`"]
+pub type ADDR = crate::Reg<addr::ADDR_SPEC>;
+#[doc = "SPIS Address"]
+pub mod addr;
+#[doc = "DATA register accessor: an alias for `Reg<DATA_SPEC>`"]
+pub type DATA = crate::Reg<data::DATA_SPEC>;
+#[doc = "SPIS Data"]
+pub mod data;
+#[doc = "DBGCTRL register accessor: an alias for `Reg<DBGCTRL_SPEC>`"]
+pub type DBGCTRL = crate::Reg<dbgctrl::DBGCTRL_SPEC>;
+#[doc = "SPIS Debug Control"]
+pub mod dbgctrl;
diff --git a/src/sercom0/spis/addr.rs b/src/sercom0/spis/addr.rs
new file mode 100644
index 0000000..2328f8b
--- /dev/null
+++ b/src/sercom0/spis/addr.rs
@@ -0,0 +1,138 @@
+#[doc = "Register `ADDR` reader"]
+pub struct R(crate::R<ADDR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ADDR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ADDR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ADDR` writer"]
+pub struct W(crate::W<ADDR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ADDR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ADDR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ADDR` reader - Address Value"]
+pub struct ADDR_R(crate::FieldReader<u8, u8>);
+impl ADDR_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        ADDR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ADDR_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ADDR` writer - Address Value"]
+pub struct ADDR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ADDR_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff);
+        self.w
+    }
+}
+#[doc = "Field `ADDRMASK` reader - Address Mask"]
+pub struct ADDRMASK_R(crate::FieldReader<u8, u8>);
+impl ADDRMASK_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        ADDRMASK_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ADDRMASK_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ADDRMASK` writer - Address Mask"]
+pub struct ADDRMASK_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ADDRMASK_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0xff << 16)) | ((value as u32 & 0xff) << 16);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Address Value"]
+    #[inline(always)]
+    pub fn addr(&self) -> ADDR_R {
+        ADDR_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bits 16:23 - Address Mask"]
+    #[inline(always)]
+    pub fn addrmask(&self) -> ADDRMASK_R {
+        ADDRMASK_R::new(((self.bits >> 16) & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Address Value"]
+    #[inline(always)]
+    pub fn addr(&mut self) -> ADDR_W {
+        ADDR_W { w: self }
+    }
+    #[doc = "Bits 16:23 - Address Mask"]
+    #[inline(always)]
+    pub fn addrmask(&mut self) -> ADDRMASK_W {
+        ADDRMASK_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIS Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addr](index.html) module"]
+pub struct ADDR_SPEC;
+impl crate::RegisterSpec for ADDR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [addr::R](R) reader structure"]
+impl crate::Readable for ADDR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [addr::W](W) writer structure"]
+impl crate::Writable for ADDR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ADDR to value 0"]
+impl crate::Resettable for ADDR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spis/baud.rs b/src/sercom0/spis/baud.rs
new file mode 100644
index 0000000..81a0231
--- /dev/null
+++ b/src/sercom0/spis/baud.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `BAUD` reader"]
+pub struct R(crate::R<BAUD_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<BAUD_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<BAUD_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<BAUD_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `BAUD` writer"]
+pub struct W(crate::W<BAUD_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<BAUD_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<BAUD_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<BAUD_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BAUD` reader - Baud Rate Value"]
+pub struct BAUD_R(crate::FieldReader<u8, u8>);
+impl BAUD_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        BAUD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BAUD_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BAUD` writer - Baud Rate Value"]
+pub struct BAUD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BAUD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xff) | (value as u8 & 0xff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&self) -> BAUD_R {
+        BAUD_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&mut self) -> BAUD_W {
+        BAUD_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIS Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud](index.html) module"]
+pub struct BAUD_SPEC;
+impl crate::RegisterSpec for BAUD_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [baud::R](R) reader structure"]
+impl crate::Readable for BAUD_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [baud::W](W) writer structure"]
+impl crate::Writable for BAUD_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets BAUD to value 0"]
+impl crate::Resettable for BAUD_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spis/ctrla.rs b/src/sercom0/spis/ctrla.rs
new file mode 100644
index 0000000..f84a239
--- /dev/null
+++ b/src/sercom0/spis/ctrla.rs
@@ -0,0 +1,981 @@
+#[doc = "Register `CTRLA` reader"]
+pub struct R(crate::R<CTRLA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLA` writer"]
+pub struct W(crate::W<CTRLA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SWRST` writer - Software Reset"]
+pub struct SWRST_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SWRST_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Operating Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum MODE_A {
+    #[doc = "0: USART with external clock"]
+    USART_EXT_CLK = 0,
+    #[doc = "1: USART with internal clock"]
+    USART_INT_CLK = 1,
+    #[doc = "2: SPI in slave operation"]
+    SPI_SLAVE = 2,
+    #[doc = "3: SPI in master operation"]
+    SPI_MASTER = 3,
+    #[doc = "4: I2C slave operation"]
+    I2C_SLAVE = 4,
+    #[doc = "5: I2C master operation"]
+    I2C_MASTER = 5,
+}
+impl From<MODE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: MODE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `MODE` reader - Operating Mode"]
+pub struct MODE_R(crate::FieldReader<u8, MODE_A>);
+impl MODE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        MODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<MODE_A> {
+        match self.bits {
+            0 => Some(MODE_A::USART_EXT_CLK),
+            1 => Some(MODE_A::USART_INT_CLK),
+            2 => Some(MODE_A::SPI_SLAVE),
+            3 => Some(MODE_A::SPI_MASTER),
+            4 => Some(MODE_A::I2C_SLAVE),
+            5 => Some(MODE_A::I2C_MASTER),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `USART_EXT_CLK`"]
+    #[inline(always)]
+    pub fn is_usart_ext_clk(&self) -> bool {
+        **self == MODE_A::USART_EXT_CLK
+    }
+    #[doc = "Checks if the value of the field is `USART_INT_CLK`"]
+    #[inline(always)]
+    pub fn is_usart_int_clk(&self) -> bool {
+        **self == MODE_A::USART_INT_CLK
+    }
+    #[doc = "Checks if the value of the field is `SPI_SLAVE`"]
+    #[inline(always)]
+    pub fn is_spi_slave(&self) -> bool {
+        **self == MODE_A::SPI_SLAVE
+    }
+    #[doc = "Checks if the value of the field is `SPI_MASTER`"]
+    #[inline(always)]
+    pub fn is_spi_master(&self) -> bool {
+        **self == MODE_A::SPI_MASTER
+    }
+    #[doc = "Checks if the value of the field is `I2C_SLAVE`"]
+    #[inline(always)]
+    pub fn is_i2c_slave(&self) -> bool {
+        **self == MODE_A::I2C_SLAVE
+    }
+    #[doc = "Checks if the value of the field is `I2C_MASTER`"]
+    #[inline(always)]
+    pub fn is_i2c_master(&self) -> bool {
+        **self == MODE_A::I2C_MASTER
+    }
+}
+impl core::ops::Deref for MODE_R {
+    type Target = crate::FieldReader<u8, MODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MODE` writer - Operating Mode"]
+pub struct MODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: MODE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "USART with external clock"]
+    #[inline(always)]
+    pub fn usart_ext_clk(self) -> &'a mut W {
+        self.variant(MODE_A::USART_EXT_CLK)
+    }
+    #[doc = "USART with internal clock"]
+    #[inline(always)]
+    pub fn usart_int_clk(self) -> &'a mut W {
+        self.variant(MODE_A::USART_INT_CLK)
+    }
+    #[doc = "SPI in slave operation"]
+    #[inline(always)]
+    pub fn spi_slave(self) -> &'a mut W {
+        self.variant(MODE_A::SPI_SLAVE)
+    }
+    #[doc = "SPI in master operation"]
+    #[inline(always)]
+    pub fn spi_master(self) -> &'a mut W {
+        self.variant(MODE_A::SPI_MASTER)
+    }
+    #[doc = "I2C slave operation"]
+    #[inline(always)]
+    pub fn i2c_slave(self) -> &'a mut W {
+        self.variant(MODE_A::I2C_SLAVE)
+    }
+    #[doc = "I2C master operation"]
+    #[inline(always)]
+    pub fn i2c_master(self) -> &'a mut W {
+        self.variant(MODE_A::I2C_MASTER)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 2)) | ((value as u32 & 0x07) << 2);
+        self.w
+    }
+}
+#[doc = "Field `RUNSTDBY` reader - Run during Standby"]
+pub struct RUNSTDBY_R(crate::FieldReader<bool, bool>);
+impl RUNSTDBY_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RUNSTDBY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RUNSTDBY_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RUNSTDBY` writer - Run during Standby"]
+pub struct RUNSTDBY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RUNSTDBY_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
+        self.w
+    }
+}
+#[doc = "Field `IBON` reader - Immediate Buffer Overflow Notification"]
+pub struct IBON_R(crate::FieldReader<bool, bool>);
+impl IBON_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        IBON_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for IBON_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `IBON` writer - Immediate Buffer Overflow Notification"]
+pub struct IBON_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> IBON_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
+        self.w
+    }
+}
+#[doc = "Data Out Pinout\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum DOPO_A {
+    #[doc = "0: DO on PAD\\[0\\], SCK on PAD\\[1\\]
+and SS on PAD\\[2\\]"]
+    PAD0 = 0,
+    #[doc = "1: DO on PAD\\[2\\], SCK on PAD\\[3\\]
+and SS on PAD\\[1\\]"]
+    PAD1 = 1,
+    #[doc = "2: DO on PAD\\[3\\], SCK on PAD\\[1\\]
+and SS on PAD\\[2\\]"]
+    PAD2 = 2,
+    #[doc = "3: DO on PAD\\[0\\], SCK on PAD\\[3\\]
+and SS on PAD\\[1\\]"]
+    PAD3 = 3,
+}
+impl From<DOPO_A> for u8 {
+    #[inline(always)]
+    fn from(variant: DOPO_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `DOPO` reader - Data Out Pinout"]
+pub struct DOPO_R(crate::FieldReader<u8, DOPO_A>);
+impl DOPO_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        DOPO_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DOPO_A {
+        match self.bits {
+            0 => DOPO_A::PAD0,
+            1 => DOPO_A::PAD1,
+            2 => DOPO_A::PAD2,
+            3 => DOPO_A::PAD3,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `PAD0`"]
+    #[inline(always)]
+    pub fn is_pad0(&self) -> bool {
+        **self == DOPO_A::PAD0
+    }
+    #[doc = "Checks if the value of the field is `PAD1`"]
+    #[inline(always)]
+    pub fn is_pad1(&self) -> bool {
+        **self == DOPO_A::PAD1
+    }
+    #[doc = "Checks if the value of the field is `PAD2`"]
+    #[inline(always)]
+    pub fn is_pad2(&self) -> bool {
+        **self == DOPO_A::PAD2
+    }
+    #[doc = "Checks if the value of the field is `PAD3`"]
+    #[inline(always)]
+    pub fn is_pad3(&self) -> bool {
+        **self == DOPO_A::PAD3
+    }
+}
+impl core::ops::Deref for DOPO_R {
+    type Target = crate::FieldReader<u8, DOPO_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DOPO` writer - Data Out Pinout"]
+pub struct DOPO_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DOPO_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: DOPO_A) -> &'a mut W {
+        self.bits(variant.into())
+    }
+    #[doc = "DO on PAD\\[0\\], SCK on PAD\\[1\\]
+and SS on PAD\\[2\\]"]
+    #[inline(always)]
+    pub fn pad0(self) -> &'a mut W {
+        self.variant(DOPO_A::PAD0)
+    }
+    #[doc = "DO on PAD\\[2\\], SCK on PAD\\[3\\]
+and SS on PAD\\[1\\]"]
+    #[inline(always)]
+    pub fn pad1(self) -> &'a mut W {
+        self.variant(DOPO_A::PAD1)
+    }
+    #[doc = "DO on PAD\\[3\\], SCK on PAD\\[1\\]
+and SS on PAD\\[2\\]"]
+    #[inline(always)]
+    pub fn pad2(self) -> &'a mut W {
+        self.variant(DOPO_A::PAD2)
+    }
+    #[doc = "DO on PAD\\[0\\], SCK on PAD\\[3\\]
+and SS on PAD\\[1\\]"]
+    #[inline(always)]
+    pub fn pad3(self) -> &'a mut W {
+        self.variant(DOPO_A::PAD3)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16);
+        self.w
+    }
+}
+#[doc = "Data In Pinout\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum DIPO_A {
+    #[doc = "0: SERCOM PAD\\[0\\]"]
+    PAD0 = 0,
+    #[doc = "1: SERCOM PAD\\[1\\]"]
+    PAD1 = 1,
+    #[doc = "2: SERCOM PAD\\[2\\]"]
+    PAD2 = 2,
+    #[doc = "3: SERCOM PAD\\[3\\]"]
+    PAD3 = 3,
+}
+impl From<DIPO_A> for u8 {
+    #[inline(always)]
+    fn from(variant: DIPO_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `DIPO` reader - Data In Pinout"]
+pub struct DIPO_R(crate::FieldReader<u8, DIPO_A>);
+impl DIPO_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        DIPO_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DIPO_A {
+        match self.bits {
+            0 => DIPO_A::PAD0,
+            1 => DIPO_A::PAD1,
+            2 => DIPO_A::PAD2,
+            3 => DIPO_A::PAD3,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `PAD0`"]
+    #[inline(always)]
+    pub fn is_pad0(&self) -> bool {
+        **self == DIPO_A::PAD0
+    }
+    #[doc = "Checks if the value of the field is `PAD1`"]
+    #[inline(always)]
+    pub fn is_pad1(&self) -> bool {
+        **self == DIPO_A::PAD1
+    }
+    #[doc = "Checks if the value of the field is `PAD2`"]
+    #[inline(always)]
+    pub fn is_pad2(&self) -> bool {
+        **self == DIPO_A::PAD2
+    }
+    #[doc = "Checks if the value of the field is `PAD3`"]
+    #[inline(always)]
+    pub fn is_pad3(&self) -> bool {
+        **self == DIPO_A::PAD3
+    }
+}
+impl core::ops::Deref for DIPO_R {
+    type Target = crate::FieldReader<u8, DIPO_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DIPO` writer - Data In Pinout"]
+pub struct DIPO_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DIPO_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: DIPO_A) -> &'a mut W {
+        self.bits(variant.into())
+    }
+    #[doc = "SERCOM PAD\\[0\\]"]
+    #[inline(always)]
+    pub fn pad0(self) -> &'a mut W {
+        self.variant(DIPO_A::PAD0)
+    }
+    #[doc = "SERCOM PAD\\[1\\]"]
+    #[inline(always)]
+    pub fn pad1(self) -> &'a mut W {
+        self.variant(DIPO_A::PAD1)
+    }
+    #[doc = "SERCOM PAD\\[2\\]"]
+    #[inline(always)]
+    pub fn pad2(self) -> &'a mut W {
+        self.variant(DIPO_A::PAD2)
+    }
+    #[doc = "SERCOM PAD\\[3\\]"]
+    #[inline(always)]
+    pub fn pad3(self) -> &'a mut W {
+        self.variant(DIPO_A::PAD3)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20);
+        self.w
+    }
+}
+#[doc = "Frame Format\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum FORM_A {
+    #[doc = "0: SPI Frame"]
+    SPI_FRAME = 0,
+    #[doc = "2: SPI Frame with Addr"]
+    SPI_FRAME_WITH_ADDR = 2,
+}
+impl From<FORM_A> for u8 {
+    #[inline(always)]
+    fn from(variant: FORM_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `FORM` reader - Frame Format"]
+pub struct FORM_R(crate::FieldReader<u8, FORM_A>);
+impl FORM_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        FORM_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<FORM_A> {
+        match self.bits {
+            0 => Some(FORM_A::SPI_FRAME),
+            2 => Some(FORM_A::SPI_FRAME_WITH_ADDR),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `SPI_FRAME`"]
+    #[inline(always)]
+    pub fn is_spi_frame(&self) -> bool {
+        **self == FORM_A::SPI_FRAME
+    }
+    #[doc = "Checks if the value of the field is `SPI_FRAME_WITH_ADDR`"]
+    #[inline(always)]
+    pub fn is_spi_frame_with_addr(&self) -> bool {
+        **self == FORM_A::SPI_FRAME_WITH_ADDR
+    }
+}
+impl core::ops::Deref for FORM_R {
+    type Target = crate::FieldReader<u8, FORM_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `FORM` writer - Frame Format"]
+pub struct FORM_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> FORM_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: FORM_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "SPI Frame"]
+    #[inline(always)]
+    pub fn spi_frame(self) -> &'a mut W {
+        self.variant(FORM_A::SPI_FRAME)
+    }
+    #[doc = "SPI Frame with Addr"]
+    #[inline(always)]
+    pub fn spi_frame_with_addr(self) -> &'a mut W {
+        self.variant(FORM_A::SPI_FRAME_WITH_ADDR)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24);
+        self.w
+    }
+}
+#[doc = "Clock Phase\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CPHA_A {
+    #[doc = "0: The data is sampled on a leading SCK edge and changed on a trailing SCK edge"]
+    LEADING_EDGE = 0,
+    #[doc = "1: The data is sampled on a trailing SCK edge and changed on a leading SCK edge"]
+    TRAILING_EDGE = 1,
+}
+impl From<CPHA_A> for bool {
+    #[inline(always)]
+    fn from(variant: CPHA_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CPHA` reader - Clock Phase"]
+pub struct CPHA_R(crate::FieldReader<bool, CPHA_A>);
+impl CPHA_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CPHA_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CPHA_A {
+        match self.bits {
+            false => CPHA_A::LEADING_EDGE,
+            true => CPHA_A::TRAILING_EDGE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LEADING_EDGE`"]
+    #[inline(always)]
+    pub fn is_leading_edge(&self) -> bool {
+        **self == CPHA_A::LEADING_EDGE
+    }
+    #[doc = "Checks if the value of the field is `TRAILING_EDGE`"]
+    #[inline(always)]
+    pub fn is_trailing_edge(&self) -> bool {
+        **self == CPHA_A::TRAILING_EDGE
+    }
+}
+impl core::ops::Deref for CPHA_R {
+    type Target = crate::FieldReader<bool, CPHA_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CPHA` writer - Clock Phase"]
+pub struct CPHA_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CPHA_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: CPHA_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "The data is sampled on a leading SCK edge and changed on a trailing SCK edge"]
+    #[inline(always)]
+    pub fn leading_edge(self) -> &'a mut W {
+        self.variant(CPHA_A::LEADING_EDGE)
+    }
+    #[doc = "The data is sampled on a trailing SCK edge and changed on a leading SCK edge"]
+    #[inline(always)]
+    pub fn trailing_edge(self) -> &'a mut W {
+        self.variant(CPHA_A::TRAILING_EDGE)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
+        self.w
+    }
+}
+#[doc = "Clock Polarity\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CPOL_A {
+    #[doc = "0: SCK is low when idle"]
+    IDLE_LOW = 0,
+    #[doc = "1: SCK is high when idle"]
+    IDLE_HIGH = 1,
+}
+impl From<CPOL_A> for bool {
+    #[inline(always)]
+    fn from(variant: CPOL_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CPOL` reader - Clock Polarity"]
+pub struct CPOL_R(crate::FieldReader<bool, CPOL_A>);
+impl CPOL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CPOL_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CPOL_A {
+        match self.bits {
+            false => CPOL_A::IDLE_LOW,
+            true => CPOL_A::IDLE_HIGH,
+        }
+    }
+    #[doc = "Checks if the value of the field is `IDLE_LOW`"]
+    #[inline(always)]
+    pub fn is_idle_low(&self) -> bool {
+        **self == CPOL_A::IDLE_LOW
+    }
+    #[doc = "Checks if the value of the field is `IDLE_HIGH`"]
+    #[inline(always)]
+    pub fn is_idle_high(&self) -> bool {
+        **self == CPOL_A::IDLE_HIGH
+    }
+}
+impl core::ops::Deref for CPOL_R {
+    type Target = crate::FieldReader<bool, CPOL_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CPOL` writer - Clock Polarity"]
+pub struct CPOL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CPOL_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: CPOL_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "SCK is low when idle"]
+    #[inline(always)]
+    pub fn idle_low(self) -> &'a mut W {
+        self.variant(CPOL_A::IDLE_LOW)
+    }
+    #[doc = "SCK is high when idle"]
+    #[inline(always)]
+    pub fn idle_high(self) -> &'a mut W {
+        self.variant(CPOL_A::IDLE_HIGH)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
+        self.w
+    }
+}
+#[doc = "Data Order\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DORD_A {
+    #[doc = "0: MSB is transferred first"]
+    MSB = 0,
+    #[doc = "1: LSB is transferred first"]
+    LSB = 1,
+}
+impl From<DORD_A> for bool {
+    #[inline(always)]
+    fn from(variant: DORD_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DORD` reader - Data Order"]
+pub struct DORD_R(crate::FieldReader<bool, DORD_A>);
+impl DORD_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DORD_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DORD_A {
+        match self.bits {
+            false => DORD_A::MSB,
+            true => DORD_A::LSB,
+        }
+    }
+    #[doc = "Checks if the value of the field is `MSB`"]
+    #[inline(always)]
+    pub fn is_msb(&self) -> bool {
+        **self == DORD_A::MSB
+    }
+    #[doc = "Checks if the value of the field is `LSB`"]
+    #[inline(always)]
+    pub fn is_lsb(&self) -> bool {
+        **self == DORD_A::LSB
+    }
+}
+impl core::ops::Deref for DORD_R {
+    type Target = crate::FieldReader<bool, DORD_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DORD` writer - Data Order"]
+pub struct DORD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DORD_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: DORD_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "MSB is transferred first"]
+    #[inline(always)]
+    pub fn msb(self) -> &'a mut W {
+        self.variant(DORD_A::MSB)
+    }
+    #[doc = "LSB is transferred first"]
+    #[inline(always)]
+    pub fn lsb(self) -> &'a mut W {
+        self.variant(DORD_A::LSB)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bits 2:4 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&self) -> MODE_R {
+        MODE_R::new(((self.bits >> 2) & 0x07) as u8)
+    }
+    #[doc = "Bit 7 - Run during Standby"]
+    #[inline(always)]
+    pub fn runstdby(&self) -> RUNSTDBY_R {
+        RUNSTDBY_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+    #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
+    #[inline(always)]
+    pub fn ibon(&self) -> IBON_R {
+        IBON_R::new(((self.bits >> 8) & 0x01) != 0)
+    }
+    #[doc = "Bits 16:17 - Data Out Pinout"]
+    #[inline(always)]
+    pub fn dopo(&self) -> DOPO_R {
+        DOPO_R::new(((self.bits >> 16) & 0x03) as u8)
+    }
+    #[doc = "Bits 20:21 - Data In Pinout"]
+    #[inline(always)]
+    pub fn dipo(&self) -> DIPO_R {
+        DIPO_R::new(((self.bits >> 20) & 0x03) as u8)
+    }
+    #[doc = "Bits 24:27 - Frame Format"]
+    #[inline(always)]
+    pub fn form(&self) -> FORM_R {
+        FORM_R::new(((self.bits >> 24) & 0x0f) as u8)
+    }
+    #[doc = "Bit 28 - Clock Phase"]
+    #[inline(always)]
+    pub fn cpha(&self) -> CPHA_R {
+        CPHA_R::new(((self.bits >> 28) & 0x01) != 0)
+    }
+    #[doc = "Bit 29 - Clock Polarity"]
+    #[inline(always)]
+    pub fn cpol(&self) -> CPOL_R {
+        CPOL_R::new(((self.bits >> 29) & 0x01) != 0)
+    }
+    #[doc = "Bit 30 - Data Order"]
+    #[inline(always)]
+    pub fn dord(&self) -> DORD_R {
+        DORD_R::new(((self.bits >> 30) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&mut self) -> SWRST_W {
+        SWRST_W { w: self }
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Bits 2:4 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&mut self) -> MODE_W {
+        MODE_W { w: self }
+    }
+    #[doc = "Bit 7 - Run during Standby"]
+    #[inline(always)]
+    pub fn runstdby(&mut self) -> RUNSTDBY_W {
+        RUNSTDBY_W { w: self }
+    }
+    #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
+    #[inline(always)]
+    pub fn ibon(&mut self) -> IBON_W {
+        IBON_W { w: self }
+    }
+    #[doc = "Bits 16:17 - Data Out Pinout"]
+    #[inline(always)]
+    pub fn dopo(&mut self) -> DOPO_W {
+        DOPO_W { w: self }
+    }
+    #[doc = "Bits 20:21 - Data In Pinout"]
+    #[inline(always)]
+    pub fn dipo(&mut self) -> DIPO_W {
+        DIPO_W { w: self }
+    }
+    #[doc = "Bits 24:27 - Frame Format"]
+    #[inline(always)]
+    pub fn form(&mut self) -> FORM_W {
+        FORM_W { w: self }
+    }
+    #[doc = "Bit 28 - Clock Phase"]
+    #[inline(always)]
+    pub fn cpha(&mut self) -> CPHA_W {
+        CPHA_W { w: self }
+    }
+    #[doc = "Bit 29 - Clock Polarity"]
+    #[inline(always)]
+    pub fn cpol(&mut self) -> CPOL_W {
+        CPOL_W { w: self }
+    }
+    #[doc = "Bit 30 - Data Order"]
+    #[inline(always)]
+    pub fn dord(&mut self) -> DORD_W {
+        DORD_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIS Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
+pub struct CTRLA_SPEC;
+impl crate::RegisterSpec for CTRLA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
+impl crate::Readable for CTRLA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
+impl crate::Writable for CTRLA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLA to value 0"]
+impl crate::Resettable for CTRLA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spis/ctrlb.rs b/src/sercom0/spis/ctrlb.rs
new file mode 100644
index 0000000..623b07d
--- /dev/null
+++ b/src/sercom0/spis/ctrlb.rs
@@ -0,0 +1,433 @@
+#[doc = "Register `CTRLB` reader"]
+pub struct R(crate::R<CTRLB_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLB_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLB_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLB` writer"]
+pub struct W(crate::W<CTRLB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Character Size\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum CHSIZE_A {
+    #[doc = "0: 8 bits"]
+    _8_BIT = 0,
+    #[doc = "1: 9 bits"]
+    _9_BIT = 1,
+}
+impl From<CHSIZE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: CHSIZE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `CHSIZE` reader - Character Size"]
+pub struct CHSIZE_R(crate::FieldReader<u8, CHSIZE_A>);
+impl CHSIZE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        CHSIZE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<CHSIZE_A> {
+        match self.bits {
+            0 => Some(CHSIZE_A::_8_BIT),
+            1 => Some(CHSIZE_A::_9_BIT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `_8_BIT`"]
+    #[inline(always)]
+    pub fn is_8_bit(&self) -> bool {
+        **self == CHSIZE_A::_8_BIT
+    }
+    #[doc = "Checks if the value of the field is `_9_BIT`"]
+    #[inline(always)]
+    pub fn is_9_bit(&self) -> bool {
+        **self == CHSIZE_A::_9_BIT
+    }
+}
+impl core::ops::Deref for CHSIZE_R {
+    type Target = crate::FieldReader<u8, CHSIZE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CHSIZE` writer - Character Size"]
+pub struct CHSIZE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CHSIZE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: CHSIZE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "8 bits"]
+    #[inline(always)]
+    pub fn _8_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_8_BIT)
+    }
+    #[doc = "9 bits"]
+    #[inline(always)]
+    pub fn _9_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_9_BIT)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07);
+        self.w
+    }
+}
+#[doc = "Field `PLOADEN` reader - Data Preload Enable"]
+pub struct PLOADEN_R(crate::FieldReader<bool, bool>);
+impl PLOADEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        PLOADEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for PLOADEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PLOADEN` writer - Data Preload Enable"]
+pub struct PLOADEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PLOADEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
+        self.w
+    }
+}
+#[doc = "Field `SSDE` reader - Slave Select Low Detect Enable"]
+pub struct SSDE_R(crate::FieldReader<bool, bool>);
+impl SSDE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SSDE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SSDE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SSDE` writer - Slave Select Low Detect Enable"]
+pub struct SSDE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SSDE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
+        self.w
+    }
+}
+#[doc = "Field `MSSEN` reader - Master Slave Select Enable"]
+pub struct MSSEN_R(crate::FieldReader<bool, bool>);
+impl MSSEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        MSSEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for MSSEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MSSEN` writer - Master Slave Select Enable"]
+pub struct MSSEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MSSEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
+        self.w
+    }
+}
+#[doc = "Address Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum AMODE_A {
+    #[doc = "0: SPI Address mask "]
+    MASK = 0,
+    #[doc = "1: Two unique Addressess"]
+    _2_ADDRESSES = 1,
+    #[doc = "2: Address Range"]
+    RANGE = 2,
+}
+impl From<AMODE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: AMODE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `AMODE` reader - Address Mode"]
+pub struct AMODE_R(crate::FieldReader<u8, AMODE_A>);
+impl AMODE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        AMODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<AMODE_A> {
+        match self.bits {
+            0 => Some(AMODE_A::MASK),
+            1 => Some(AMODE_A::_2_ADDRESSES),
+            2 => Some(AMODE_A::RANGE),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `MASK`"]
+    #[inline(always)]
+    pub fn is_mask(&self) -> bool {
+        **self == AMODE_A::MASK
+    }
+    #[doc = "Checks if the value of the field is `_2_ADDRESSES`"]
+    #[inline(always)]
+    pub fn is_2_addresses(&self) -> bool {
+        **self == AMODE_A::_2_ADDRESSES
+    }
+    #[doc = "Checks if the value of the field is `RANGE`"]
+    #[inline(always)]
+    pub fn is_range(&self) -> bool {
+        **self == AMODE_A::RANGE
+    }
+}
+impl core::ops::Deref for AMODE_R {
+    type Target = crate::FieldReader<u8, AMODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `AMODE` writer - Address Mode"]
+pub struct AMODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> AMODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: AMODE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "SPI Address mask"]
+    #[inline(always)]
+    pub fn mask(self) -> &'a mut W {
+        self.variant(AMODE_A::MASK)
+    }
+    #[doc = "Two unique Addressess"]
+    #[inline(always)]
+    pub fn _2_addresses(self) -> &'a mut W {
+        self.variant(AMODE_A::_2_ADDRESSES)
+    }
+    #[doc = "Address Range"]
+    #[inline(always)]
+    pub fn range(self) -> &'a mut W {
+        self.variant(AMODE_A::RANGE)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14);
+        self.w
+    }
+}
+#[doc = "Field `RXEN` reader - Receiver Enable"]
+pub struct RXEN_R(crate::FieldReader<bool, bool>);
+impl RXEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXEN` writer - Receiver Enable"]
+pub struct RXEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - Character Size"]
+    #[inline(always)]
+    pub fn chsize(&self) -> CHSIZE_R {
+        CHSIZE_R::new((self.bits & 0x07) as u8)
+    }
+    #[doc = "Bit 6 - Data Preload Enable"]
+    #[inline(always)]
+    pub fn ploaden(&self) -> PLOADEN_R {
+        PLOADEN_R::new(((self.bits >> 6) & 0x01) != 0)
+    }
+    #[doc = "Bit 9 - Slave Select Low Detect Enable"]
+    #[inline(always)]
+    pub fn ssde(&self) -> SSDE_R {
+        SSDE_R::new(((self.bits >> 9) & 0x01) != 0)
+    }
+    #[doc = "Bit 13 - Master Slave Select Enable"]
+    #[inline(always)]
+    pub fn mssen(&self) -> MSSEN_R {
+        MSSEN_R::new(((self.bits >> 13) & 0x01) != 0)
+    }
+    #[doc = "Bits 14:15 - Address Mode"]
+    #[inline(always)]
+    pub fn amode(&self) -> AMODE_R {
+        AMODE_R::new(((self.bits >> 14) & 0x03) as u8)
+    }
+    #[doc = "Bit 17 - Receiver Enable"]
+    #[inline(always)]
+    pub fn rxen(&self) -> RXEN_R {
+        RXEN_R::new(((self.bits >> 17) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - Character Size"]
+    #[inline(always)]
+    pub fn chsize(&mut self) -> CHSIZE_W {
+        CHSIZE_W { w: self }
+    }
+    #[doc = "Bit 6 - Data Preload Enable"]
+    #[inline(always)]
+    pub fn ploaden(&mut self) -> PLOADEN_W {
+        PLOADEN_W { w: self }
+    }
+    #[doc = "Bit 9 - Slave Select Low Detect Enable"]
+    #[inline(always)]
+    pub fn ssde(&mut self) -> SSDE_W {
+        SSDE_W { w: self }
+    }
+    #[doc = "Bit 13 - Master Slave Select Enable"]
+    #[inline(always)]
+    pub fn mssen(&mut self) -> MSSEN_W {
+        MSSEN_W { w: self }
+    }
+    #[doc = "Bits 14:15 - Address Mode"]
+    #[inline(always)]
+    pub fn amode(&mut self) -> AMODE_W {
+        AMODE_W { w: self }
+    }
+    #[doc = "Bit 17 - Receiver Enable"]
+    #[inline(always)]
+    pub fn rxen(&mut self) -> RXEN_W {
+        RXEN_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIS Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"]
+pub struct CTRLB_SPEC;
+impl crate::RegisterSpec for CTRLB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrlb::R](R) reader structure"]
+impl crate::Readable for CTRLB_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"]
+impl crate::Writable for CTRLB_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLB to value 0"]
+impl crate::Resettable for CTRLB_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spis/data.rs b/src/sercom0/spis/data.rs
new file mode 100644
index 0000000..b987f05
--- /dev/null
+++ b/src/sercom0/spis/data.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `DATA` reader"]
+pub struct R(crate::R<DATA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DATA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DATA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DATA` writer"]
+pub struct W(crate::W<DATA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DATA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DATA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DATA` reader - Data Value"]
+pub struct DATA_R(crate::FieldReader<u16, u16>);
+impl DATA_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        DATA_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DATA_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DATA` writer - Data Value"]
+pub struct DATA_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DATA_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01ff) | (value as u32 & 0x01ff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:8 - Data Value"]
+    #[inline(always)]
+    pub fn data(&self) -> DATA_R {
+        DATA_R::new((self.bits & 0x01ff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:8 - Data Value"]
+    #[inline(always)]
+    pub fn data(&mut self) -> DATA_W {
+        DATA_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIS Data\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"]
+pub struct DATA_SPEC;
+impl crate::RegisterSpec for DATA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [data::R](R) reader structure"]
+impl crate::Readable for DATA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"]
+impl crate::Writable for DATA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DATA to value 0"]
+impl crate::Resettable for DATA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spis/dbgctrl.rs b/src/sercom0/spis/dbgctrl.rs
new file mode 100644
index 0000000..98164f2
--- /dev/null
+++ b/src/sercom0/spis/dbgctrl.rs
@@ -0,0 +1,112 @@
+#[doc = "Register `DBGCTRL` reader"]
+pub struct R(crate::R<DBGCTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DBGCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DBGCTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DBGCTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DBGCTRL` writer"]
+pub struct W(crate::W<DBGCTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DBGCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DBGCTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DBGCTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DBGSTOP` reader - Debug Mode"]
+pub struct DBGSTOP_R(crate::FieldReader<bool, bool>);
+impl DBGSTOP_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DBGSTOP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DBGSTOP_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DBGSTOP` writer - Debug Mode"]
+pub struct DBGSTOP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DBGSTOP_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Debug Mode"]
+    #[inline(always)]
+    pub fn dbgstop(&self) -> DBGSTOP_R {
+        DBGSTOP_R::new((self.bits & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Debug Mode"]
+    #[inline(always)]
+    pub fn dbgstop(&mut self) -> DBGSTOP_W {
+        DBGSTOP_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIS Debug Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgctrl](index.html) module"]
+pub struct DBGCTRL_SPEC;
+impl crate::RegisterSpec for DBGCTRL_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [dbgctrl::R](R) reader structure"]
+impl crate::Readable for DBGCTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [dbgctrl::W](W) writer structure"]
+impl crate::Writable for DBGCTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DBGCTRL to value 0"]
+impl crate::Resettable for DBGCTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spis/intenclr.rs b/src/sercom0/spis/intenclr.rs
new file mode 100644
index 0000000..8b3e4a1
--- /dev/null
+++ b/src/sercom0/spis/intenclr.rs
@@ -0,0 +1,296 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DRE` reader - Data Register Empty Interrupt Disable"]
+pub struct DRE_R(crate::FieldReader<bool, bool>);
+impl DRE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRE` writer - Data Register Empty Interrupt Disable"]
+pub struct DRE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `TXC` reader - Transmit Complete Interrupt Disable"]
+pub struct TXC_R(crate::FieldReader<bool, bool>);
+impl TXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXC` writer - Transmit Complete Interrupt Disable"]
+pub struct TXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXC` reader - Receive Complete Interrupt Disable"]
+pub struct RXC_R(crate::FieldReader<bool, bool>);
+impl RXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXC` writer - Receive Complete Interrupt Disable"]
+pub struct RXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `SSL` reader - Slave Select Low Interrupt Disable"]
+pub struct SSL_R(crate::FieldReader<bool, bool>);
+impl SSL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SSL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SSL_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SSL` writer - Slave Select Low Interrupt Disable"]
+pub struct SSL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SSL_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt Disable"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt Disable"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Disable"]
+    #[inline(always)]
+    pub fn dre(&self) -> DRE_R {
+        DRE_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn txc(&self) -> TXC_R {
+        TXC_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxc(&self) -> RXC_R {
+        RXC_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Slave Select Low Interrupt Disable"]
+    #[inline(always)]
+    pub fn ssl(&self) -> SSL_R {
+        SSL_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Disable"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Disable"]
+    #[inline(always)]
+    pub fn dre(&mut self) -> DRE_W {
+        DRE_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn txc(&mut self) -> TXC_W {
+        TXC_W { w: self }
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxc(&mut self) -> RXC_W {
+        RXC_W { w: self }
+    }
+    #[doc = "Bit 3 - Slave Select Low Interrupt Disable"]
+    #[inline(always)]
+    pub fn ssl(&mut self) -> SSL_W {
+        SSL_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Disable"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIS Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spis/intenset.rs b/src/sercom0/spis/intenset.rs
new file mode 100644
index 0000000..c63c203
--- /dev/null
+++ b/src/sercom0/spis/intenset.rs
@@ -0,0 +1,296 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DRE` reader - Data Register Empty Interrupt Enable"]
+pub struct DRE_R(crate::FieldReader<bool, bool>);
+impl DRE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRE` writer - Data Register Empty Interrupt Enable"]
+pub struct DRE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `TXC` reader - Transmit Complete Interrupt Enable"]
+pub struct TXC_R(crate::FieldReader<bool, bool>);
+impl TXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXC` writer - Transmit Complete Interrupt Enable"]
+pub struct TXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXC` reader - Receive Complete Interrupt Enable"]
+pub struct RXC_R(crate::FieldReader<bool, bool>);
+impl RXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXC` writer - Receive Complete Interrupt Enable"]
+pub struct RXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `SSL` reader - Slave Select Low Interrupt Enable"]
+pub struct SSL_R(crate::FieldReader<bool, bool>);
+impl SSL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SSL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SSL_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SSL` writer - Slave Select Low Interrupt Enable"]
+pub struct SSL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SSL_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt Enable"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt Enable"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Enable"]
+    #[inline(always)]
+    pub fn dre(&self) -> DRE_R {
+        DRE_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn txc(&self) -> TXC_R {
+        TXC_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxc(&self) -> RXC_R {
+        RXC_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Slave Select Low Interrupt Enable"]
+    #[inline(always)]
+    pub fn ssl(&self) -> SSL_R {
+        SSL_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Enable"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Enable"]
+    #[inline(always)]
+    pub fn dre(&mut self) -> DRE_W {
+        DRE_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn txc(&mut self) -> TXC_W {
+        TXC_W { w: self }
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxc(&mut self) -> RXC_W {
+        RXC_W { w: self }
+    }
+    #[doc = "Bit 3 - Slave Select Low Interrupt Enable"]
+    #[inline(always)]
+    pub fn ssl(&mut self) -> SSL_W {
+        SSL_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Enable"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIS Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spis/intflag.rs b/src/sercom0/spis/intflag.rs
new file mode 100644
index 0000000..2436f02
--- /dev/null
+++ b/src/sercom0/spis/intflag.rs
@@ -0,0 +1,296 @@
+#[doc = "Register `INTFLAG` reader"]
+pub struct R(crate::R<INTFLAG_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTFLAG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTFLAG_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTFLAG_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTFLAG` writer"]
+pub struct W(crate::W<INTFLAG_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTFLAG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTFLAG_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTFLAG_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DRE` reader - Data Register Empty Interrupt"]
+pub struct DRE_R(crate::FieldReader<bool, bool>);
+impl DRE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRE` writer - Data Register Empty Interrupt"]
+pub struct DRE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `TXC` reader - Transmit Complete Interrupt"]
+pub struct TXC_R(crate::FieldReader<bool, bool>);
+impl TXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXC` writer - Transmit Complete Interrupt"]
+pub struct TXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXC` reader - Receive Complete Interrupt"]
+pub struct RXC_R(crate::FieldReader<bool, bool>);
+impl RXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXC` writer - Receive Complete Interrupt"]
+pub struct RXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `SSL` reader - Slave Select Low Interrupt Flag"]
+pub struct SSL_R(crate::FieldReader<bool, bool>);
+impl SSL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SSL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SSL_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SSL` writer - Slave Select Low Interrupt Flag"]
+pub struct SSL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SSL_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Data Register Empty Interrupt"]
+    #[inline(always)]
+    pub fn dre(&self) -> DRE_R {
+        DRE_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt"]
+    #[inline(always)]
+    pub fn txc(&self) -> TXC_R {
+        TXC_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt"]
+    #[inline(always)]
+    pub fn rxc(&self) -> RXC_R {
+        RXC_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Slave Select Low Interrupt Flag"]
+    #[inline(always)]
+    pub fn ssl(&self) -> SSL_R {
+        SSL_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Data Register Empty Interrupt"]
+    #[inline(always)]
+    pub fn dre(&mut self) -> DRE_W {
+        DRE_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt"]
+    #[inline(always)]
+    pub fn txc(&mut self) -> TXC_W {
+        TXC_W { w: self }
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt"]
+    #[inline(always)]
+    pub fn rxc(&mut self) -> RXC_W {
+        RXC_W { w: self }
+    }
+    #[doc = "Bit 3 - Slave Select Low Interrupt Flag"]
+    #[inline(always)]
+    pub fn ssl(&mut self) -> SSL_W {
+        SSL_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIS Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"]
+pub struct INTFLAG_SPEC;
+impl crate::RegisterSpec for INTFLAG_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intflag::R](R) reader structure"]
+impl crate::Readable for INTFLAG_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"]
+impl crate::Writable for INTFLAG_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTFLAG to value 0"]
+impl crate::Resettable for INTFLAG_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spis/status.rs b/src/sercom0/spis/status.rs
new file mode 100644
index 0000000..94846aa
--- /dev/null
+++ b/src/sercom0/spis/status.rs
@@ -0,0 +1,112 @@
+#[doc = "Register `STATUS` reader"]
+pub struct R(crate::R<STATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<STATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `STATUS` writer"]
+pub struct W(crate::W<STATUS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<STATUS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<STATUS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BUFOVF` reader - Buffer Overflow"]
+pub struct BUFOVF_R(crate::FieldReader<bool, bool>);
+impl BUFOVF_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        BUFOVF_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BUFOVF_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BUFOVF` writer - Buffer Overflow"]
+pub struct BUFOVF_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BUFOVF_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 2 - Buffer Overflow"]
+    #[inline(always)]
+    pub fn bufovf(&self) -> BUFOVF_R {
+        BUFOVF_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 2 - Buffer Overflow"]
+    #[inline(always)]
+    pub fn bufovf(&mut self) -> BUFOVF_W {
+        BUFOVF_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SPIS Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
+pub struct STATUS_SPEC;
+impl crate::RegisterSpec for STATUS_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [status::R](R) reader structure"]
+impl crate::Readable for STATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"]
+impl crate::Writable for STATUS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets STATUS to value 0"]
+impl crate::Resettable for STATUS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/spis/syncbusy.rs b/src/sercom0/spis/syncbusy.rs
new file mode 100644
index 0000000..2f848a5
--- /dev/null
+++ b/src/sercom0/spis/syncbusy.rs
@@ -0,0 +1,90 @@
+#[doc = "Register `SYNCBUSY` reader"]
+pub struct R(crate::R<SYNCBUSY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYNCBUSY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYNCBUSY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset Synchronization Busy"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` reader - SERCOM Enable Synchronization Busy"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CTRLB` reader - CTRLB Synchronization Busy"]
+pub struct CTRLB_R(crate::FieldReader<bool, bool>);
+impl CTRLB_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CTRLB_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CTRLB_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset Synchronization Busy"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - SERCOM Enable Synchronization Busy"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - CTRLB Synchronization Busy"]
+    #[inline(always)]
+    pub fn ctrlb(&self) -> CTRLB_R {
+        CTRLB_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+}
+#[doc = "SPIS Synchronization Busy\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"]
+pub struct SYNCBUSY_SPEC;
+impl crate::RegisterSpec for SYNCBUSY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [syncbusy::R](R) reader structure"]
+impl crate::Readable for SYNCBUSY_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets SYNCBUSY to value 0"]
+impl crate::Resettable for SYNCBUSY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext.rs b/src/sercom0/usart_ext.rs
new file mode 100644
index 0000000..8c08b9e
--- /dev/null
+++ b/src/sercom0/usart_ext.rs
@@ -0,0 +1,60 @@
+#[doc = "CTRLA register accessor: an alias for `Reg<CTRLA_SPEC>`"]
+pub type CTRLA = crate::Reg<ctrla::CTRLA_SPEC>;
+#[doc = "USART_EXT Control A"]
+pub mod ctrla;
+#[doc = "CTRLB register accessor: an alias for `Reg<CTRLB_SPEC>`"]
+pub type CTRLB = crate::Reg<ctrlb::CTRLB_SPEC>;
+#[doc = "USART_EXT Control B"]
+pub mod ctrlb;
+#[doc = "CTRLC register accessor: an alias for `Reg<CTRLC_SPEC>`"]
+pub type CTRLC = crate::Reg<ctrlc::CTRLC_SPEC>;
+#[doc = "USART_EXT Control C"]
+pub mod ctrlc;
+#[doc = "BAUD register accessor: an alias for `Reg<BAUD_SPEC>`"]
+pub type BAUD = crate::Reg<baud::BAUD_SPEC>;
+#[doc = "USART_EXT Baud Rate"]
+pub mod baud;
+#[doc = "BAUD_FRAC_MODE register accessor: an alias for `Reg<BAUD_FRAC_MODE_SPEC>`"]
+pub type BAUD_FRAC_MODE = crate::Reg<baud_frac_mode::BAUD_FRAC_MODE_SPEC>;
+#[doc = "USART_EXT Baud Rate"]
+pub mod baud_frac_mode;
+#[doc = "BAUD_FRACFP_MODE register accessor: an alias for `Reg<BAUD_FRACFP_MODE_SPEC>`"]
+pub type BAUD_FRACFP_MODE = crate::Reg<baud_fracfp_mode::BAUD_FRACFP_MODE_SPEC>;
+#[doc = "USART_EXT Baud Rate"]
+pub mod baud_fracfp_mode;
+#[doc = "BAUD_USARTFP_MODE register accessor: an alias for `Reg<BAUD_USARTFP_MODE_SPEC>`"]
+pub type BAUD_USARTFP_MODE = crate::Reg<baud_usartfp_mode::BAUD_USARTFP_MODE_SPEC>;
+#[doc = "USART_EXT Baud Rate"]
+pub mod baud_usartfp_mode;
+#[doc = "RXPL register accessor: an alias for `Reg<RXPL_SPEC>`"]
+pub type RXPL = crate::Reg<rxpl::RXPL_SPEC>;
+#[doc = "USART_EXT Receive Pulse Length"]
+pub mod rxpl;
+#[doc = "INTENCLR register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "USART_EXT Interrupt Enable Clear"]
+pub mod intenclr;
+#[doc = "INTENSET register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "USART_EXT Interrupt Enable Set"]
+pub mod intenset;
+#[doc = "INTFLAG register accessor: an alias for `Reg<INTFLAG_SPEC>`"]
+pub type INTFLAG = crate::Reg<intflag::INTFLAG_SPEC>;
+#[doc = "USART_EXT Interrupt Flag Status and Clear"]
+pub mod intflag;
+#[doc = "STATUS register accessor: an alias for `Reg<STATUS_SPEC>`"]
+pub type STATUS = crate::Reg<status::STATUS_SPEC>;
+#[doc = "USART_EXT Status"]
+pub mod status;
+#[doc = "SYNCBUSY register accessor: an alias for `Reg<SYNCBUSY_SPEC>`"]
+pub type SYNCBUSY = crate::Reg<syncbusy::SYNCBUSY_SPEC>;
+#[doc = "USART_EXT Synchronization Busy"]
+pub mod syncbusy;
+#[doc = "DATA register accessor: an alias for `Reg<DATA_SPEC>`"]
+pub type DATA = crate::Reg<data::DATA_SPEC>;
+#[doc = "USART_EXT Data"]
+pub mod data;
+#[doc = "DBGCTRL register accessor: an alias for `Reg<DBGCTRL_SPEC>`"]
+pub type DBGCTRL = crate::Reg<dbgctrl::DBGCTRL_SPEC>;
+#[doc = "USART_EXT Debug Control"]
+pub mod dbgctrl;
diff --git a/src/sercom0/usart_ext/baud.rs b/src/sercom0/usart_ext/baud.rs
new file mode 100644
index 0000000..da7444a
--- /dev/null
+++ b/src/sercom0/usart_ext/baud.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `BAUD` reader"]
+pub struct R(crate::R<BAUD_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<BAUD_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<BAUD_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<BAUD_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `BAUD` writer"]
+pub struct W(crate::W<BAUD_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<BAUD_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<BAUD_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<BAUD_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BAUD` reader - Baud Rate Value"]
+pub struct BAUD_R(crate::FieldReader<u16, u16>);
+impl BAUD_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        BAUD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BAUD_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BAUD` writer - Baud Rate Value"]
+pub struct BAUD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BAUD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xffff) | (value as u16 & 0xffff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:15 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&self) -> BAUD_R {
+        BAUD_R::new((self.bits & 0xffff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:15 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&mut self) -> BAUD_W {
+        BAUD_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud](index.html) module"]
+pub struct BAUD_SPEC;
+impl crate::RegisterSpec for BAUD_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [baud::R](R) reader structure"]
+impl crate::Readable for BAUD_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [baud::W](W) writer structure"]
+impl crate::Writable for BAUD_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets BAUD to value 0"]
+impl crate::Resettable for BAUD_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/baud_frac_mode.rs b/src/sercom0/usart_ext/baud_frac_mode.rs
new file mode 100644
index 0000000..31e0a81
--- /dev/null
+++ b/src/sercom0/usart_ext/baud_frac_mode.rs
@@ -0,0 +1,138 @@
+#[doc = "Register `BAUD_FRAC_MODE` reader"]
+pub struct R(crate::R<BAUD_FRAC_MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<BAUD_FRAC_MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<BAUD_FRAC_MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<BAUD_FRAC_MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `BAUD_FRAC_MODE` writer"]
+pub struct W(crate::W<BAUD_FRAC_MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<BAUD_FRAC_MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<BAUD_FRAC_MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<BAUD_FRAC_MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BAUD` reader - Baud Rate Value"]
+pub struct BAUD_R(crate::FieldReader<u16, u16>);
+impl BAUD_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        BAUD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BAUD_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BAUD` writer - Baud Rate Value"]
+pub struct BAUD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BAUD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x1fff) | (value as u16 & 0x1fff);
+        self.w
+    }
+}
+#[doc = "Field `FP` reader - Fractional Part"]
+pub struct FP_R(crate::FieldReader<u8, u8>);
+impl FP_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        FP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for FP_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `FP` writer - Fractional Part"]
+pub struct FP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> FP_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u16 & 0x07) << 13);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:12 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&self) -> BAUD_R {
+        BAUD_R::new((self.bits & 0x1fff) as u16)
+    }
+    #[doc = "Bits 13:15 - Fractional Part"]
+    #[inline(always)]
+    pub fn fp(&self) -> FP_R {
+        FP_R::new(((self.bits >> 13) & 0x07) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:12 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&mut self) -> BAUD_W {
+        BAUD_W { w: self }
+    }
+    #[doc = "Bits 13:15 - Fractional Part"]
+    #[inline(always)]
+    pub fn fp(&mut self) -> FP_W {
+        FP_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud_frac_mode](index.html) module"]
+pub struct BAUD_FRAC_MODE_SPEC;
+impl crate::RegisterSpec for BAUD_FRAC_MODE_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [baud_frac_mode::R](R) reader structure"]
+impl crate::Readable for BAUD_FRAC_MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [baud_frac_mode::W](W) writer structure"]
+impl crate::Writable for BAUD_FRAC_MODE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets BAUD_FRAC_MODE to value 0"]
+impl crate::Resettable for BAUD_FRAC_MODE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/baud_fracfp_mode.rs b/src/sercom0/usart_ext/baud_fracfp_mode.rs
new file mode 100644
index 0000000..833e44a
--- /dev/null
+++ b/src/sercom0/usart_ext/baud_fracfp_mode.rs
@@ -0,0 +1,138 @@
+#[doc = "Register `BAUD_FRACFP_MODE` reader"]
+pub struct R(crate::R<BAUD_FRACFP_MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<BAUD_FRACFP_MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<BAUD_FRACFP_MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<BAUD_FRACFP_MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `BAUD_FRACFP_MODE` writer"]
+pub struct W(crate::W<BAUD_FRACFP_MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<BAUD_FRACFP_MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<BAUD_FRACFP_MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<BAUD_FRACFP_MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BAUD` reader - Baud Rate Value"]
+pub struct BAUD_R(crate::FieldReader<u16, u16>);
+impl BAUD_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        BAUD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BAUD_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BAUD` writer - Baud Rate Value"]
+pub struct BAUD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BAUD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x1fff) | (value as u16 & 0x1fff);
+        self.w
+    }
+}
+#[doc = "Field `FP` reader - Fractional Part"]
+pub struct FP_R(crate::FieldReader<u8, u8>);
+impl FP_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        FP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for FP_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `FP` writer - Fractional Part"]
+pub struct FP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> FP_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u16 & 0x07) << 13);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:12 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&self) -> BAUD_R {
+        BAUD_R::new((self.bits & 0x1fff) as u16)
+    }
+    #[doc = "Bits 13:15 - Fractional Part"]
+    #[inline(always)]
+    pub fn fp(&self) -> FP_R {
+        FP_R::new(((self.bits >> 13) & 0x07) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:12 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&mut self) -> BAUD_W {
+        BAUD_W { w: self }
+    }
+    #[doc = "Bits 13:15 - Fractional Part"]
+    #[inline(always)]
+    pub fn fp(&mut self) -> FP_W {
+        FP_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud_fracfp_mode](index.html) module"]
+pub struct BAUD_FRACFP_MODE_SPEC;
+impl crate::RegisterSpec for BAUD_FRACFP_MODE_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [baud_fracfp_mode::R](R) reader structure"]
+impl crate::Readable for BAUD_FRACFP_MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [baud_fracfp_mode::W](W) writer structure"]
+impl crate::Writable for BAUD_FRACFP_MODE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets BAUD_FRACFP_MODE to value 0"]
+impl crate::Resettable for BAUD_FRACFP_MODE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/baud_usartfp_mode.rs b/src/sercom0/usart_ext/baud_usartfp_mode.rs
new file mode 100644
index 0000000..f992604
--- /dev/null
+++ b/src/sercom0/usart_ext/baud_usartfp_mode.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `BAUD_USARTFP_MODE` reader"]
+pub struct R(crate::R<BAUD_USARTFP_MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<BAUD_USARTFP_MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<BAUD_USARTFP_MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<BAUD_USARTFP_MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `BAUD_USARTFP_MODE` writer"]
+pub struct W(crate::W<BAUD_USARTFP_MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<BAUD_USARTFP_MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<BAUD_USARTFP_MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<BAUD_USARTFP_MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BAUD` reader - Baud Rate Value"]
+pub struct BAUD_R(crate::FieldReader<u16, u16>);
+impl BAUD_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        BAUD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BAUD_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BAUD` writer - Baud Rate Value"]
+pub struct BAUD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BAUD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xffff) | (value as u16 & 0xffff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:15 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&self) -> BAUD_R {
+        BAUD_R::new((self.bits & 0xffff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:15 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&mut self) -> BAUD_W {
+        BAUD_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud_usartfp_mode](index.html) module"]
+pub struct BAUD_USARTFP_MODE_SPEC;
+impl crate::RegisterSpec for BAUD_USARTFP_MODE_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [baud_usartfp_mode::R](R) reader structure"]
+impl crate::Readable for BAUD_USARTFP_MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [baud_usartfp_mode::W](W) writer structure"]
+impl crate::Writable for BAUD_USARTFP_MODE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets BAUD_USARTFP_MODE to value 0"]
+impl crate::Resettable for BAUD_USARTFP_MODE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/ctrla.rs b/src/sercom0/usart_ext/ctrla.rs
new file mode 100644
index 0000000..9431067
--- /dev/null
+++ b/src/sercom0/usart_ext/ctrla.rs
@@ -0,0 +1,1158 @@
+#[doc = "Register `CTRLA` reader"]
+pub struct R(crate::R<CTRLA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLA` writer"]
+pub struct W(crate::W<CTRLA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SWRST` writer - Software Reset"]
+pub struct SWRST_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SWRST_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Operating Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum MODE_A {
+    #[doc = "0: USART with external clock"]
+    USART_EXT_CLK = 0,
+    #[doc = "1: USART with internal clock"]
+    USART_INT_CLK = 1,
+    #[doc = "2: SPI in slave operation"]
+    SPI_SLAVE = 2,
+    #[doc = "3: SPI in master operation"]
+    SPI_MASTER = 3,
+    #[doc = "4: I2C slave operation"]
+    I2C_SLAVE = 4,
+    #[doc = "5: I2C master operation"]
+    I2C_MASTER = 5,
+}
+impl From<MODE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: MODE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `MODE` reader - Operating Mode"]
+pub struct MODE_R(crate::FieldReader<u8, MODE_A>);
+impl MODE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        MODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<MODE_A> {
+        match self.bits {
+            0 => Some(MODE_A::USART_EXT_CLK),
+            1 => Some(MODE_A::USART_INT_CLK),
+            2 => Some(MODE_A::SPI_SLAVE),
+            3 => Some(MODE_A::SPI_MASTER),
+            4 => Some(MODE_A::I2C_SLAVE),
+            5 => Some(MODE_A::I2C_MASTER),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `USART_EXT_CLK`"]
+    #[inline(always)]
+    pub fn is_usart_ext_clk(&self) -> bool {
+        **self == MODE_A::USART_EXT_CLK
+    }
+    #[doc = "Checks if the value of the field is `USART_INT_CLK`"]
+    #[inline(always)]
+    pub fn is_usart_int_clk(&self) -> bool {
+        **self == MODE_A::USART_INT_CLK
+    }
+    #[doc = "Checks if the value of the field is `SPI_SLAVE`"]
+    #[inline(always)]
+    pub fn is_spi_slave(&self) -> bool {
+        **self == MODE_A::SPI_SLAVE
+    }
+    #[doc = "Checks if the value of the field is `SPI_MASTER`"]
+    #[inline(always)]
+    pub fn is_spi_master(&self) -> bool {
+        **self == MODE_A::SPI_MASTER
+    }
+    #[doc = "Checks if the value of the field is `I2C_SLAVE`"]
+    #[inline(always)]
+    pub fn is_i2c_slave(&self) -> bool {
+        **self == MODE_A::I2C_SLAVE
+    }
+    #[doc = "Checks if the value of the field is `I2C_MASTER`"]
+    #[inline(always)]
+    pub fn is_i2c_master(&self) -> bool {
+        **self == MODE_A::I2C_MASTER
+    }
+}
+impl core::ops::Deref for MODE_R {
+    type Target = crate::FieldReader<u8, MODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MODE` writer - Operating Mode"]
+pub struct MODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: MODE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "USART with external clock"]
+    #[inline(always)]
+    pub fn usart_ext_clk(self) -> &'a mut W {
+        self.variant(MODE_A::USART_EXT_CLK)
+    }
+    #[doc = "USART with internal clock"]
+    #[inline(always)]
+    pub fn usart_int_clk(self) -> &'a mut W {
+        self.variant(MODE_A::USART_INT_CLK)
+    }
+    #[doc = "SPI in slave operation"]
+    #[inline(always)]
+    pub fn spi_slave(self) -> &'a mut W {
+        self.variant(MODE_A::SPI_SLAVE)
+    }
+    #[doc = "SPI in master operation"]
+    #[inline(always)]
+    pub fn spi_master(self) -> &'a mut W {
+        self.variant(MODE_A::SPI_MASTER)
+    }
+    #[doc = "I2C slave operation"]
+    #[inline(always)]
+    pub fn i2c_slave(self) -> &'a mut W {
+        self.variant(MODE_A::I2C_SLAVE)
+    }
+    #[doc = "I2C master operation"]
+    #[inline(always)]
+    pub fn i2c_master(self) -> &'a mut W {
+        self.variant(MODE_A::I2C_MASTER)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 2)) | ((value as u32 & 0x07) << 2);
+        self.w
+    }
+}
+#[doc = "Field `RUNSTDBY` reader - Run during Standby"]
+pub struct RUNSTDBY_R(crate::FieldReader<bool, bool>);
+impl RUNSTDBY_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RUNSTDBY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RUNSTDBY_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RUNSTDBY` writer - Run during Standby"]
+pub struct RUNSTDBY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RUNSTDBY_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
+        self.w
+    }
+}
+#[doc = "Field `IBON` reader - Immediate Buffer Overflow Notification"]
+pub struct IBON_R(crate::FieldReader<bool, bool>);
+impl IBON_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        IBON_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for IBON_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `IBON` writer - Immediate Buffer Overflow Notification"]
+pub struct IBON_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> IBON_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
+        self.w
+    }
+}
+#[doc = "Sample\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SAMPR_A {
+    #[doc = "0: 16x over-sampling using arithmetic baudrate generation"]
+    _16X_ARITHMETIC = 0,
+    #[doc = "1: 16x over-sampling using fractional baudrate generation"]
+    _16X_FRACTIONAL = 1,
+    #[doc = "2: 8x over-sampling using arithmetic baudrate generation"]
+    _8X_ARITHMETIC = 2,
+    #[doc = "3: 8x over-sampling using fractional baudrate generation"]
+    _8X_FRACTIONAL = 3,
+    #[doc = "4: 3x over-sampling using arithmetic baudrate generation"]
+    _3X_ARITHMETIC = 4,
+}
+impl From<SAMPR_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SAMPR_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `SAMPR` reader - Sample"]
+pub struct SAMPR_R(crate::FieldReader<u8, SAMPR_A>);
+impl SAMPR_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        SAMPR_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SAMPR_A> {
+        match self.bits {
+            0 => Some(SAMPR_A::_16X_ARITHMETIC),
+            1 => Some(SAMPR_A::_16X_FRACTIONAL),
+            2 => Some(SAMPR_A::_8X_ARITHMETIC),
+            3 => Some(SAMPR_A::_8X_FRACTIONAL),
+            4 => Some(SAMPR_A::_3X_ARITHMETIC),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `_16X_ARITHMETIC`"]
+    #[inline(always)]
+    pub fn is_16x_arithmetic(&self) -> bool {
+        **self == SAMPR_A::_16X_ARITHMETIC
+    }
+    #[doc = "Checks if the value of the field is `_16X_FRACTIONAL`"]
+    #[inline(always)]
+    pub fn is_16x_fractional(&self) -> bool {
+        **self == SAMPR_A::_16X_FRACTIONAL
+    }
+    #[doc = "Checks if the value of the field is `_8X_ARITHMETIC`"]
+    #[inline(always)]
+    pub fn is_8x_arithmetic(&self) -> bool {
+        **self == SAMPR_A::_8X_ARITHMETIC
+    }
+    #[doc = "Checks if the value of the field is `_8X_FRACTIONAL`"]
+    #[inline(always)]
+    pub fn is_8x_fractional(&self) -> bool {
+        **self == SAMPR_A::_8X_FRACTIONAL
+    }
+    #[doc = "Checks if the value of the field is `_3X_ARITHMETIC`"]
+    #[inline(always)]
+    pub fn is_3x_arithmetic(&self) -> bool {
+        **self == SAMPR_A::_3X_ARITHMETIC
+    }
+}
+impl core::ops::Deref for SAMPR_R {
+    type Target = crate::FieldReader<u8, SAMPR_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SAMPR` writer - Sample"]
+pub struct SAMPR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SAMPR_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: SAMPR_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "16x over-sampling using arithmetic baudrate generation"]
+    #[inline(always)]
+    pub fn _16x_arithmetic(self) -> &'a mut W {
+        self.variant(SAMPR_A::_16X_ARITHMETIC)
+    }
+    #[doc = "16x over-sampling using fractional baudrate generation"]
+    #[inline(always)]
+    pub fn _16x_fractional(self) -> &'a mut W {
+        self.variant(SAMPR_A::_16X_FRACTIONAL)
+    }
+    #[doc = "8x over-sampling using arithmetic baudrate generation"]
+    #[inline(always)]
+    pub fn _8x_arithmetic(self) -> &'a mut W {
+        self.variant(SAMPR_A::_8X_ARITHMETIC)
+    }
+    #[doc = "8x over-sampling using fractional baudrate generation"]
+    #[inline(always)]
+    pub fn _8x_fractional(self) -> &'a mut W {
+        self.variant(SAMPR_A::_8X_FRACTIONAL)
+    }
+    #[doc = "3x over-sampling using arithmetic baudrate generation"]
+    #[inline(always)]
+    pub fn _3x_arithmetic(self) -> &'a mut W {
+        self.variant(SAMPR_A::_3X_ARITHMETIC)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13);
+        self.w
+    }
+}
+#[doc = "Transmit Data Pinout\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum TXPO_A {
+    #[doc = "0: SERCOM PAD\\[0\\]
+is used for data transmission"]
+    PAD0 = 0,
+    #[doc = "1: SERCOM PAD\\[2\\]
+is used for data transmission"]
+    PAD2 = 1,
+}
+impl From<TXPO_A> for u8 {
+    #[inline(always)]
+    fn from(variant: TXPO_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `TXPO` reader - Transmit Data Pinout"]
+pub struct TXPO_R(crate::FieldReader<u8, TXPO_A>);
+impl TXPO_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        TXPO_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<TXPO_A> {
+        match self.bits {
+            0 => Some(TXPO_A::PAD0),
+            1 => Some(TXPO_A::PAD2),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `PAD0`"]
+    #[inline(always)]
+    pub fn is_pad0(&self) -> bool {
+        **self == TXPO_A::PAD0
+    }
+    #[doc = "Checks if the value of the field is `PAD2`"]
+    #[inline(always)]
+    pub fn is_pad2(&self) -> bool {
+        **self == TXPO_A::PAD2
+    }
+}
+impl core::ops::Deref for TXPO_R {
+    type Target = crate::FieldReader<u8, TXPO_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXPO` writer - Transmit Data Pinout"]
+pub struct TXPO_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXPO_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: TXPO_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "SERCOM PAD\\[0\\]
+is used for data transmission"]
+    #[inline(always)]
+    pub fn pad0(self) -> &'a mut W {
+        self.variant(TXPO_A::PAD0)
+    }
+    #[doc = "SERCOM PAD\\[2\\]
+is used for data transmission"]
+    #[inline(always)]
+    pub fn pad2(self) -> &'a mut W {
+        self.variant(TXPO_A::PAD2)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16);
+        self.w
+    }
+}
+#[doc = "Receive Data Pinout\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum RXPO_A {
+    #[doc = "0: SERCOM PAD\\[0\\]
+is used for data reception"]
+    PAD0 = 0,
+    #[doc = "1: SERCOM PAD\\[1\\]
+is used for data reception"]
+    PAD1 = 1,
+    #[doc = "2: SERCOM PAD\\[2\\]
+is used for data reception"]
+    PAD2 = 2,
+    #[doc = "3: SERCOM PAD\\[3\\]
+is used for data reception"]
+    PAD3 = 3,
+}
+impl From<RXPO_A> for u8 {
+    #[inline(always)]
+    fn from(variant: RXPO_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `RXPO` reader - Receive Data Pinout"]
+pub struct RXPO_R(crate::FieldReader<u8, RXPO_A>);
+impl RXPO_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        RXPO_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> RXPO_A {
+        match self.bits {
+            0 => RXPO_A::PAD0,
+            1 => RXPO_A::PAD1,
+            2 => RXPO_A::PAD2,
+            3 => RXPO_A::PAD3,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `PAD0`"]
+    #[inline(always)]
+    pub fn is_pad0(&self) -> bool {
+        **self == RXPO_A::PAD0
+    }
+    #[doc = "Checks if the value of the field is `PAD1`"]
+    #[inline(always)]
+    pub fn is_pad1(&self) -> bool {
+        **self == RXPO_A::PAD1
+    }
+    #[doc = "Checks if the value of the field is `PAD2`"]
+    #[inline(always)]
+    pub fn is_pad2(&self) -> bool {
+        **self == RXPO_A::PAD2
+    }
+    #[doc = "Checks if the value of the field is `PAD3`"]
+    #[inline(always)]
+    pub fn is_pad3(&self) -> bool {
+        **self == RXPO_A::PAD3
+    }
+}
+impl core::ops::Deref for RXPO_R {
+    type Target = crate::FieldReader<u8, RXPO_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXPO` writer - Receive Data Pinout"]
+pub struct RXPO_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXPO_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: RXPO_A) -> &'a mut W {
+        self.bits(variant.into())
+    }
+    #[doc = "SERCOM PAD\\[0\\]
+is used for data reception"]
+    #[inline(always)]
+    pub fn pad0(self) -> &'a mut W {
+        self.variant(RXPO_A::PAD0)
+    }
+    #[doc = "SERCOM PAD\\[1\\]
+is used for data reception"]
+    #[inline(always)]
+    pub fn pad1(self) -> &'a mut W {
+        self.variant(RXPO_A::PAD1)
+    }
+    #[doc = "SERCOM PAD\\[2\\]
+is used for data reception"]
+    #[inline(always)]
+    pub fn pad2(self) -> &'a mut W {
+        self.variant(RXPO_A::PAD2)
+    }
+    #[doc = "SERCOM PAD\\[3\\]
+is used for data reception"]
+    #[inline(always)]
+    pub fn pad3(self) -> &'a mut W {
+        self.variant(RXPO_A::PAD3)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20);
+        self.w
+    }
+}
+#[doc = "Field `SAMPA` reader - Sample Adjustment"]
+pub struct SAMPA_R(crate::FieldReader<u8, u8>);
+impl SAMPA_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        SAMPA_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SAMPA_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SAMPA` writer - Sample Adjustment"]
+pub struct SAMPA_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SAMPA_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22);
+        self.w
+    }
+}
+#[doc = "Frame Format\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum FORM_A {
+    #[doc = "0: USART frame"]
+    USART_FRAME_NO_PARITY = 0,
+    #[doc = "1: USART frame with parity"]
+    USART_FRAME_WITH_PARITY = 1,
+    #[doc = "2: LIN Master - Break and sync generation"]
+    USART_FRAME_LIN_MASTER_MODE = 2,
+    #[doc = "4: Auto-baud - break detection and auto-baud"]
+    USART_FRAME_AUTO_BAUD_NO_PARITY = 4,
+    #[doc = "5: Auto-baud - break detection and auto-baud with parity"]
+    USART_FRAME_AUTO_BAUD_WITH_PARITY = 5,
+}
+impl From<FORM_A> for u8 {
+    #[inline(always)]
+    fn from(variant: FORM_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `FORM` reader - Frame Format"]
+pub struct FORM_R(crate::FieldReader<u8, FORM_A>);
+impl FORM_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        FORM_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<FORM_A> {
+        match self.bits {
+            0 => Some(FORM_A::USART_FRAME_NO_PARITY),
+            1 => Some(FORM_A::USART_FRAME_WITH_PARITY),
+            2 => Some(FORM_A::USART_FRAME_LIN_MASTER_MODE),
+            4 => Some(FORM_A::USART_FRAME_AUTO_BAUD_NO_PARITY),
+            5 => Some(FORM_A::USART_FRAME_AUTO_BAUD_WITH_PARITY),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `USART_FRAME_NO_PARITY`"]
+    #[inline(always)]
+    pub fn is_usart_frame_no_parity(&self) -> bool {
+        **self == FORM_A::USART_FRAME_NO_PARITY
+    }
+    #[doc = "Checks if the value of the field is `USART_FRAME_WITH_PARITY`"]
+    #[inline(always)]
+    pub fn is_usart_frame_with_parity(&self) -> bool {
+        **self == FORM_A::USART_FRAME_WITH_PARITY
+    }
+    #[doc = "Checks if the value of the field is `USART_FRAME_LIN_MASTER_MODE`"]
+    #[inline(always)]
+    pub fn is_usart_frame_lin_master_mode(&self) -> bool {
+        **self == FORM_A::USART_FRAME_LIN_MASTER_MODE
+    }
+    #[doc = "Checks if the value of the field is `USART_FRAME_AUTO_BAUD_NO_PARITY`"]
+    #[inline(always)]
+    pub fn is_usart_frame_auto_baud_no_parity(&self) -> bool {
+        **self == FORM_A::USART_FRAME_AUTO_BAUD_NO_PARITY
+    }
+    #[doc = "Checks if the value of the field is `USART_FRAME_AUTO_BAUD_WITH_PARITY`"]
+    #[inline(always)]
+    pub fn is_usart_frame_auto_baud_with_parity(&self) -> bool {
+        **self == FORM_A::USART_FRAME_AUTO_BAUD_WITH_PARITY
+    }
+}
+impl core::ops::Deref for FORM_R {
+    type Target = crate::FieldReader<u8, FORM_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `FORM` writer - Frame Format"]
+pub struct FORM_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> FORM_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: FORM_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "USART frame"]
+    #[inline(always)]
+    pub fn usart_frame_no_parity(self) -> &'a mut W {
+        self.variant(FORM_A::USART_FRAME_NO_PARITY)
+    }
+    #[doc = "USART frame with parity"]
+    #[inline(always)]
+    pub fn usart_frame_with_parity(self) -> &'a mut W {
+        self.variant(FORM_A::USART_FRAME_WITH_PARITY)
+    }
+    #[doc = "LIN Master - Break and sync generation"]
+    #[inline(always)]
+    pub fn usart_frame_lin_master_mode(self) -> &'a mut W {
+        self.variant(FORM_A::USART_FRAME_LIN_MASTER_MODE)
+    }
+    #[doc = "Auto-baud - break detection and auto-baud"]
+    #[inline(always)]
+    pub fn usart_frame_auto_baud_no_parity(self) -> &'a mut W {
+        self.variant(FORM_A::USART_FRAME_AUTO_BAUD_NO_PARITY)
+    }
+    #[doc = "Auto-baud - break detection and auto-baud with parity"]
+    #[inline(always)]
+    pub fn usart_frame_auto_baud_with_parity(self) -> &'a mut W {
+        self.variant(FORM_A::USART_FRAME_AUTO_BAUD_WITH_PARITY)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24);
+        self.w
+    }
+}
+#[doc = "Communication Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CMODE_A {
+    #[doc = "0: Asynchronous Communication"]
+    ASYNC = 0,
+    #[doc = "1: Synchronous Communication"]
+    SYNC = 1,
+}
+impl From<CMODE_A> for bool {
+    #[inline(always)]
+    fn from(variant: CMODE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CMODE` reader - Communication Mode"]
+pub struct CMODE_R(crate::FieldReader<bool, CMODE_A>);
+impl CMODE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CMODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CMODE_A {
+        match self.bits {
+            false => CMODE_A::ASYNC,
+            true => CMODE_A::SYNC,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ASYNC`"]
+    #[inline(always)]
+    pub fn is_async(&self) -> bool {
+        **self == CMODE_A::ASYNC
+    }
+    #[doc = "Checks if the value of the field is `SYNC`"]
+    #[inline(always)]
+    pub fn is_sync(&self) -> bool {
+        **self == CMODE_A::SYNC
+    }
+}
+impl core::ops::Deref for CMODE_R {
+    type Target = crate::FieldReader<bool, CMODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CMODE` writer - Communication Mode"]
+pub struct CMODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CMODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: CMODE_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "Asynchronous Communication"]
+    #[inline(always)]
+    pub fn async_(self) -> &'a mut W {
+        self.variant(CMODE_A::ASYNC)
+    }
+    #[doc = "Synchronous Communication"]
+    #[inline(always)]
+    pub fn sync(self) -> &'a mut W {
+        self.variant(CMODE_A::SYNC)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
+        self.w
+    }
+}
+#[doc = "Clock Polarity\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CPOL_A {
+    #[doc = "0: TxD Change:- Rising XCK edge, RxD Sample:- Falling XCK edge"]
+    IDLE_LOW = 0,
+    #[doc = "1: TxD Change:- Falling XCK edge, RxD Sample:- Rising XCK edge"]
+    IDLE_HIGH = 1,
+}
+impl From<CPOL_A> for bool {
+    #[inline(always)]
+    fn from(variant: CPOL_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CPOL` reader - Clock Polarity"]
+pub struct CPOL_R(crate::FieldReader<bool, CPOL_A>);
+impl CPOL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CPOL_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CPOL_A {
+        match self.bits {
+            false => CPOL_A::IDLE_LOW,
+            true => CPOL_A::IDLE_HIGH,
+        }
+    }
+    #[doc = "Checks if the value of the field is `IDLE_LOW`"]
+    #[inline(always)]
+    pub fn is_idle_low(&self) -> bool {
+        **self == CPOL_A::IDLE_LOW
+    }
+    #[doc = "Checks if the value of the field is `IDLE_HIGH`"]
+    #[inline(always)]
+    pub fn is_idle_high(&self) -> bool {
+        **self == CPOL_A::IDLE_HIGH
+    }
+}
+impl core::ops::Deref for CPOL_R {
+    type Target = crate::FieldReader<bool, CPOL_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CPOL` writer - Clock Polarity"]
+pub struct CPOL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CPOL_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: CPOL_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "TxD Change:- Rising XCK edge, RxD Sample:- Falling XCK edge"]
+    #[inline(always)]
+    pub fn idle_low(self) -> &'a mut W {
+        self.variant(CPOL_A::IDLE_LOW)
+    }
+    #[doc = "TxD Change:- Falling XCK edge, RxD Sample:- Rising XCK edge"]
+    #[inline(always)]
+    pub fn idle_high(self) -> &'a mut W {
+        self.variant(CPOL_A::IDLE_HIGH)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
+        self.w
+    }
+}
+#[doc = "Data Order\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DORD_A {
+    #[doc = "0: MSB is transmitted first"]
+    MSB = 0,
+    #[doc = "1: LSB is transmitted first"]
+    LSB = 1,
+}
+impl From<DORD_A> for bool {
+    #[inline(always)]
+    fn from(variant: DORD_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DORD` reader - Data Order"]
+pub struct DORD_R(crate::FieldReader<bool, DORD_A>);
+impl DORD_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DORD_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DORD_A {
+        match self.bits {
+            false => DORD_A::MSB,
+            true => DORD_A::LSB,
+        }
+    }
+    #[doc = "Checks if the value of the field is `MSB`"]
+    #[inline(always)]
+    pub fn is_msb(&self) -> bool {
+        **self == DORD_A::MSB
+    }
+    #[doc = "Checks if the value of the field is `LSB`"]
+    #[inline(always)]
+    pub fn is_lsb(&self) -> bool {
+        **self == DORD_A::LSB
+    }
+}
+impl core::ops::Deref for DORD_R {
+    type Target = crate::FieldReader<bool, DORD_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DORD` writer - Data Order"]
+pub struct DORD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DORD_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: DORD_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "MSB is transmitted first"]
+    #[inline(always)]
+    pub fn msb(self) -> &'a mut W {
+        self.variant(DORD_A::MSB)
+    }
+    #[doc = "LSB is transmitted first"]
+    #[inline(always)]
+    pub fn lsb(self) -> &'a mut W {
+        self.variant(DORD_A::LSB)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bits 2:4 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&self) -> MODE_R {
+        MODE_R::new(((self.bits >> 2) & 0x07) as u8)
+    }
+    #[doc = "Bit 7 - Run during Standby"]
+    #[inline(always)]
+    pub fn runstdby(&self) -> RUNSTDBY_R {
+        RUNSTDBY_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+    #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
+    #[inline(always)]
+    pub fn ibon(&self) -> IBON_R {
+        IBON_R::new(((self.bits >> 8) & 0x01) != 0)
+    }
+    #[doc = "Bits 13:15 - Sample"]
+    #[inline(always)]
+    pub fn sampr(&self) -> SAMPR_R {
+        SAMPR_R::new(((self.bits >> 13) & 0x07) as u8)
+    }
+    #[doc = "Bits 16:17 - Transmit Data Pinout"]
+    #[inline(always)]
+    pub fn txpo(&self) -> TXPO_R {
+        TXPO_R::new(((self.bits >> 16) & 0x03) as u8)
+    }
+    #[doc = "Bits 20:21 - Receive Data Pinout"]
+    #[inline(always)]
+    pub fn rxpo(&self) -> RXPO_R {
+        RXPO_R::new(((self.bits >> 20) & 0x03) as u8)
+    }
+    #[doc = "Bits 22:23 - Sample Adjustment"]
+    #[inline(always)]
+    pub fn sampa(&self) -> SAMPA_R {
+        SAMPA_R::new(((self.bits >> 22) & 0x03) as u8)
+    }
+    #[doc = "Bits 24:27 - Frame Format"]
+    #[inline(always)]
+    pub fn form(&self) -> FORM_R {
+        FORM_R::new(((self.bits >> 24) & 0x0f) as u8)
+    }
+    #[doc = "Bit 28 - Communication Mode"]
+    #[inline(always)]
+    pub fn cmode(&self) -> CMODE_R {
+        CMODE_R::new(((self.bits >> 28) & 0x01) != 0)
+    }
+    #[doc = "Bit 29 - Clock Polarity"]
+    #[inline(always)]
+    pub fn cpol(&self) -> CPOL_R {
+        CPOL_R::new(((self.bits >> 29) & 0x01) != 0)
+    }
+    #[doc = "Bit 30 - Data Order"]
+    #[inline(always)]
+    pub fn dord(&self) -> DORD_R {
+        DORD_R::new(((self.bits >> 30) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&mut self) -> SWRST_W {
+        SWRST_W { w: self }
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Bits 2:4 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&mut self) -> MODE_W {
+        MODE_W { w: self }
+    }
+    #[doc = "Bit 7 - Run during Standby"]
+    #[inline(always)]
+    pub fn runstdby(&mut self) -> RUNSTDBY_W {
+        RUNSTDBY_W { w: self }
+    }
+    #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
+    #[inline(always)]
+    pub fn ibon(&mut self) -> IBON_W {
+        IBON_W { w: self }
+    }
+    #[doc = "Bits 13:15 - Sample"]
+    #[inline(always)]
+    pub fn sampr(&mut self) -> SAMPR_W {
+        SAMPR_W { w: self }
+    }
+    #[doc = "Bits 16:17 - Transmit Data Pinout"]
+    #[inline(always)]
+    pub fn txpo(&mut self) -> TXPO_W {
+        TXPO_W { w: self }
+    }
+    #[doc = "Bits 20:21 - Receive Data Pinout"]
+    #[inline(always)]
+    pub fn rxpo(&mut self) -> RXPO_W {
+        RXPO_W { w: self }
+    }
+    #[doc = "Bits 22:23 - Sample Adjustment"]
+    #[inline(always)]
+    pub fn sampa(&mut self) -> SAMPA_W {
+        SAMPA_W { w: self }
+    }
+    #[doc = "Bits 24:27 - Frame Format"]
+    #[inline(always)]
+    pub fn form(&mut self) -> FORM_W {
+        FORM_W { w: self }
+    }
+    #[doc = "Bit 28 - Communication Mode"]
+    #[inline(always)]
+    pub fn cmode(&mut self) -> CMODE_W {
+        CMODE_W { w: self }
+    }
+    #[doc = "Bit 29 - Clock Polarity"]
+    #[inline(always)]
+    pub fn cpol(&mut self) -> CPOL_W {
+        CPOL_W { w: self }
+    }
+    #[doc = "Bit 30 - Data Order"]
+    #[inline(always)]
+    pub fn dord(&mut self) -> DORD_W {
+        DORD_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
+pub struct CTRLA_SPEC;
+impl crate::RegisterSpec for CTRLA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
+impl crate::Readable for CTRLA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
+impl crate::Writable for CTRLA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLA to value 0"]
+impl crate::Resettable for CTRLA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/ctrlb.rs b/src/sercom0/usart_ext/ctrlb.rs
new file mode 100644
index 0000000..7b13e7f
--- /dev/null
+++ b/src/sercom0/usart_ext/ctrlb.rs
@@ -0,0 +1,642 @@
+#[doc = "Register `CTRLB` reader"]
+pub struct R(crate::R<CTRLB_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLB_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLB_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLB` writer"]
+pub struct W(crate::W<CTRLB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Character Size\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum CHSIZE_A {
+    #[doc = "0: 8 Bits"]
+    _8_BIT = 0,
+    #[doc = "1: 9 Bits"]
+    _9_BIT = 1,
+    #[doc = "5: 5 Bits"]
+    _5_BIT = 5,
+    #[doc = "6: 6 Bits"]
+    _6_BIT = 6,
+    #[doc = "7: 7 Bits"]
+    _7_BIT = 7,
+}
+impl From<CHSIZE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: CHSIZE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `CHSIZE` reader - Character Size"]
+pub struct CHSIZE_R(crate::FieldReader<u8, CHSIZE_A>);
+impl CHSIZE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        CHSIZE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<CHSIZE_A> {
+        match self.bits {
+            0 => Some(CHSIZE_A::_8_BIT),
+            1 => Some(CHSIZE_A::_9_BIT),
+            5 => Some(CHSIZE_A::_5_BIT),
+            6 => Some(CHSIZE_A::_6_BIT),
+            7 => Some(CHSIZE_A::_7_BIT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `_8_BIT`"]
+    #[inline(always)]
+    pub fn is_8_bit(&self) -> bool {
+        **self == CHSIZE_A::_8_BIT
+    }
+    #[doc = "Checks if the value of the field is `_9_BIT`"]
+    #[inline(always)]
+    pub fn is_9_bit(&self) -> bool {
+        **self == CHSIZE_A::_9_BIT
+    }
+    #[doc = "Checks if the value of the field is `_5_BIT`"]
+    #[inline(always)]
+    pub fn is_5_bit(&self) -> bool {
+        **self == CHSIZE_A::_5_BIT
+    }
+    #[doc = "Checks if the value of the field is `_6_BIT`"]
+    #[inline(always)]
+    pub fn is_6_bit(&self) -> bool {
+        **self == CHSIZE_A::_6_BIT
+    }
+    #[doc = "Checks if the value of the field is `_7_BIT`"]
+    #[inline(always)]
+    pub fn is_7_bit(&self) -> bool {
+        **self == CHSIZE_A::_7_BIT
+    }
+}
+impl core::ops::Deref for CHSIZE_R {
+    type Target = crate::FieldReader<u8, CHSIZE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CHSIZE` writer - Character Size"]
+pub struct CHSIZE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CHSIZE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: CHSIZE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "8 Bits"]
+    #[inline(always)]
+    pub fn _8_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_8_BIT)
+    }
+    #[doc = "9 Bits"]
+    #[inline(always)]
+    pub fn _9_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_9_BIT)
+    }
+    #[doc = "5 Bits"]
+    #[inline(always)]
+    pub fn _5_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_5_BIT)
+    }
+    #[doc = "6 Bits"]
+    #[inline(always)]
+    pub fn _6_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_6_BIT)
+    }
+    #[doc = "7 Bits"]
+    #[inline(always)]
+    pub fn _7_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_7_BIT)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07);
+        self.w
+    }
+}
+#[doc = "Stop Bit Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SBMODE_A {
+    #[doc = "0: One Stop Bit"]
+    _1_BIT = 0,
+    #[doc = "1: Two Stop Bits"]
+    _2_BIT = 1,
+}
+impl From<SBMODE_A> for bool {
+    #[inline(always)]
+    fn from(variant: SBMODE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `SBMODE` reader - Stop Bit Mode"]
+pub struct SBMODE_R(crate::FieldReader<bool, SBMODE_A>);
+impl SBMODE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SBMODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SBMODE_A {
+        match self.bits {
+            false => SBMODE_A::_1_BIT,
+            true => SBMODE_A::_2_BIT,
+        }
+    }
+    #[doc = "Checks if the value of the field is `_1_BIT`"]
+    #[inline(always)]
+    pub fn is_1_bit(&self) -> bool {
+        **self == SBMODE_A::_1_BIT
+    }
+    #[doc = "Checks if the value of the field is `_2_BIT`"]
+    #[inline(always)]
+    pub fn is_2_bit(&self) -> bool {
+        **self == SBMODE_A::_2_BIT
+    }
+}
+impl core::ops::Deref for SBMODE_R {
+    type Target = crate::FieldReader<bool, SBMODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SBMODE` writer - Stop Bit Mode"]
+pub struct SBMODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SBMODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: SBMODE_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "One Stop Bit"]
+    #[inline(always)]
+    pub fn _1_bit(self) -> &'a mut W {
+        self.variant(SBMODE_A::_1_BIT)
+    }
+    #[doc = "Two Stop Bits"]
+    #[inline(always)]
+    pub fn _2_bit(self) -> &'a mut W {
+        self.variant(SBMODE_A::_2_BIT)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
+        self.w
+    }
+}
+#[doc = "Field `COLDEN` reader - Collision Detection Enable"]
+pub struct COLDEN_R(crate::FieldReader<bool, bool>);
+impl COLDEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        COLDEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for COLDEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `COLDEN` writer - Collision Detection Enable"]
+pub struct COLDEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> COLDEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
+        self.w
+    }
+}
+#[doc = "Field `SFDE` reader - Start of Frame Detection Enable"]
+pub struct SFDE_R(crate::FieldReader<bool, bool>);
+impl SFDE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SFDE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SFDE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SFDE` writer - Start of Frame Detection Enable"]
+pub struct SFDE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SFDE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
+        self.w
+    }
+}
+#[doc = "Field `ENC` reader - Encoding Format"]
+pub struct ENC_R(crate::FieldReader<bool, bool>);
+impl ENC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENC` writer - Encoding Format"]
+pub struct ENC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
+        self.w
+    }
+}
+#[doc = "Parity Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum PMODE_A {
+    #[doc = "0: Even Parity"]
+    EVEN = 0,
+    #[doc = "1: Odd Parity"]
+    ODD = 1,
+}
+impl From<PMODE_A> for bool {
+    #[inline(always)]
+    fn from(variant: PMODE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `PMODE` reader - Parity Mode"]
+pub struct PMODE_R(crate::FieldReader<bool, PMODE_A>);
+impl PMODE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        PMODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> PMODE_A {
+        match self.bits {
+            false => PMODE_A::EVEN,
+            true => PMODE_A::ODD,
+        }
+    }
+    #[doc = "Checks if the value of the field is `EVEN`"]
+    #[inline(always)]
+    pub fn is_even(&self) -> bool {
+        **self == PMODE_A::EVEN
+    }
+    #[doc = "Checks if the value of the field is `ODD`"]
+    #[inline(always)]
+    pub fn is_odd(&self) -> bool {
+        **self == PMODE_A::ODD
+    }
+}
+impl core::ops::Deref for PMODE_R {
+    type Target = crate::FieldReader<bool, PMODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PMODE` writer - Parity Mode"]
+pub struct PMODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PMODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: PMODE_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "Even Parity"]
+    #[inline(always)]
+    pub fn even(self) -> &'a mut W {
+        self.variant(PMODE_A::EVEN)
+    }
+    #[doc = "Odd Parity"]
+    #[inline(always)]
+    pub fn odd(self) -> &'a mut W {
+        self.variant(PMODE_A::ODD)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
+        self.w
+    }
+}
+#[doc = "Field `TXEN` reader - Transmitter Enable"]
+pub struct TXEN_R(crate::FieldReader<bool, bool>);
+impl TXEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXEN` writer - Transmitter Enable"]
+pub struct TXEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
+        self.w
+    }
+}
+#[doc = "Field `RXEN` reader - Receiver Enable"]
+pub struct RXEN_R(crate::FieldReader<bool, bool>);
+impl RXEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXEN` writer - Receiver Enable"]
+pub struct RXEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
+        self.w
+    }
+}
+#[doc = "Field `LINCMD` reader - LIN Command"]
+pub struct LINCMD_R(crate::FieldReader<u8, u8>);
+impl LINCMD_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        LINCMD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LINCMD_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LINCMD` writer - LIN Command"]
+pub struct LINCMD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LINCMD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - Character Size"]
+    #[inline(always)]
+    pub fn chsize(&self) -> CHSIZE_R {
+        CHSIZE_R::new((self.bits & 0x07) as u8)
+    }
+    #[doc = "Bit 6 - Stop Bit Mode"]
+    #[inline(always)]
+    pub fn sbmode(&self) -> SBMODE_R {
+        SBMODE_R::new(((self.bits >> 6) & 0x01) != 0)
+    }
+    #[doc = "Bit 8 - Collision Detection Enable"]
+    #[inline(always)]
+    pub fn colden(&self) -> COLDEN_R {
+        COLDEN_R::new(((self.bits >> 8) & 0x01) != 0)
+    }
+    #[doc = "Bit 9 - Start of Frame Detection Enable"]
+    #[inline(always)]
+    pub fn sfde(&self) -> SFDE_R {
+        SFDE_R::new(((self.bits >> 9) & 0x01) != 0)
+    }
+    #[doc = "Bit 10 - Encoding Format"]
+    #[inline(always)]
+    pub fn enc(&self) -> ENC_R {
+        ENC_R::new(((self.bits >> 10) & 0x01) != 0)
+    }
+    #[doc = "Bit 13 - Parity Mode"]
+    #[inline(always)]
+    pub fn pmode(&self) -> PMODE_R {
+        PMODE_R::new(((self.bits >> 13) & 0x01) != 0)
+    }
+    #[doc = "Bit 16 - Transmitter Enable"]
+    #[inline(always)]
+    pub fn txen(&self) -> TXEN_R {
+        TXEN_R::new(((self.bits >> 16) & 0x01) != 0)
+    }
+    #[doc = "Bit 17 - Receiver Enable"]
+    #[inline(always)]
+    pub fn rxen(&self) -> RXEN_R {
+        RXEN_R::new(((self.bits >> 17) & 0x01) != 0)
+    }
+    #[doc = "Bits 24:25 - LIN Command"]
+    #[inline(always)]
+    pub fn lincmd(&self) -> LINCMD_R {
+        LINCMD_R::new(((self.bits >> 24) & 0x03) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - Character Size"]
+    #[inline(always)]
+    pub fn chsize(&mut self) -> CHSIZE_W {
+        CHSIZE_W { w: self }
+    }
+    #[doc = "Bit 6 - Stop Bit Mode"]
+    #[inline(always)]
+    pub fn sbmode(&mut self) -> SBMODE_W {
+        SBMODE_W { w: self }
+    }
+    #[doc = "Bit 8 - Collision Detection Enable"]
+    #[inline(always)]
+    pub fn colden(&mut self) -> COLDEN_W {
+        COLDEN_W { w: self }
+    }
+    #[doc = "Bit 9 - Start of Frame Detection Enable"]
+    #[inline(always)]
+    pub fn sfde(&mut self) -> SFDE_W {
+        SFDE_W { w: self }
+    }
+    #[doc = "Bit 10 - Encoding Format"]
+    #[inline(always)]
+    pub fn enc(&mut self) -> ENC_W {
+        ENC_W { w: self }
+    }
+    #[doc = "Bit 13 - Parity Mode"]
+    #[inline(always)]
+    pub fn pmode(&mut self) -> PMODE_W {
+        PMODE_W { w: self }
+    }
+    #[doc = "Bit 16 - Transmitter Enable"]
+    #[inline(always)]
+    pub fn txen(&mut self) -> TXEN_W {
+        TXEN_W { w: self }
+    }
+    #[doc = "Bit 17 - Receiver Enable"]
+    #[inline(always)]
+    pub fn rxen(&mut self) -> RXEN_W {
+        RXEN_W { w: self }
+    }
+    #[doc = "Bits 24:25 - LIN Command"]
+    #[inline(always)]
+    pub fn lincmd(&mut self) -> LINCMD_W {
+        LINCMD_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"]
+pub struct CTRLB_SPEC;
+impl crate::RegisterSpec for CTRLB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrlb::R](R) reader structure"]
+impl crate::Readable for CTRLB_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"]
+impl crate::Writable for CTRLB_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLB to value 0"]
+impl crate::Resettable for CTRLB_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/ctrlc.rs b/src/sercom0/usart_ext/ctrlc.rs
new file mode 100644
index 0000000..48bdae7
--- /dev/null
+++ b/src/sercom0/usart_ext/ctrlc.rs
@@ -0,0 +1,174 @@
+#[doc = "Register `CTRLC` reader"]
+pub struct R(crate::R<CTRLC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLC` writer"]
+pub struct W(crate::W<CTRLC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `GTIME` reader - RS485 Guard Time"]
+pub struct GTIME_R(crate::FieldReader<u8, u8>);
+impl GTIME_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        GTIME_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for GTIME_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `GTIME` writer - RS485 Guard Time"]
+pub struct GTIME_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> GTIME_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07);
+        self.w
+    }
+}
+#[doc = "Field `BRKLEN` reader - LIN Master Break Length"]
+pub struct BRKLEN_R(crate::FieldReader<u8, u8>);
+impl BRKLEN_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        BRKLEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BRKLEN_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BRKLEN` writer - LIN Master Break Length"]
+pub struct BRKLEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BRKLEN_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8);
+        self.w
+    }
+}
+#[doc = "Field `HDRDLY` reader - LIN Master Header Delay"]
+pub struct HDRDLY_R(crate::FieldReader<u8, u8>);
+impl HDRDLY_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        HDRDLY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for HDRDLY_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `HDRDLY` writer - LIN Master Header Delay"]
+pub struct HDRDLY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> HDRDLY_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - RS485 Guard Time"]
+    #[inline(always)]
+    pub fn gtime(&self) -> GTIME_R {
+        GTIME_R::new((self.bits & 0x07) as u8)
+    }
+    #[doc = "Bits 8:9 - LIN Master Break Length"]
+    #[inline(always)]
+    pub fn brklen(&self) -> BRKLEN_R {
+        BRKLEN_R::new(((self.bits >> 8) & 0x03) as u8)
+    }
+    #[doc = "Bits 10:11 - LIN Master Header Delay"]
+    #[inline(always)]
+    pub fn hdrdly(&self) -> HDRDLY_R {
+        HDRDLY_R::new(((self.bits >> 10) & 0x03) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - RS485 Guard Time"]
+    #[inline(always)]
+    pub fn gtime(&mut self) -> GTIME_W {
+        GTIME_W { w: self }
+    }
+    #[doc = "Bits 8:9 - LIN Master Break Length"]
+    #[inline(always)]
+    pub fn brklen(&mut self) -> BRKLEN_W {
+        BRKLEN_W { w: self }
+    }
+    #[doc = "Bits 10:11 - LIN Master Header Delay"]
+    #[inline(always)]
+    pub fn hdrdly(&mut self) -> HDRDLY_W {
+        HDRDLY_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Control C\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlc](index.html) module"]
+pub struct CTRLC_SPEC;
+impl crate::RegisterSpec for CTRLC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrlc::R](R) reader structure"]
+impl crate::Readable for CTRLC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrlc::W](W) writer structure"]
+impl crate::Writable for CTRLC_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLC to value 0"]
+impl crate::Resettable for CTRLC_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/data.rs b/src/sercom0/usart_ext/data.rs
new file mode 100644
index 0000000..aae74e4
--- /dev/null
+++ b/src/sercom0/usart_ext/data.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `DATA` reader"]
+pub struct R(crate::R<DATA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DATA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DATA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DATA` writer"]
+pub struct W(crate::W<DATA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DATA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DATA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DATA` reader - Data Value"]
+pub struct DATA_R(crate::FieldReader<u16, u16>);
+impl DATA_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        DATA_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DATA_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DATA` writer - Data Value"]
+pub struct DATA_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DATA_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01ff) | (value as u16 & 0x01ff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:8 - Data Value"]
+    #[inline(always)]
+    pub fn data(&self) -> DATA_R {
+        DATA_R::new((self.bits & 0x01ff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:8 - Data Value"]
+    #[inline(always)]
+    pub fn data(&mut self) -> DATA_W {
+        DATA_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Data\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"]
+pub struct DATA_SPEC;
+impl crate::RegisterSpec for DATA_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [data::R](R) reader structure"]
+impl crate::Readable for DATA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"]
+impl crate::Writable for DATA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DATA to value 0"]
+impl crate::Resettable for DATA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/dbgctrl.rs b/src/sercom0/usart_ext/dbgctrl.rs
new file mode 100644
index 0000000..9cd2669
--- /dev/null
+++ b/src/sercom0/usart_ext/dbgctrl.rs
@@ -0,0 +1,112 @@
+#[doc = "Register `DBGCTRL` reader"]
+pub struct R(crate::R<DBGCTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DBGCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DBGCTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DBGCTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DBGCTRL` writer"]
+pub struct W(crate::W<DBGCTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DBGCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DBGCTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DBGCTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DBGSTOP` reader - Debug Mode"]
+pub struct DBGSTOP_R(crate::FieldReader<bool, bool>);
+impl DBGSTOP_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DBGSTOP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DBGSTOP_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DBGSTOP` writer - Debug Mode"]
+pub struct DBGSTOP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DBGSTOP_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Debug Mode"]
+    #[inline(always)]
+    pub fn dbgstop(&self) -> DBGSTOP_R {
+        DBGSTOP_R::new((self.bits & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Debug Mode"]
+    #[inline(always)]
+    pub fn dbgstop(&mut self) -> DBGSTOP_W {
+        DBGSTOP_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Debug Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgctrl](index.html) module"]
+pub struct DBGCTRL_SPEC;
+impl crate::RegisterSpec for DBGCTRL_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [dbgctrl::R](R) reader structure"]
+impl crate::Readable for DBGCTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [dbgctrl::W](W) writer structure"]
+impl crate::Writable for DBGCTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DBGCTRL to value 0"]
+impl crate::Resettable for DBGCTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/intenclr.rs b/src/sercom0/usart_ext/intenclr.rs
new file mode 100644
index 0000000..b8134ff
--- /dev/null
+++ b/src/sercom0/usart_ext/intenclr.rs
@@ -0,0 +1,388 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DRE` reader - Data Register Empty Interrupt Disable"]
+pub struct DRE_R(crate::FieldReader<bool, bool>);
+impl DRE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRE` writer - Data Register Empty Interrupt Disable"]
+pub struct DRE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `TXC` reader - Transmit Complete Interrupt Disable"]
+pub struct TXC_R(crate::FieldReader<bool, bool>);
+impl TXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXC` writer - Transmit Complete Interrupt Disable"]
+pub struct TXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXC` reader - Receive Complete Interrupt Disable"]
+pub struct RXC_R(crate::FieldReader<bool, bool>);
+impl RXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXC` writer - Receive Complete Interrupt Disable"]
+pub struct RXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `RXS` reader - Receive Start Interrupt Disable"]
+pub struct RXS_R(crate::FieldReader<bool, bool>);
+impl RXS_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXS_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXS_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXS` writer - Receive Start Interrupt Disable"]
+pub struct RXS_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXS_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `CTSIC` reader - Clear To Send Input Change Interrupt Disable"]
+pub struct CTSIC_R(crate::FieldReader<bool, bool>);
+impl CTSIC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CTSIC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CTSIC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CTSIC` writer - Clear To Send Input Change Interrupt Disable"]
+pub struct CTSIC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CTSIC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `RXBRK` reader - Break Received Interrupt Disable"]
+pub struct RXBRK_R(crate::FieldReader<bool, bool>);
+impl RXBRK_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXBRK_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXBRK_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXBRK` writer - Break Received Interrupt Disable"]
+pub struct RXBRK_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXBRK_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u8 & 0x01) << 5);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt Disable"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt Disable"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Disable"]
+    #[inline(always)]
+    pub fn dre(&self) -> DRE_R {
+        DRE_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn txc(&self) -> TXC_R {
+        TXC_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxc(&self) -> RXC_R {
+        RXC_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Receive Start Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxs(&self) -> RXS_R {
+        RXS_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - Clear To Send Input Change Interrupt Disable"]
+    #[inline(always)]
+    pub fn ctsic(&self) -> CTSIC_R {
+        CTSIC_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 5 - Break Received Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxbrk(&self) -> RXBRK_R {
+        RXBRK_R::new(((self.bits >> 5) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Disable"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Disable"]
+    #[inline(always)]
+    pub fn dre(&mut self) -> DRE_W {
+        DRE_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn txc(&mut self) -> TXC_W {
+        TXC_W { w: self }
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxc(&mut self) -> RXC_W {
+        RXC_W { w: self }
+    }
+    #[doc = "Bit 3 - Receive Start Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxs(&mut self) -> RXS_W {
+        RXS_W { w: self }
+    }
+    #[doc = "Bit 4 - Clear To Send Input Change Interrupt Disable"]
+    #[inline(always)]
+    pub fn ctsic(&mut self) -> CTSIC_W {
+        CTSIC_W { w: self }
+    }
+    #[doc = "Bit 5 - Break Received Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxbrk(&mut self) -> RXBRK_W {
+        RXBRK_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Disable"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/intenset.rs b/src/sercom0/usart_ext/intenset.rs
new file mode 100644
index 0000000..c2f4688
--- /dev/null
+++ b/src/sercom0/usart_ext/intenset.rs
@@ -0,0 +1,388 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DRE` reader - Data Register Empty Interrupt Enable"]
+pub struct DRE_R(crate::FieldReader<bool, bool>);
+impl DRE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRE` writer - Data Register Empty Interrupt Enable"]
+pub struct DRE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `TXC` reader - Transmit Complete Interrupt Enable"]
+pub struct TXC_R(crate::FieldReader<bool, bool>);
+impl TXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXC` writer - Transmit Complete Interrupt Enable"]
+pub struct TXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXC` reader - Receive Complete Interrupt Enable"]
+pub struct RXC_R(crate::FieldReader<bool, bool>);
+impl RXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXC` writer - Receive Complete Interrupt Enable"]
+pub struct RXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `RXS` reader - Receive Start Interrupt Enable"]
+pub struct RXS_R(crate::FieldReader<bool, bool>);
+impl RXS_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXS_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXS_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXS` writer - Receive Start Interrupt Enable"]
+pub struct RXS_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXS_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `CTSIC` reader - Clear To Send Input Change Interrupt Enable"]
+pub struct CTSIC_R(crate::FieldReader<bool, bool>);
+impl CTSIC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CTSIC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CTSIC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CTSIC` writer - Clear To Send Input Change Interrupt Enable"]
+pub struct CTSIC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CTSIC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `RXBRK` reader - Break Received Interrupt Enable"]
+pub struct RXBRK_R(crate::FieldReader<bool, bool>);
+impl RXBRK_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXBRK_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXBRK_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXBRK` writer - Break Received Interrupt Enable"]
+pub struct RXBRK_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXBRK_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u8 & 0x01) << 5);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt Enable"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt Enable"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Enable"]
+    #[inline(always)]
+    pub fn dre(&self) -> DRE_R {
+        DRE_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn txc(&self) -> TXC_R {
+        TXC_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxc(&self) -> RXC_R {
+        RXC_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Receive Start Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxs(&self) -> RXS_R {
+        RXS_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - Clear To Send Input Change Interrupt Enable"]
+    #[inline(always)]
+    pub fn ctsic(&self) -> CTSIC_R {
+        CTSIC_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 5 - Break Received Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxbrk(&self) -> RXBRK_R {
+        RXBRK_R::new(((self.bits >> 5) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Enable"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Enable"]
+    #[inline(always)]
+    pub fn dre(&mut self) -> DRE_W {
+        DRE_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn txc(&mut self) -> TXC_W {
+        TXC_W { w: self }
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxc(&mut self) -> RXC_W {
+        RXC_W { w: self }
+    }
+    #[doc = "Bit 3 - Receive Start Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxs(&mut self) -> RXS_W {
+        RXS_W { w: self }
+    }
+    #[doc = "Bit 4 - Clear To Send Input Change Interrupt Enable"]
+    #[inline(always)]
+    pub fn ctsic(&mut self) -> CTSIC_W {
+        CTSIC_W { w: self }
+    }
+    #[doc = "Bit 5 - Break Received Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxbrk(&mut self) -> RXBRK_W {
+        RXBRK_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Enable"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/intflag.rs b/src/sercom0/usart_ext/intflag.rs
new file mode 100644
index 0000000..bcab031
--- /dev/null
+++ b/src/sercom0/usart_ext/intflag.rs
@@ -0,0 +1,388 @@
+#[doc = "Register `INTFLAG` reader"]
+pub struct R(crate::R<INTFLAG_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTFLAG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTFLAG_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTFLAG_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTFLAG` writer"]
+pub struct W(crate::W<INTFLAG_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTFLAG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTFLAG_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTFLAG_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DRE` reader - Data Register Empty Interrupt"]
+pub struct DRE_R(crate::FieldReader<bool, bool>);
+impl DRE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRE` writer - Data Register Empty Interrupt"]
+pub struct DRE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `TXC` reader - Transmit Complete Interrupt"]
+pub struct TXC_R(crate::FieldReader<bool, bool>);
+impl TXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXC` writer - Transmit Complete Interrupt"]
+pub struct TXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXC` reader - Receive Complete Interrupt"]
+pub struct RXC_R(crate::FieldReader<bool, bool>);
+impl RXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXC` writer - Receive Complete Interrupt"]
+pub struct RXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `RXS` reader - Receive Start Interrupt"]
+pub struct RXS_R(crate::FieldReader<bool, bool>);
+impl RXS_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXS_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXS_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXS` writer - Receive Start Interrupt"]
+pub struct RXS_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXS_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `CTSIC` reader - Clear To Send Input Change Interrupt"]
+pub struct CTSIC_R(crate::FieldReader<bool, bool>);
+impl CTSIC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CTSIC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CTSIC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CTSIC` writer - Clear To Send Input Change Interrupt"]
+pub struct CTSIC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CTSIC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `RXBRK` reader - Break Received Interrupt"]
+pub struct RXBRK_R(crate::FieldReader<bool, bool>);
+impl RXBRK_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXBRK_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXBRK_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXBRK` writer - Break Received Interrupt"]
+pub struct RXBRK_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXBRK_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u8 & 0x01) << 5);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Data Register Empty Interrupt"]
+    #[inline(always)]
+    pub fn dre(&self) -> DRE_R {
+        DRE_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt"]
+    #[inline(always)]
+    pub fn txc(&self) -> TXC_R {
+        TXC_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt"]
+    #[inline(always)]
+    pub fn rxc(&self) -> RXC_R {
+        RXC_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Receive Start Interrupt"]
+    #[inline(always)]
+    pub fn rxs(&self) -> RXS_R {
+        RXS_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - Clear To Send Input Change Interrupt"]
+    #[inline(always)]
+    pub fn ctsic(&self) -> CTSIC_R {
+        CTSIC_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 5 - Break Received Interrupt"]
+    #[inline(always)]
+    pub fn rxbrk(&self) -> RXBRK_R {
+        RXBRK_R::new(((self.bits >> 5) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Data Register Empty Interrupt"]
+    #[inline(always)]
+    pub fn dre(&mut self) -> DRE_W {
+        DRE_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt"]
+    #[inline(always)]
+    pub fn txc(&mut self) -> TXC_W {
+        TXC_W { w: self }
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt"]
+    #[inline(always)]
+    pub fn rxc(&mut self) -> RXC_W {
+        RXC_W { w: self }
+    }
+    #[doc = "Bit 3 - Receive Start Interrupt"]
+    #[inline(always)]
+    pub fn rxs(&mut self) -> RXS_W {
+        RXS_W { w: self }
+    }
+    #[doc = "Bit 4 - Clear To Send Input Change Interrupt"]
+    #[inline(always)]
+    pub fn ctsic(&mut self) -> CTSIC_W {
+        CTSIC_W { w: self }
+    }
+    #[doc = "Bit 5 - Break Received Interrupt"]
+    #[inline(always)]
+    pub fn rxbrk(&mut self) -> RXBRK_W {
+        RXBRK_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"]
+pub struct INTFLAG_SPEC;
+impl crate::RegisterSpec for INTFLAG_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intflag::R](R) reader structure"]
+impl crate::Readable for INTFLAG_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"]
+impl crate::Writable for INTFLAG_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTFLAG to value 0"]
+impl crate::Resettable for INTFLAG_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/rxpl.rs b/src/sercom0/usart_ext/rxpl.rs
new file mode 100644
index 0000000..13a2c17
--- /dev/null
+++ b/src/sercom0/usart_ext/rxpl.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `RXPL` reader"]
+pub struct R(crate::R<RXPL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RXPL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RXPL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RXPL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RXPL` writer"]
+pub struct W(crate::W<RXPL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RXPL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RXPL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RXPL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `RXPL` reader - Receive Pulse Length"]
+pub struct RXPL_R(crate::FieldReader<u8, u8>);
+impl RXPL_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        RXPL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXPL_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXPL` writer - Receive Pulse Length"]
+pub struct RXPL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXPL_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xff) | (value as u8 & 0xff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Receive Pulse Length"]
+    #[inline(always)]
+    pub fn rxpl(&self) -> RXPL_R {
+        RXPL_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Receive Pulse Length"]
+    #[inline(always)]
+    pub fn rxpl(&mut self) -> RXPL_W {
+        RXPL_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Receive Pulse Length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxpl](index.html) module"]
+pub struct RXPL_SPEC;
+impl crate::RegisterSpec for RXPL_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [rxpl::R](R) reader structure"]
+impl crate::Readable for RXPL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rxpl::W](W) writer structure"]
+impl crate::Writable for RXPL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RXPL to value 0"]
+impl crate::Resettable for RXPL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/status.rs b/src/sercom0/usart_ext/status.rs
new file mode 100644
index 0000000..6ea75a6
--- /dev/null
+++ b/src/sercom0/usart_ext/status.rs
@@ -0,0 +1,388 @@
+#[doc = "Register `STATUS` reader"]
+pub struct R(crate::R<STATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<STATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `STATUS` writer"]
+pub struct W(crate::W<STATUS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<STATUS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<STATUS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PERR` reader - Parity Error"]
+pub struct PERR_R(crate::FieldReader<bool, bool>);
+impl PERR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        PERR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for PERR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PERR` writer - Parity Error"]
+pub struct PERR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PERR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `FERR` reader - Frame Error"]
+pub struct FERR_R(crate::FieldReader<bool, bool>);
+impl FERR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        FERR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for FERR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `FERR` writer - Frame Error"]
+pub struct FERR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> FERR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `BUFOVF` reader - Buffer Overflow"]
+pub struct BUFOVF_R(crate::FieldReader<bool, bool>);
+impl BUFOVF_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        BUFOVF_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BUFOVF_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BUFOVF` writer - Buffer Overflow"]
+pub struct BUFOVF_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BUFOVF_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `CTS` reader - Clear To Send"]
+pub struct CTS_R(crate::FieldReader<bool, bool>);
+impl CTS_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CTS_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CTS_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CTS` writer - Clear To Send"]
+pub struct CTS_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CTS_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `ISF` reader - Inconsistent Sync Field"]
+pub struct ISF_R(crate::FieldReader<bool, bool>);
+impl ISF_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ISF_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ISF_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ISF` writer - Inconsistent Sync Field"]
+pub struct ISF_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ISF_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `COLL` reader - Collision Detected"]
+pub struct COLL_R(crate::FieldReader<bool, bool>);
+impl COLL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        COLL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for COLL_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `COLL` writer - Collision Detected"]
+pub struct COLL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> COLL_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5);
+        self.w
+    }
+}
+#[doc = "Field `TXE` reader - Transmitter Empty"]
+pub struct TXE_R(crate::FieldReader<bool, bool>);
+impl TXE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXE` writer - Transmitter Empty"]
+pub struct TXE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Parity Error"]
+    #[inline(always)]
+    pub fn perr(&self) -> PERR_R {
+        PERR_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Frame Error"]
+    #[inline(always)]
+    pub fn ferr(&self) -> FERR_R {
+        FERR_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Buffer Overflow"]
+    #[inline(always)]
+    pub fn bufovf(&self) -> BUFOVF_R {
+        BUFOVF_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Clear To Send"]
+    #[inline(always)]
+    pub fn cts(&self) -> CTS_R {
+        CTS_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - Inconsistent Sync Field"]
+    #[inline(always)]
+    pub fn isf(&self) -> ISF_R {
+        ISF_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 5 - Collision Detected"]
+    #[inline(always)]
+    pub fn coll(&self) -> COLL_R {
+        COLL_R::new(((self.bits >> 5) & 0x01) != 0)
+    }
+    #[doc = "Bit 6 - Transmitter Empty"]
+    #[inline(always)]
+    pub fn txe(&self) -> TXE_R {
+        TXE_R::new(((self.bits >> 6) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Parity Error"]
+    #[inline(always)]
+    pub fn perr(&mut self) -> PERR_W {
+        PERR_W { w: self }
+    }
+    #[doc = "Bit 1 - Frame Error"]
+    #[inline(always)]
+    pub fn ferr(&mut self) -> FERR_W {
+        FERR_W { w: self }
+    }
+    #[doc = "Bit 2 - Buffer Overflow"]
+    #[inline(always)]
+    pub fn bufovf(&mut self) -> BUFOVF_W {
+        BUFOVF_W { w: self }
+    }
+    #[doc = "Bit 3 - Clear To Send"]
+    #[inline(always)]
+    pub fn cts(&mut self) -> CTS_W {
+        CTS_W { w: self }
+    }
+    #[doc = "Bit 4 - Inconsistent Sync Field"]
+    #[inline(always)]
+    pub fn isf(&mut self) -> ISF_W {
+        ISF_W { w: self }
+    }
+    #[doc = "Bit 5 - Collision Detected"]
+    #[inline(always)]
+    pub fn coll(&mut self) -> COLL_W {
+        COLL_W { w: self }
+    }
+    #[doc = "Bit 6 - Transmitter Empty"]
+    #[inline(always)]
+    pub fn txe(&mut self) -> TXE_W {
+        TXE_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_EXT Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
+pub struct STATUS_SPEC;
+impl crate::RegisterSpec for STATUS_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [status::R](R) reader structure"]
+impl crate::Readable for STATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"]
+impl crate::Writable for STATUS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets STATUS to value 0"]
+impl crate::Resettable for STATUS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_ext/syncbusy.rs b/src/sercom0/usart_ext/syncbusy.rs
new file mode 100644
index 0000000..44dea6f
--- /dev/null
+++ b/src/sercom0/usart_ext/syncbusy.rs
@@ -0,0 +1,90 @@
+#[doc = "Register `SYNCBUSY` reader"]
+pub struct R(crate::R<SYNCBUSY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYNCBUSY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYNCBUSY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset Synchronization Busy"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` reader - SERCOM Enable Synchronization Busy"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CTRLB` reader - CTRLB Synchronization Busy"]
+pub struct CTRLB_R(crate::FieldReader<bool, bool>);
+impl CTRLB_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CTRLB_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CTRLB_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset Synchronization Busy"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - SERCOM Enable Synchronization Busy"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - CTRLB Synchronization Busy"]
+    #[inline(always)]
+    pub fn ctrlb(&self) -> CTRLB_R {
+        CTRLB_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+}
+#[doc = "USART_EXT Synchronization Busy\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"]
+pub struct SYNCBUSY_SPEC;
+impl crate::RegisterSpec for SYNCBUSY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [syncbusy::R](R) reader structure"]
+impl crate::Readable for SYNCBUSY_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets SYNCBUSY to value 0"]
+impl crate::Resettable for SYNCBUSY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int.rs b/src/sercom0/usart_int.rs
new file mode 100644
index 0000000..157c8c4
--- /dev/null
+++ b/src/sercom0/usart_int.rs
@@ -0,0 +1,60 @@
+#[doc = "CTRLA register accessor: an alias for `Reg<CTRLA_SPEC>`"]
+pub type CTRLA = crate::Reg<ctrla::CTRLA_SPEC>;
+#[doc = "USART_INT Control A"]
+pub mod ctrla;
+#[doc = "CTRLB register accessor: an alias for `Reg<CTRLB_SPEC>`"]
+pub type CTRLB = crate::Reg<ctrlb::CTRLB_SPEC>;
+#[doc = "USART_INT Control B"]
+pub mod ctrlb;
+#[doc = "CTRLC register accessor: an alias for `Reg<CTRLC_SPEC>`"]
+pub type CTRLC = crate::Reg<ctrlc::CTRLC_SPEC>;
+#[doc = "USART_INT Control C"]
+pub mod ctrlc;
+#[doc = "BAUD register accessor: an alias for `Reg<BAUD_SPEC>`"]
+pub type BAUD = crate::Reg<baud::BAUD_SPEC>;
+#[doc = "USART_INT Baud Rate"]
+pub mod baud;
+#[doc = "BAUD_FRAC_MODE register accessor: an alias for `Reg<BAUD_FRAC_MODE_SPEC>`"]
+pub type BAUD_FRAC_MODE = crate::Reg<baud_frac_mode::BAUD_FRAC_MODE_SPEC>;
+#[doc = "USART_INT Baud Rate"]
+pub mod baud_frac_mode;
+#[doc = "BAUD_FRACFP_MODE register accessor: an alias for `Reg<BAUD_FRACFP_MODE_SPEC>`"]
+pub type BAUD_FRACFP_MODE = crate::Reg<baud_fracfp_mode::BAUD_FRACFP_MODE_SPEC>;
+#[doc = "USART_INT Baud Rate"]
+pub mod baud_fracfp_mode;
+#[doc = "BAUD_USARTFP_MODE register accessor: an alias for `Reg<BAUD_USARTFP_MODE_SPEC>`"]
+pub type BAUD_USARTFP_MODE = crate::Reg<baud_usartfp_mode::BAUD_USARTFP_MODE_SPEC>;
+#[doc = "USART_INT Baud Rate"]
+pub mod baud_usartfp_mode;
+#[doc = "RXPL register accessor: an alias for `Reg<RXPL_SPEC>`"]
+pub type RXPL = crate::Reg<rxpl::RXPL_SPEC>;
+#[doc = "USART_INT Receive Pulse Length"]
+pub mod rxpl;
+#[doc = "INTENCLR register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "USART_INT Interrupt Enable Clear"]
+pub mod intenclr;
+#[doc = "INTENSET register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "USART_INT Interrupt Enable Set"]
+pub mod intenset;
+#[doc = "INTFLAG register accessor: an alias for `Reg<INTFLAG_SPEC>`"]
+pub type INTFLAG = crate::Reg<intflag::INTFLAG_SPEC>;
+#[doc = "USART_INT Interrupt Flag Status and Clear"]
+pub mod intflag;
+#[doc = "STATUS register accessor: an alias for `Reg<STATUS_SPEC>`"]
+pub type STATUS = crate::Reg<status::STATUS_SPEC>;
+#[doc = "USART_INT Status"]
+pub mod status;
+#[doc = "SYNCBUSY register accessor: an alias for `Reg<SYNCBUSY_SPEC>`"]
+pub type SYNCBUSY = crate::Reg<syncbusy::SYNCBUSY_SPEC>;
+#[doc = "USART_INT Synchronization Busy"]
+pub mod syncbusy;
+#[doc = "DATA register accessor: an alias for `Reg<DATA_SPEC>`"]
+pub type DATA = crate::Reg<data::DATA_SPEC>;
+#[doc = "USART_INT Data"]
+pub mod data;
+#[doc = "DBGCTRL register accessor: an alias for `Reg<DBGCTRL_SPEC>`"]
+pub type DBGCTRL = crate::Reg<dbgctrl::DBGCTRL_SPEC>;
+#[doc = "USART_INT Debug Control"]
+pub mod dbgctrl;
diff --git a/src/sercom0/usart_int/baud.rs b/src/sercom0/usart_int/baud.rs
new file mode 100644
index 0000000..37ad4e9
--- /dev/null
+++ b/src/sercom0/usart_int/baud.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `BAUD` reader"]
+pub struct R(crate::R<BAUD_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<BAUD_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<BAUD_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<BAUD_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `BAUD` writer"]
+pub struct W(crate::W<BAUD_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<BAUD_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<BAUD_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<BAUD_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BAUD` reader - Baud Rate Value"]
+pub struct BAUD_R(crate::FieldReader<u16, u16>);
+impl BAUD_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        BAUD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BAUD_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BAUD` writer - Baud Rate Value"]
+pub struct BAUD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BAUD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xffff) | (value as u16 & 0xffff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:15 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&self) -> BAUD_R {
+        BAUD_R::new((self.bits & 0xffff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:15 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&mut self) -> BAUD_W {
+        BAUD_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud](index.html) module"]
+pub struct BAUD_SPEC;
+impl crate::RegisterSpec for BAUD_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [baud::R](R) reader structure"]
+impl crate::Readable for BAUD_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [baud::W](W) writer structure"]
+impl crate::Writable for BAUD_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets BAUD to value 0"]
+impl crate::Resettable for BAUD_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/baud_frac_mode.rs b/src/sercom0/usart_int/baud_frac_mode.rs
new file mode 100644
index 0000000..12f1a11
--- /dev/null
+++ b/src/sercom0/usart_int/baud_frac_mode.rs
@@ -0,0 +1,138 @@
+#[doc = "Register `BAUD_FRAC_MODE` reader"]
+pub struct R(crate::R<BAUD_FRAC_MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<BAUD_FRAC_MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<BAUD_FRAC_MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<BAUD_FRAC_MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `BAUD_FRAC_MODE` writer"]
+pub struct W(crate::W<BAUD_FRAC_MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<BAUD_FRAC_MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<BAUD_FRAC_MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<BAUD_FRAC_MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BAUD` reader - Baud Rate Value"]
+pub struct BAUD_R(crate::FieldReader<u16, u16>);
+impl BAUD_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        BAUD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BAUD_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BAUD` writer - Baud Rate Value"]
+pub struct BAUD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BAUD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x1fff) | (value as u16 & 0x1fff);
+        self.w
+    }
+}
+#[doc = "Field `FP` reader - Fractional Part"]
+pub struct FP_R(crate::FieldReader<u8, u8>);
+impl FP_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        FP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for FP_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `FP` writer - Fractional Part"]
+pub struct FP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> FP_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u16 & 0x07) << 13);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:12 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&self) -> BAUD_R {
+        BAUD_R::new((self.bits & 0x1fff) as u16)
+    }
+    #[doc = "Bits 13:15 - Fractional Part"]
+    #[inline(always)]
+    pub fn fp(&self) -> FP_R {
+        FP_R::new(((self.bits >> 13) & 0x07) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:12 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&mut self) -> BAUD_W {
+        BAUD_W { w: self }
+    }
+    #[doc = "Bits 13:15 - Fractional Part"]
+    #[inline(always)]
+    pub fn fp(&mut self) -> FP_W {
+        FP_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud_frac_mode](index.html) module"]
+pub struct BAUD_FRAC_MODE_SPEC;
+impl crate::RegisterSpec for BAUD_FRAC_MODE_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [baud_frac_mode::R](R) reader structure"]
+impl crate::Readable for BAUD_FRAC_MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [baud_frac_mode::W](W) writer structure"]
+impl crate::Writable for BAUD_FRAC_MODE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets BAUD_FRAC_MODE to value 0"]
+impl crate::Resettable for BAUD_FRAC_MODE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/baud_fracfp_mode.rs b/src/sercom0/usart_int/baud_fracfp_mode.rs
new file mode 100644
index 0000000..dee146e
--- /dev/null
+++ b/src/sercom0/usart_int/baud_fracfp_mode.rs
@@ -0,0 +1,138 @@
+#[doc = "Register `BAUD_FRACFP_MODE` reader"]
+pub struct R(crate::R<BAUD_FRACFP_MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<BAUD_FRACFP_MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<BAUD_FRACFP_MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<BAUD_FRACFP_MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `BAUD_FRACFP_MODE` writer"]
+pub struct W(crate::W<BAUD_FRACFP_MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<BAUD_FRACFP_MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<BAUD_FRACFP_MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<BAUD_FRACFP_MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BAUD` reader - Baud Rate Value"]
+pub struct BAUD_R(crate::FieldReader<u16, u16>);
+impl BAUD_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        BAUD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BAUD_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BAUD` writer - Baud Rate Value"]
+pub struct BAUD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BAUD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x1fff) | (value as u16 & 0x1fff);
+        self.w
+    }
+}
+#[doc = "Field `FP` reader - Fractional Part"]
+pub struct FP_R(crate::FieldReader<u8, u8>);
+impl FP_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        FP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for FP_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `FP` writer - Fractional Part"]
+pub struct FP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> FP_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u16 & 0x07) << 13);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:12 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&self) -> BAUD_R {
+        BAUD_R::new((self.bits & 0x1fff) as u16)
+    }
+    #[doc = "Bits 13:15 - Fractional Part"]
+    #[inline(always)]
+    pub fn fp(&self) -> FP_R {
+        FP_R::new(((self.bits >> 13) & 0x07) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:12 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&mut self) -> BAUD_W {
+        BAUD_W { w: self }
+    }
+    #[doc = "Bits 13:15 - Fractional Part"]
+    #[inline(always)]
+    pub fn fp(&mut self) -> FP_W {
+        FP_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud_fracfp_mode](index.html) module"]
+pub struct BAUD_FRACFP_MODE_SPEC;
+impl crate::RegisterSpec for BAUD_FRACFP_MODE_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [baud_fracfp_mode::R](R) reader structure"]
+impl crate::Readable for BAUD_FRACFP_MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [baud_fracfp_mode::W](W) writer structure"]
+impl crate::Writable for BAUD_FRACFP_MODE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets BAUD_FRACFP_MODE to value 0"]
+impl crate::Resettable for BAUD_FRACFP_MODE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/baud_usartfp_mode.rs b/src/sercom0/usart_int/baud_usartfp_mode.rs
new file mode 100644
index 0000000..85430fc
--- /dev/null
+++ b/src/sercom0/usart_int/baud_usartfp_mode.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `BAUD_USARTFP_MODE` reader"]
+pub struct R(crate::R<BAUD_USARTFP_MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<BAUD_USARTFP_MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<BAUD_USARTFP_MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<BAUD_USARTFP_MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `BAUD_USARTFP_MODE` writer"]
+pub struct W(crate::W<BAUD_USARTFP_MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<BAUD_USARTFP_MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<BAUD_USARTFP_MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<BAUD_USARTFP_MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BAUD` reader - Baud Rate Value"]
+pub struct BAUD_R(crate::FieldReader<u16, u16>);
+impl BAUD_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        BAUD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BAUD_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BAUD` writer - Baud Rate Value"]
+pub struct BAUD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BAUD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xffff) | (value as u16 & 0xffff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:15 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&self) -> BAUD_R {
+        BAUD_R::new((self.bits & 0xffff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:15 - Baud Rate Value"]
+    #[inline(always)]
+    pub fn baud(&mut self) -> BAUD_W {
+        BAUD_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud_usartfp_mode](index.html) module"]
+pub struct BAUD_USARTFP_MODE_SPEC;
+impl crate::RegisterSpec for BAUD_USARTFP_MODE_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [baud_usartfp_mode::R](R) reader structure"]
+impl crate::Readable for BAUD_USARTFP_MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [baud_usartfp_mode::W](W) writer structure"]
+impl crate::Writable for BAUD_USARTFP_MODE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets BAUD_USARTFP_MODE to value 0"]
+impl crate::Resettable for BAUD_USARTFP_MODE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/ctrla.rs b/src/sercom0/usart_int/ctrla.rs
new file mode 100644
index 0000000..2482a7b
--- /dev/null
+++ b/src/sercom0/usart_int/ctrla.rs
@@ -0,0 +1,1158 @@
+#[doc = "Register `CTRLA` reader"]
+pub struct R(crate::R<CTRLA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLA` writer"]
+pub struct W(crate::W<CTRLA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SWRST` writer - Software Reset"]
+pub struct SWRST_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SWRST_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable"]
+pub struct ENABLE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Operating Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum MODE_A {
+    #[doc = "0: USART with external clock"]
+    USART_EXT_CLK = 0,
+    #[doc = "1: USART with internal clock"]
+    USART_INT_CLK = 1,
+    #[doc = "2: SPI in slave operation"]
+    SPI_SLAVE = 2,
+    #[doc = "3: SPI in master operation"]
+    SPI_MASTER = 3,
+    #[doc = "4: I2C slave operation"]
+    I2C_SLAVE = 4,
+    #[doc = "5: I2C master operation"]
+    I2C_MASTER = 5,
+}
+impl From<MODE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: MODE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `MODE` reader - Operating Mode"]
+pub struct MODE_R(crate::FieldReader<u8, MODE_A>);
+impl MODE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        MODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<MODE_A> {
+        match self.bits {
+            0 => Some(MODE_A::USART_EXT_CLK),
+            1 => Some(MODE_A::USART_INT_CLK),
+            2 => Some(MODE_A::SPI_SLAVE),
+            3 => Some(MODE_A::SPI_MASTER),
+            4 => Some(MODE_A::I2C_SLAVE),
+            5 => Some(MODE_A::I2C_MASTER),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `USART_EXT_CLK`"]
+    #[inline(always)]
+    pub fn is_usart_ext_clk(&self) -> bool {
+        **self == MODE_A::USART_EXT_CLK
+    }
+    #[doc = "Checks if the value of the field is `USART_INT_CLK`"]
+    #[inline(always)]
+    pub fn is_usart_int_clk(&self) -> bool {
+        **self == MODE_A::USART_INT_CLK
+    }
+    #[doc = "Checks if the value of the field is `SPI_SLAVE`"]
+    #[inline(always)]
+    pub fn is_spi_slave(&self) -> bool {
+        **self == MODE_A::SPI_SLAVE
+    }
+    #[doc = "Checks if the value of the field is `SPI_MASTER`"]
+    #[inline(always)]
+    pub fn is_spi_master(&self) -> bool {
+        **self == MODE_A::SPI_MASTER
+    }
+    #[doc = "Checks if the value of the field is `I2C_SLAVE`"]
+    #[inline(always)]
+    pub fn is_i2c_slave(&self) -> bool {
+        **self == MODE_A::I2C_SLAVE
+    }
+    #[doc = "Checks if the value of the field is `I2C_MASTER`"]
+    #[inline(always)]
+    pub fn is_i2c_master(&self) -> bool {
+        **self == MODE_A::I2C_MASTER
+    }
+}
+impl core::ops::Deref for MODE_R {
+    type Target = crate::FieldReader<u8, MODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `MODE` writer - Operating Mode"]
+pub struct MODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> MODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: MODE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "USART with external clock"]
+    #[inline(always)]
+    pub fn usart_ext_clk(self) -> &'a mut W {
+        self.variant(MODE_A::USART_EXT_CLK)
+    }
+    #[doc = "USART with internal clock"]
+    #[inline(always)]
+    pub fn usart_int_clk(self) -> &'a mut W {
+        self.variant(MODE_A::USART_INT_CLK)
+    }
+    #[doc = "SPI in slave operation"]
+    #[inline(always)]
+    pub fn spi_slave(self) -> &'a mut W {
+        self.variant(MODE_A::SPI_SLAVE)
+    }
+    #[doc = "SPI in master operation"]
+    #[inline(always)]
+    pub fn spi_master(self) -> &'a mut W {
+        self.variant(MODE_A::SPI_MASTER)
+    }
+    #[doc = "I2C slave operation"]
+    #[inline(always)]
+    pub fn i2c_slave(self) -> &'a mut W {
+        self.variant(MODE_A::I2C_SLAVE)
+    }
+    #[doc = "I2C master operation"]
+    #[inline(always)]
+    pub fn i2c_master(self) -> &'a mut W {
+        self.variant(MODE_A::I2C_MASTER)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 2)) | ((value as u32 & 0x07) << 2);
+        self.w
+    }
+}
+#[doc = "Field `RUNSTDBY` reader - Run during Standby"]
+pub struct RUNSTDBY_R(crate::FieldReader<bool, bool>);
+impl RUNSTDBY_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RUNSTDBY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RUNSTDBY_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RUNSTDBY` writer - Run during Standby"]
+pub struct RUNSTDBY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RUNSTDBY_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
+        self.w
+    }
+}
+#[doc = "Field `IBON` reader - Immediate Buffer Overflow Notification"]
+pub struct IBON_R(crate::FieldReader<bool, bool>);
+impl IBON_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        IBON_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for IBON_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `IBON` writer - Immediate Buffer Overflow Notification"]
+pub struct IBON_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> IBON_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
+        self.w
+    }
+}
+#[doc = "Sample\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SAMPR_A {
+    #[doc = "0: 16x over-sampling using arithmetic baudrate generation"]
+    _16X_ARITHMETIC = 0,
+    #[doc = "1: 16x over-sampling using fractional baudrate generation"]
+    _16X_FRACTIONAL = 1,
+    #[doc = "2: 8x over-sampling using arithmetic baudrate generation"]
+    _8X_ARITHMETIC = 2,
+    #[doc = "3: 8x over-sampling using fractional baudrate generation"]
+    _8X_FRACTIONAL = 3,
+    #[doc = "4: 3x over-sampling using arithmetic baudrate generation"]
+    _3X_ARITHMETIC = 4,
+}
+impl From<SAMPR_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SAMPR_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `SAMPR` reader - Sample"]
+pub struct SAMPR_R(crate::FieldReader<u8, SAMPR_A>);
+impl SAMPR_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        SAMPR_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SAMPR_A> {
+        match self.bits {
+            0 => Some(SAMPR_A::_16X_ARITHMETIC),
+            1 => Some(SAMPR_A::_16X_FRACTIONAL),
+            2 => Some(SAMPR_A::_8X_ARITHMETIC),
+            3 => Some(SAMPR_A::_8X_FRACTIONAL),
+            4 => Some(SAMPR_A::_3X_ARITHMETIC),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `_16X_ARITHMETIC`"]
+    #[inline(always)]
+    pub fn is_16x_arithmetic(&self) -> bool {
+        **self == SAMPR_A::_16X_ARITHMETIC
+    }
+    #[doc = "Checks if the value of the field is `_16X_FRACTIONAL`"]
+    #[inline(always)]
+    pub fn is_16x_fractional(&self) -> bool {
+        **self == SAMPR_A::_16X_FRACTIONAL
+    }
+    #[doc = "Checks if the value of the field is `_8X_ARITHMETIC`"]
+    #[inline(always)]
+    pub fn is_8x_arithmetic(&self) -> bool {
+        **self == SAMPR_A::_8X_ARITHMETIC
+    }
+    #[doc = "Checks if the value of the field is `_8X_FRACTIONAL`"]
+    #[inline(always)]
+    pub fn is_8x_fractional(&self) -> bool {
+        **self == SAMPR_A::_8X_FRACTIONAL
+    }
+    #[doc = "Checks if the value of the field is `_3X_ARITHMETIC`"]
+    #[inline(always)]
+    pub fn is_3x_arithmetic(&self) -> bool {
+        **self == SAMPR_A::_3X_ARITHMETIC
+    }
+}
+impl core::ops::Deref for SAMPR_R {
+    type Target = crate::FieldReader<u8, SAMPR_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SAMPR` writer - Sample"]
+pub struct SAMPR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SAMPR_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: SAMPR_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "16x over-sampling using arithmetic baudrate generation"]
+    #[inline(always)]
+    pub fn _16x_arithmetic(self) -> &'a mut W {
+        self.variant(SAMPR_A::_16X_ARITHMETIC)
+    }
+    #[doc = "16x over-sampling using fractional baudrate generation"]
+    #[inline(always)]
+    pub fn _16x_fractional(self) -> &'a mut W {
+        self.variant(SAMPR_A::_16X_FRACTIONAL)
+    }
+    #[doc = "8x over-sampling using arithmetic baudrate generation"]
+    #[inline(always)]
+    pub fn _8x_arithmetic(self) -> &'a mut W {
+        self.variant(SAMPR_A::_8X_ARITHMETIC)
+    }
+    #[doc = "8x over-sampling using fractional baudrate generation"]
+    #[inline(always)]
+    pub fn _8x_fractional(self) -> &'a mut W {
+        self.variant(SAMPR_A::_8X_FRACTIONAL)
+    }
+    #[doc = "3x over-sampling using arithmetic baudrate generation"]
+    #[inline(always)]
+    pub fn _3x_arithmetic(self) -> &'a mut W {
+        self.variant(SAMPR_A::_3X_ARITHMETIC)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13);
+        self.w
+    }
+}
+#[doc = "Transmit Data Pinout\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum TXPO_A {
+    #[doc = "0: SERCOM PAD\\[0\\]
+is used for data transmission"]
+    PAD0 = 0,
+    #[doc = "1: SERCOM PAD\\[2\\]
+is used for data transmission"]
+    PAD2 = 1,
+}
+impl From<TXPO_A> for u8 {
+    #[inline(always)]
+    fn from(variant: TXPO_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `TXPO` reader - Transmit Data Pinout"]
+pub struct TXPO_R(crate::FieldReader<u8, TXPO_A>);
+impl TXPO_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        TXPO_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<TXPO_A> {
+        match self.bits {
+            0 => Some(TXPO_A::PAD0),
+            1 => Some(TXPO_A::PAD2),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `PAD0`"]
+    #[inline(always)]
+    pub fn is_pad0(&self) -> bool {
+        **self == TXPO_A::PAD0
+    }
+    #[doc = "Checks if the value of the field is `PAD2`"]
+    #[inline(always)]
+    pub fn is_pad2(&self) -> bool {
+        **self == TXPO_A::PAD2
+    }
+}
+impl core::ops::Deref for TXPO_R {
+    type Target = crate::FieldReader<u8, TXPO_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXPO` writer - Transmit Data Pinout"]
+pub struct TXPO_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXPO_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: TXPO_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "SERCOM PAD\\[0\\]
+is used for data transmission"]
+    #[inline(always)]
+    pub fn pad0(self) -> &'a mut W {
+        self.variant(TXPO_A::PAD0)
+    }
+    #[doc = "SERCOM PAD\\[2\\]
+is used for data transmission"]
+    #[inline(always)]
+    pub fn pad2(self) -> &'a mut W {
+        self.variant(TXPO_A::PAD2)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16);
+        self.w
+    }
+}
+#[doc = "Receive Data Pinout\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum RXPO_A {
+    #[doc = "0: SERCOM PAD\\[0\\]
+is used for data reception"]
+    PAD0 = 0,
+    #[doc = "1: SERCOM PAD\\[1\\]
+is used for data reception"]
+    PAD1 = 1,
+    #[doc = "2: SERCOM PAD\\[2\\]
+is used for data reception"]
+    PAD2 = 2,
+    #[doc = "3: SERCOM PAD\\[3\\]
+is used for data reception"]
+    PAD3 = 3,
+}
+impl From<RXPO_A> for u8 {
+    #[inline(always)]
+    fn from(variant: RXPO_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `RXPO` reader - Receive Data Pinout"]
+pub struct RXPO_R(crate::FieldReader<u8, RXPO_A>);
+impl RXPO_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        RXPO_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> RXPO_A {
+        match self.bits {
+            0 => RXPO_A::PAD0,
+            1 => RXPO_A::PAD1,
+            2 => RXPO_A::PAD2,
+            3 => RXPO_A::PAD3,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `PAD0`"]
+    #[inline(always)]
+    pub fn is_pad0(&self) -> bool {
+        **self == RXPO_A::PAD0
+    }
+    #[doc = "Checks if the value of the field is `PAD1`"]
+    #[inline(always)]
+    pub fn is_pad1(&self) -> bool {
+        **self == RXPO_A::PAD1
+    }
+    #[doc = "Checks if the value of the field is `PAD2`"]
+    #[inline(always)]
+    pub fn is_pad2(&self) -> bool {
+        **self == RXPO_A::PAD2
+    }
+    #[doc = "Checks if the value of the field is `PAD3`"]
+    #[inline(always)]
+    pub fn is_pad3(&self) -> bool {
+        **self == RXPO_A::PAD3
+    }
+}
+impl core::ops::Deref for RXPO_R {
+    type Target = crate::FieldReader<u8, RXPO_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXPO` writer - Receive Data Pinout"]
+pub struct RXPO_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXPO_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: RXPO_A) -> &'a mut W {
+        self.bits(variant.into())
+    }
+    #[doc = "SERCOM PAD\\[0\\]
+is used for data reception"]
+    #[inline(always)]
+    pub fn pad0(self) -> &'a mut W {
+        self.variant(RXPO_A::PAD0)
+    }
+    #[doc = "SERCOM PAD\\[1\\]
+is used for data reception"]
+    #[inline(always)]
+    pub fn pad1(self) -> &'a mut W {
+        self.variant(RXPO_A::PAD1)
+    }
+    #[doc = "SERCOM PAD\\[2\\]
+is used for data reception"]
+    #[inline(always)]
+    pub fn pad2(self) -> &'a mut W {
+        self.variant(RXPO_A::PAD2)
+    }
+    #[doc = "SERCOM PAD\\[3\\]
+is used for data reception"]
+    #[inline(always)]
+    pub fn pad3(self) -> &'a mut W {
+        self.variant(RXPO_A::PAD3)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20);
+        self.w
+    }
+}
+#[doc = "Field `SAMPA` reader - Sample Adjustment"]
+pub struct SAMPA_R(crate::FieldReader<u8, u8>);
+impl SAMPA_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        SAMPA_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SAMPA_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SAMPA` writer - Sample Adjustment"]
+pub struct SAMPA_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SAMPA_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22);
+        self.w
+    }
+}
+#[doc = "Frame Format\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum FORM_A {
+    #[doc = "0: USART frame"]
+    USART_FRAME_NO_PARITY = 0,
+    #[doc = "1: USART frame with parity"]
+    USART_FRAME_WITH_PARITY = 1,
+    #[doc = "2: LIN Master - Break and sync generation"]
+    USART_FRAME_LIN_MASTER_MODE = 2,
+    #[doc = "4: Auto-baud - break detection and auto-baud"]
+    USART_FRAME_AUTO_BAUD_NO_PARITY = 4,
+    #[doc = "5: Auto-baud - break detection and auto-baud with parity"]
+    USART_FRAME_AUTO_BAUD_WITH_PARITY = 5,
+}
+impl From<FORM_A> for u8 {
+    #[inline(always)]
+    fn from(variant: FORM_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `FORM` reader - Frame Format"]
+pub struct FORM_R(crate::FieldReader<u8, FORM_A>);
+impl FORM_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        FORM_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<FORM_A> {
+        match self.bits {
+            0 => Some(FORM_A::USART_FRAME_NO_PARITY),
+            1 => Some(FORM_A::USART_FRAME_WITH_PARITY),
+            2 => Some(FORM_A::USART_FRAME_LIN_MASTER_MODE),
+            4 => Some(FORM_A::USART_FRAME_AUTO_BAUD_NO_PARITY),
+            5 => Some(FORM_A::USART_FRAME_AUTO_BAUD_WITH_PARITY),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `USART_FRAME_NO_PARITY`"]
+    #[inline(always)]
+    pub fn is_usart_frame_no_parity(&self) -> bool {
+        **self == FORM_A::USART_FRAME_NO_PARITY
+    }
+    #[doc = "Checks if the value of the field is `USART_FRAME_WITH_PARITY`"]
+    #[inline(always)]
+    pub fn is_usart_frame_with_parity(&self) -> bool {
+        **self == FORM_A::USART_FRAME_WITH_PARITY
+    }
+    #[doc = "Checks if the value of the field is `USART_FRAME_LIN_MASTER_MODE`"]
+    #[inline(always)]
+    pub fn is_usart_frame_lin_master_mode(&self) -> bool {
+        **self == FORM_A::USART_FRAME_LIN_MASTER_MODE
+    }
+    #[doc = "Checks if the value of the field is `USART_FRAME_AUTO_BAUD_NO_PARITY`"]
+    #[inline(always)]
+    pub fn is_usart_frame_auto_baud_no_parity(&self) -> bool {
+        **self == FORM_A::USART_FRAME_AUTO_BAUD_NO_PARITY
+    }
+    #[doc = "Checks if the value of the field is `USART_FRAME_AUTO_BAUD_WITH_PARITY`"]
+    #[inline(always)]
+    pub fn is_usart_frame_auto_baud_with_parity(&self) -> bool {
+        **self == FORM_A::USART_FRAME_AUTO_BAUD_WITH_PARITY
+    }
+}
+impl core::ops::Deref for FORM_R {
+    type Target = crate::FieldReader<u8, FORM_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `FORM` writer - Frame Format"]
+pub struct FORM_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> FORM_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: FORM_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "USART frame"]
+    #[inline(always)]
+    pub fn usart_frame_no_parity(self) -> &'a mut W {
+        self.variant(FORM_A::USART_FRAME_NO_PARITY)
+    }
+    #[doc = "USART frame with parity"]
+    #[inline(always)]
+    pub fn usart_frame_with_parity(self) -> &'a mut W {
+        self.variant(FORM_A::USART_FRAME_WITH_PARITY)
+    }
+    #[doc = "LIN Master - Break and sync generation"]
+    #[inline(always)]
+    pub fn usart_frame_lin_master_mode(self) -> &'a mut W {
+        self.variant(FORM_A::USART_FRAME_LIN_MASTER_MODE)
+    }
+    #[doc = "Auto-baud - break detection and auto-baud"]
+    #[inline(always)]
+    pub fn usart_frame_auto_baud_no_parity(self) -> &'a mut W {
+        self.variant(FORM_A::USART_FRAME_AUTO_BAUD_NO_PARITY)
+    }
+    #[doc = "Auto-baud - break detection and auto-baud with parity"]
+    #[inline(always)]
+    pub fn usart_frame_auto_baud_with_parity(self) -> &'a mut W {
+        self.variant(FORM_A::USART_FRAME_AUTO_BAUD_WITH_PARITY)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24);
+        self.w
+    }
+}
+#[doc = "Communication Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CMODE_A {
+    #[doc = "0: Asynchronous Communication"]
+    ASYNC = 0,
+    #[doc = "1: Synchronous Communication"]
+    SYNC = 1,
+}
+impl From<CMODE_A> for bool {
+    #[inline(always)]
+    fn from(variant: CMODE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CMODE` reader - Communication Mode"]
+pub struct CMODE_R(crate::FieldReader<bool, CMODE_A>);
+impl CMODE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CMODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CMODE_A {
+        match self.bits {
+            false => CMODE_A::ASYNC,
+            true => CMODE_A::SYNC,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ASYNC`"]
+    #[inline(always)]
+    pub fn is_async(&self) -> bool {
+        **self == CMODE_A::ASYNC
+    }
+    #[doc = "Checks if the value of the field is `SYNC`"]
+    #[inline(always)]
+    pub fn is_sync(&self) -> bool {
+        **self == CMODE_A::SYNC
+    }
+}
+impl core::ops::Deref for CMODE_R {
+    type Target = crate::FieldReader<bool, CMODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CMODE` writer - Communication Mode"]
+pub struct CMODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CMODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: CMODE_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "Asynchronous Communication"]
+    #[inline(always)]
+    pub fn async_(self) -> &'a mut W {
+        self.variant(CMODE_A::ASYNC)
+    }
+    #[doc = "Synchronous Communication"]
+    #[inline(always)]
+    pub fn sync(self) -> &'a mut W {
+        self.variant(CMODE_A::SYNC)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
+        self.w
+    }
+}
+#[doc = "Clock Polarity\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CPOL_A {
+    #[doc = "0: TxD Change:- Rising XCK edge, RxD Sample:- Falling XCK edge"]
+    IDLE_LOW = 0,
+    #[doc = "1: TxD Change:- Falling XCK edge, RxD Sample:- Rising XCK edge"]
+    IDLE_HIGH = 1,
+}
+impl From<CPOL_A> for bool {
+    #[inline(always)]
+    fn from(variant: CPOL_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CPOL` reader - Clock Polarity"]
+pub struct CPOL_R(crate::FieldReader<bool, CPOL_A>);
+impl CPOL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CPOL_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CPOL_A {
+        match self.bits {
+            false => CPOL_A::IDLE_LOW,
+            true => CPOL_A::IDLE_HIGH,
+        }
+    }
+    #[doc = "Checks if the value of the field is `IDLE_LOW`"]
+    #[inline(always)]
+    pub fn is_idle_low(&self) -> bool {
+        **self == CPOL_A::IDLE_LOW
+    }
+    #[doc = "Checks if the value of the field is `IDLE_HIGH`"]
+    #[inline(always)]
+    pub fn is_idle_high(&self) -> bool {
+        **self == CPOL_A::IDLE_HIGH
+    }
+}
+impl core::ops::Deref for CPOL_R {
+    type Target = crate::FieldReader<bool, CPOL_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CPOL` writer - Clock Polarity"]
+pub struct CPOL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CPOL_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: CPOL_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "TxD Change:- Rising XCK edge, RxD Sample:- Falling XCK edge"]
+    #[inline(always)]
+    pub fn idle_low(self) -> &'a mut W {
+        self.variant(CPOL_A::IDLE_LOW)
+    }
+    #[doc = "TxD Change:- Falling XCK edge, RxD Sample:- Rising XCK edge"]
+    #[inline(always)]
+    pub fn idle_high(self) -> &'a mut W {
+        self.variant(CPOL_A::IDLE_HIGH)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
+        self.w
+    }
+}
+#[doc = "Data Order\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DORD_A {
+    #[doc = "0: MSB is transmitted first"]
+    MSB = 0,
+    #[doc = "1: LSB is transmitted first"]
+    LSB = 1,
+}
+impl From<DORD_A> for bool {
+    #[inline(always)]
+    fn from(variant: DORD_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DORD` reader - Data Order"]
+pub struct DORD_R(crate::FieldReader<bool, DORD_A>);
+impl DORD_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DORD_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DORD_A {
+        match self.bits {
+            false => DORD_A::MSB,
+            true => DORD_A::LSB,
+        }
+    }
+    #[doc = "Checks if the value of the field is `MSB`"]
+    #[inline(always)]
+    pub fn is_msb(&self) -> bool {
+        **self == DORD_A::MSB
+    }
+    #[doc = "Checks if the value of the field is `LSB`"]
+    #[inline(always)]
+    pub fn is_lsb(&self) -> bool {
+        **self == DORD_A::LSB
+    }
+}
+impl core::ops::Deref for DORD_R {
+    type Target = crate::FieldReader<bool, DORD_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DORD` writer - Data Order"]
+pub struct DORD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DORD_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: DORD_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "MSB is transmitted first"]
+    #[inline(always)]
+    pub fn msb(self) -> &'a mut W {
+        self.variant(DORD_A::MSB)
+    }
+    #[doc = "LSB is transmitted first"]
+    #[inline(always)]
+    pub fn lsb(self) -> &'a mut W {
+        self.variant(DORD_A::LSB)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bits 2:4 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&self) -> MODE_R {
+        MODE_R::new(((self.bits >> 2) & 0x07) as u8)
+    }
+    #[doc = "Bit 7 - Run during Standby"]
+    #[inline(always)]
+    pub fn runstdby(&self) -> RUNSTDBY_R {
+        RUNSTDBY_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+    #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
+    #[inline(always)]
+    pub fn ibon(&self) -> IBON_R {
+        IBON_R::new(((self.bits >> 8) & 0x01) != 0)
+    }
+    #[doc = "Bits 13:15 - Sample"]
+    #[inline(always)]
+    pub fn sampr(&self) -> SAMPR_R {
+        SAMPR_R::new(((self.bits >> 13) & 0x07) as u8)
+    }
+    #[doc = "Bits 16:17 - Transmit Data Pinout"]
+    #[inline(always)]
+    pub fn txpo(&self) -> TXPO_R {
+        TXPO_R::new(((self.bits >> 16) & 0x03) as u8)
+    }
+    #[doc = "Bits 20:21 - Receive Data Pinout"]
+    #[inline(always)]
+    pub fn rxpo(&self) -> RXPO_R {
+        RXPO_R::new(((self.bits >> 20) & 0x03) as u8)
+    }
+    #[doc = "Bits 22:23 - Sample Adjustment"]
+    #[inline(always)]
+    pub fn sampa(&self) -> SAMPA_R {
+        SAMPA_R::new(((self.bits >> 22) & 0x03) as u8)
+    }
+    #[doc = "Bits 24:27 - Frame Format"]
+    #[inline(always)]
+    pub fn form(&self) -> FORM_R {
+        FORM_R::new(((self.bits >> 24) & 0x0f) as u8)
+    }
+    #[doc = "Bit 28 - Communication Mode"]
+    #[inline(always)]
+    pub fn cmode(&self) -> CMODE_R {
+        CMODE_R::new(((self.bits >> 28) & 0x01) != 0)
+    }
+    #[doc = "Bit 29 - Clock Polarity"]
+    #[inline(always)]
+    pub fn cpol(&self) -> CPOL_R {
+        CPOL_R::new(((self.bits >> 29) & 0x01) != 0)
+    }
+    #[doc = "Bit 30 - Data Order"]
+    #[inline(always)]
+    pub fn dord(&self) -> DORD_R {
+        DORD_R::new(((self.bits >> 30) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Software Reset"]
+    #[inline(always)]
+    pub fn swrst(&mut self) -> SWRST_W {
+        SWRST_W { w: self }
+    }
+    #[doc = "Bit 1 - Enable"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W {
+        ENABLE_W { w: self }
+    }
+    #[doc = "Bits 2:4 - Operating Mode"]
+    #[inline(always)]
+    pub fn mode(&mut self) -> MODE_W {
+        MODE_W { w: self }
+    }
+    #[doc = "Bit 7 - Run during Standby"]
+    #[inline(always)]
+    pub fn runstdby(&mut self) -> RUNSTDBY_W {
+        RUNSTDBY_W { w: self }
+    }
+    #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
+    #[inline(always)]
+    pub fn ibon(&mut self) -> IBON_W {
+        IBON_W { w: self }
+    }
+    #[doc = "Bits 13:15 - Sample"]
+    #[inline(always)]
+    pub fn sampr(&mut self) -> SAMPR_W {
+        SAMPR_W { w: self }
+    }
+    #[doc = "Bits 16:17 - Transmit Data Pinout"]
+    #[inline(always)]
+    pub fn txpo(&mut self) -> TXPO_W {
+        TXPO_W { w: self }
+    }
+    #[doc = "Bits 20:21 - Receive Data Pinout"]
+    #[inline(always)]
+    pub fn rxpo(&mut self) -> RXPO_W {
+        RXPO_W { w: self }
+    }
+    #[doc = "Bits 22:23 - Sample Adjustment"]
+    #[inline(always)]
+    pub fn sampa(&mut self) -> SAMPA_W {
+        SAMPA_W { w: self }
+    }
+    #[doc = "Bits 24:27 - Frame Format"]
+    #[inline(always)]
+    pub fn form(&mut self) -> FORM_W {
+        FORM_W { w: self }
+    }
+    #[doc = "Bit 28 - Communication Mode"]
+    #[inline(always)]
+    pub fn cmode(&mut self) -> CMODE_W {
+        CMODE_W { w: self }
+    }
+    #[doc = "Bit 29 - Clock Polarity"]
+    #[inline(always)]
+    pub fn cpol(&mut self) -> CPOL_W {
+        CPOL_W { w: self }
+    }
+    #[doc = "Bit 30 - Data Order"]
+    #[inline(always)]
+    pub fn dord(&mut self) -> DORD_W {
+        DORD_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
+pub struct CTRLA_SPEC;
+impl crate::RegisterSpec for CTRLA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
+impl crate::Readable for CTRLA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
+impl crate::Writable for CTRLA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLA to value 0"]
+impl crate::Resettable for CTRLA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/ctrlb.rs b/src/sercom0/usart_int/ctrlb.rs
new file mode 100644
index 0000000..410e20c
--- /dev/null
+++ b/src/sercom0/usart_int/ctrlb.rs
@@ -0,0 +1,642 @@
+#[doc = "Register `CTRLB` reader"]
+pub struct R(crate::R<CTRLB_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLB_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLB_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLB` writer"]
+pub struct W(crate::W<CTRLB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Character Size\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum CHSIZE_A {
+    #[doc = "0: 8 Bits"]
+    _8_BIT = 0,
+    #[doc = "1: 9 Bits"]
+    _9_BIT = 1,
+    #[doc = "5: 5 Bits"]
+    _5_BIT = 5,
+    #[doc = "6: 6 Bits"]
+    _6_BIT = 6,
+    #[doc = "7: 7 Bits"]
+    _7_BIT = 7,
+}
+impl From<CHSIZE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: CHSIZE_A) -> Self {
+        variant as _
+    }
+}
+#[doc = "Field `CHSIZE` reader - Character Size"]
+pub struct CHSIZE_R(crate::FieldReader<u8, CHSIZE_A>);
+impl CHSIZE_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        CHSIZE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<CHSIZE_A> {
+        match self.bits {
+            0 => Some(CHSIZE_A::_8_BIT),
+            1 => Some(CHSIZE_A::_9_BIT),
+            5 => Some(CHSIZE_A::_5_BIT),
+            6 => Some(CHSIZE_A::_6_BIT),
+            7 => Some(CHSIZE_A::_7_BIT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `_8_BIT`"]
+    #[inline(always)]
+    pub fn is_8_bit(&self) -> bool {
+        **self == CHSIZE_A::_8_BIT
+    }
+    #[doc = "Checks if the value of the field is `_9_BIT`"]
+    #[inline(always)]
+    pub fn is_9_bit(&self) -> bool {
+        **self == CHSIZE_A::_9_BIT
+    }
+    #[doc = "Checks if the value of the field is `_5_BIT`"]
+    #[inline(always)]
+    pub fn is_5_bit(&self) -> bool {
+        **self == CHSIZE_A::_5_BIT
+    }
+    #[doc = "Checks if the value of the field is `_6_BIT`"]
+    #[inline(always)]
+    pub fn is_6_bit(&self) -> bool {
+        **self == CHSIZE_A::_6_BIT
+    }
+    #[doc = "Checks if the value of the field is `_7_BIT`"]
+    #[inline(always)]
+    pub fn is_7_bit(&self) -> bool {
+        **self == CHSIZE_A::_7_BIT
+    }
+}
+impl core::ops::Deref for CHSIZE_R {
+    type Target = crate::FieldReader<u8, CHSIZE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CHSIZE` writer - Character Size"]
+pub struct CHSIZE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CHSIZE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: CHSIZE_A) -> &'a mut W {
+        unsafe { self.bits(variant.into()) }
+    }
+    #[doc = "8 Bits"]
+    #[inline(always)]
+    pub fn _8_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_8_BIT)
+    }
+    #[doc = "9 Bits"]
+    #[inline(always)]
+    pub fn _9_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_9_BIT)
+    }
+    #[doc = "5 Bits"]
+    #[inline(always)]
+    pub fn _5_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_5_BIT)
+    }
+    #[doc = "6 Bits"]
+    #[inline(always)]
+    pub fn _6_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_6_BIT)
+    }
+    #[doc = "7 Bits"]
+    #[inline(always)]
+    pub fn _7_bit(self) -> &'a mut W {
+        self.variant(CHSIZE_A::_7_BIT)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07);
+        self.w
+    }
+}
+#[doc = "Stop Bit Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SBMODE_A {
+    #[doc = "0: One Stop Bit"]
+    _1_BIT = 0,
+    #[doc = "1: Two Stop Bits"]
+    _2_BIT = 1,
+}
+impl From<SBMODE_A> for bool {
+    #[inline(always)]
+    fn from(variant: SBMODE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `SBMODE` reader - Stop Bit Mode"]
+pub struct SBMODE_R(crate::FieldReader<bool, SBMODE_A>);
+impl SBMODE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SBMODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SBMODE_A {
+        match self.bits {
+            false => SBMODE_A::_1_BIT,
+            true => SBMODE_A::_2_BIT,
+        }
+    }
+    #[doc = "Checks if the value of the field is `_1_BIT`"]
+    #[inline(always)]
+    pub fn is_1_bit(&self) -> bool {
+        **self == SBMODE_A::_1_BIT
+    }
+    #[doc = "Checks if the value of the field is `_2_BIT`"]
+    #[inline(always)]
+    pub fn is_2_bit(&self) -> bool {
+        **self == SBMODE_A::_2_BIT
+    }
+}
+impl core::ops::Deref for SBMODE_R {
+    type Target = crate::FieldReader<bool, SBMODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SBMODE` writer - Stop Bit Mode"]
+pub struct SBMODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SBMODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: SBMODE_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "One Stop Bit"]
+    #[inline(always)]
+    pub fn _1_bit(self) -> &'a mut W {
+        self.variant(SBMODE_A::_1_BIT)
+    }
+    #[doc = "Two Stop Bits"]
+    #[inline(always)]
+    pub fn _2_bit(self) -> &'a mut W {
+        self.variant(SBMODE_A::_2_BIT)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
+        self.w
+    }
+}
+#[doc = "Field `COLDEN` reader - Collision Detection Enable"]
+pub struct COLDEN_R(crate::FieldReader<bool, bool>);
+impl COLDEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        COLDEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for COLDEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `COLDEN` writer - Collision Detection Enable"]
+pub struct COLDEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> COLDEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
+        self.w
+    }
+}
+#[doc = "Field `SFDE` reader - Start of Frame Detection Enable"]
+pub struct SFDE_R(crate::FieldReader<bool, bool>);
+impl SFDE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SFDE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SFDE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `SFDE` writer - Start of Frame Detection Enable"]
+pub struct SFDE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> SFDE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
+        self.w
+    }
+}
+#[doc = "Field `ENC` reader - Encoding Format"]
+pub struct ENC_R(crate::FieldReader<bool, bool>);
+impl ENC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENC` writer - Encoding Format"]
+pub struct ENC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ENC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
+        self.w
+    }
+}
+#[doc = "Parity Mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum PMODE_A {
+    #[doc = "0: Even Parity"]
+    EVEN = 0,
+    #[doc = "1: Odd Parity"]
+    ODD = 1,
+}
+impl From<PMODE_A> for bool {
+    #[inline(always)]
+    fn from(variant: PMODE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `PMODE` reader - Parity Mode"]
+pub struct PMODE_R(crate::FieldReader<bool, PMODE_A>);
+impl PMODE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        PMODE_R(crate::FieldReader::new(bits))
+    }
+    #[doc = r"Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> PMODE_A {
+        match self.bits {
+            false => PMODE_A::EVEN,
+            true => PMODE_A::ODD,
+        }
+    }
+    #[doc = "Checks if the value of the field is `EVEN`"]
+    #[inline(always)]
+    pub fn is_even(&self) -> bool {
+        **self == PMODE_A::EVEN
+    }
+    #[doc = "Checks if the value of the field is `ODD`"]
+    #[inline(always)]
+    pub fn is_odd(&self) -> bool {
+        **self == PMODE_A::ODD
+    }
+}
+impl core::ops::Deref for PMODE_R {
+    type Target = crate::FieldReader<bool, PMODE_A>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PMODE` writer - Parity Mode"]
+pub struct PMODE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PMODE_W<'a> {
+    #[doc = r"Writes `variant` to the field"]
+    #[inline(always)]
+    pub fn variant(self, variant: PMODE_A) -> &'a mut W {
+        self.bit(variant.into())
+    }
+    #[doc = "Even Parity"]
+    #[inline(always)]
+    pub fn even(self) -> &'a mut W {
+        self.variant(PMODE_A::EVEN)
+    }
+    #[doc = "Odd Parity"]
+    #[inline(always)]
+    pub fn odd(self) -> &'a mut W {
+        self.variant(PMODE_A::ODD)
+    }
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
+        self.w
+    }
+}
+#[doc = "Field `TXEN` reader - Transmitter Enable"]
+pub struct TXEN_R(crate::FieldReader<bool, bool>);
+impl TXEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXEN` writer - Transmitter Enable"]
+pub struct TXEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
+        self.w
+    }
+}
+#[doc = "Field `RXEN` reader - Receiver Enable"]
+pub struct RXEN_R(crate::FieldReader<bool, bool>);
+impl RXEN_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXEN_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXEN` writer - Receiver Enable"]
+pub struct RXEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXEN_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
+        self.w
+    }
+}
+#[doc = "Field `LINCMD` reader - LIN Command"]
+pub struct LINCMD_R(crate::FieldReader<u8, u8>);
+impl LINCMD_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        LINCMD_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for LINCMD_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `LINCMD` writer - LIN Command"]
+pub struct LINCMD_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> LINCMD_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - Character Size"]
+    #[inline(always)]
+    pub fn chsize(&self) -> CHSIZE_R {
+        CHSIZE_R::new((self.bits & 0x07) as u8)
+    }
+    #[doc = "Bit 6 - Stop Bit Mode"]
+    #[inline(always)]
+    pub fn sbmode(&self) -> SBMODE_R {
+        SBMODE_R::new(((self.bits >> 6) & 0x01) != 0)
+    }
+    #[doc = "Bit 8 - Collision Detection Enable"]
+    #[inline(always)]
+    pub fn colden(&self) -> COLDEN_R {
+        COLDEN_R::new(((self.bits >> 8) & 0x01) != 0)
+    }
+    #[doc = "Bit 9 - Start of Frame Detection Enable"]
+    #[inline(always)]
+    pub fn sfde(&self) -> SFDE_R {
+        SFDE_R::new(((self.bits >> 9) & 0x01) != 0)
+    }
+    #[doc = "Bit 10 - Encoding Format"]
+    #[inline(always)]
+    pub fn enc(&self) -> ENC_R {
+        ENC_R::new(((self.bits >> 10) & 0x01) != 0)
+    }
+    #[doc = "Bit 13 - Parity Mode"]
+    #[inline(always)]
+    pub fn pmode(&self) -> PMODE_R {
+        PMODE_R::new(((self.bits >> 13) & 0x01) != 0)
+    }
+    #[doc = "Bit 16 - Transmitter Enable"]
+    #[inline(always)]
+    pub fn txen(&self) -> TXEN_R {
+        TXEN_R::new(((self.bits >> 16) & 0x01) != 0)
+    }
+    #[doc = "Bit 17 - Receiver Enable"]
+    #[inline(always)]
+    pub fn rxen(&self) -> RXEN_R {
+        RXEN_R::new(((self.bits >> 17) & 0x01) != 0)
+    }
+    #[doc = "Bits 24:25 - LIN Command"]
+    #[inline(always)]
+    pub fn lincmd(&self) -> LINCMD_R {
+        LINCMD_R::new(((self.bits >> 24) & 0x03) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - Character Size"]
+    #[inline(always)]
+    pub fn chsize(&mut self) -> CHSIZE_W {
+        CHSIZE_W { w: self }
+    }
+    #[doc = "Bit 6 - Stop Bit Mode"]
+    #[inline(always)]
+    pub fn sbmode(&mut self) -> SBMODE_W {
+        SBMODE_W { w: self }
+    }
+    #[doc = "Bit 8 - Collision Detection Enable"]
+    #[inline(always)]
+    pub fn colden(&mut self) -> COLDEN_W {
+        COLDEN_W { w: self }
+    }
+    #[doc = "Bit 9 - Start of Frame Detection Enable"]
+    #[inline(always)]
+    pub fn sfde(&mut self) -> SFDE_W {
+        SFDE_W { w: self }
+    }
+    #[doc = "Bit 10 - Encoding Format"]
+    #[inline(always)]
+    pub fn enc(&mut self) -> ENC_W {
+        ENC_W { w: self }
+    }
+    #[doc = "Bit 13 - Parity Mode"]
+    #[inline(always)]
+    pub fn pmode(&mut self) -> PMODE_W {
+        PMODE_W { w: self }
+    }
+    #[doc = "Bit 16 - Transmitter Enable"]
+    #[inline(always)]
+    pub fn txen(&mut self) -> TXEN_W {
+        TXEN_W { w: self }
+    }
+    #[doc = "Bit 17 - Receiver Enable"]
+    #[inline(always)]
+    pub fn rxen(&mut self) -> RXEN_W {
+        RXEN_W { w: self }
+    }
+    #[doc = "Bits 24:25 - LIN Command"]
+    #[inline(always)]
+    pub fn lincmd(&mut self) -> LINCMD_W {
+        LINCMD_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"]
+pub struct CTRLB_SPEC;
+impl crate::RegisterSpec for CTRLB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrlb::R](R) reader structure"]
+impl crate::Readable for CTRLB_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"]
+impl crate::Writable for CTRLB_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLB to value 0"]
+impl crate::Resettable for CTRLB_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/ctrlc.rs b/src/sercom0/usart_int/ctrlc.rs
new file mode 100644
index 0000000..99619e1
--- /dev/null
+++ b/src/sercom0/usart_int/ctrlc.rs
@@ -0,0 +1,174 @@
+#[doc = "Register `CTRLC` reader"]
+pub struct R(crate::R<CTRLC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLC` writer"]
+pub struct W(crate::W<CTRLC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `GTIME` reader - RS485 Guard Time"]
+pub struct GTIME_R(crate::FieldReader<u8, u8>);
+impl GTIME_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        GTIME_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for GTIME_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `GTIME` writer - RS485 Guard Time"]
+pub struct GTIME_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> GTIME_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07);
+        self.w
+    }
+}
+#[doc = "Field `BRKLEN` reader - LIN Master Break Length"]
+pub struct BRKLEN_R(crate::FieldReader<u8, u8>);
+impl BRKLEN_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        BRKLEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BRKLEN_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BRKLEN` writer - LIN Master Break Length"]
+pub struct BRKLEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BRKLEN_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8);
+        self.w
+    }
+}
+#[doc = "Field `HDRDLY` reader - LIN Master Header Delay"]
+pub struct HDRDLY_R(crate::FieldReader<u8, u8>);
+impl HDRDLY_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        HDRDLY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for HDRDLY_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `HDRDLY` writer - LIN Master Header Delay"]
+pub struct HDRDLY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> HDRDLY_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - RS485 Guard Time"]
+    #[inline(always)]
+    pub fn gtime(&self) -> GTIME_R {
+        GTIME_R::new((self.bits & 0x07) as u8)
+    }
+    #[doc = "Bits 8:9 - LIN Master Break Length"]
+    #[inline(always)]
+    pub fn brklen(&self) -> BRKLEN_R {
+        BRKLEN_R::new(((self.bits >> 8) & 0x03) as u8)
+    }
+    #[doc = "Bits 10:11 - LIN Master Header Delay"]
+    #[inline(always)]
+    pub fn hdrdly(&self) -> HDRDLY_R {
+        HDRDLY_R::new(((self.bits >> 10) & 0x03) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - RS485 Guard Time"]
+    #[inline(always)]
+    pub fn gtime(&mut self) -> GTIME_W {
+        GTIME_W { w: self }
+    }
+    #[doc = "Bits 8:9 - LIN Master Break Length"]
+    #[inline(always)]
+    pub fn brklen(&mut self) -> BRKLEN_W {
+        BRKLEN_W { w: self }
+    }
+    #[doc = "Bits 10:11 - LIN Master Header Delay"]
+    #[inline(always)]
+    pub fn hdrdly(&mut self) -> HDRDLY_W {
+        HDRDLY_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Control C\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlc](index.html) module"]
+pub struct CTRLC_SPEC;
+impl crate::RegisterSpec for CTRLC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrlc::R](R) reader structure"]
+impl crate::Readable for CTRLC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrlc::W](W) writer structure"]
+impl crate::Writable for CTRLC_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLC to value 0"]
+impl crate::Resettable for CTRLC_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/data.rs b/src/sercom0/usart_int/data.rs
new file mode 100644
index 0000000..75e12dc
--- /dev/null
+++ b/src/sercom0/usart_int/data.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `DATA` reader"]
+pub struct R(crate::R<DATA_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DATA_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DATA_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DATA` writer"]
+pub struct W(crate::W<DATA_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DATA_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DATA_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DATA_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DATA` reader - Data Value"]
+pub struct DATA_R(crate::FieldReader<u16, u16>);
+impl DATA_R {
+    pub(crate) fn new(bits: u16) -> Self {
+        DATA_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DATA_R {
+    type Target = crate::FieldReader<u16, u16>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DATA` writer - Data Value"]
+pub struct DATA_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DATA_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01ff) | (value as u16 & 0x01ff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:8 - Data Value"]
+    #[inline(always)]
+    pub fn data(&self) -> DATA_R {
+        DATA_R::new((self.bits & 0x01ff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:8 - Data Value"]
+    #[inline(always)]
+    pub fn data(&mut self) -> DATA_W {
+        DATA_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Data\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"]
+pub struct DATA_SPEC;
+impl crate::RegisterSpec for DATA_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [data::R](R) reader structure"]
+impl crate::Readable for DATA_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"]
+impl crate::Writable for DATA_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DATA to value 0"]
+impl crate::Resettable for DATA_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/dbgctrl.rs b/src/sercom0/usart_int/dbgctrl.rs
new file mode 100644
index 0000000..8d13154
--- /dev/null
+++ b/src/sercom0/usart_int/dbgctrl.rs
@@ -0,0 +1,112 @@
+#[doc = "Register `DBGCTRL` reader"]
+pub struct R(crate::R<DBGCTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DBGCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DBGCTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DBGCTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DBGCTRL` writer"]
+pub struct W(crate::W<DBGCTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DBGCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DBGCTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DBGCTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DBGSTOP` reader - Debug Mode"]
+pub struct DBGSTOP_R(crate::FieldReader<bool, bool>);
+impl DBGSTOP_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DBGSTOP_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DBGSTOP_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DBGSTOP` writer - Debug Mode"]
+pub struct DBGSTOP_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DBGSTOP_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Debug Mode"]
+    #[inline(always)]
+    pub fn dbgstop(&self) -> DBGSTOP_R {
+        DBGSTOP_R::new((self.bits & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Debug Mode"]
+    #[inline(always)]
+    pub fn dbgstop(&mut self) -> DBGSTOP_W {
+        DBGSTOP_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Debug Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgctrl](index.html) module"]
+pub struct DBGCTRL_SPEC;
+impl crate::RegisterSpec for DBGCTRL_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [dbgctrl::R](R) reader structure"]
+impl crate::Readable for DBGCTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [dbgctrl::W](W) writer structure"]
+impl crate::Writable for DBGCTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DBGCTRL to value 0"]
+impl crate::Resettable for DBGCTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/intenclr.rs b/src/sercom0/usart_int/intenclr.rs
new file mode 100644
index 0000000..097e70b
--- /dev/null
+++ b/src/sercom0/usart_int/intenclr.rs
@@ -0,0 +1,388 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DRE` reader - Data Register Empty Interrupt Disable"]
+pub struct DRE_R(crate::FieldReader<bool, bool>);
+impl DRE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRE` writer - Data Register Empty Interrupt Disable"]
+pub struct DRE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `TXC` reader - Transmit Complete Interrupt Disable"]
+pub struct TXC_R(crate::FieldReader<bool, bool>);
+impl TXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXC` writer - Transmit Complete Interrupt Disable"]
+pub struct TXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXC` reader - Receive Complete Interrupt Disable"]
+pub struct RXC_R(crate::FieldReader<bool, bool>);
+impl RXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXC` writer - Receive Complete Interrupt Disable"]
+pub struct RXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `RXS` reader - Receive Start Interrupt Disable"]
+pub struct RXS_R(crate::FieldReader<bool, bool>);
+impl RXS_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXS_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXS_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXS` writer - Receive Start Interrupt Disable"]
+pub struct RXS_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXS_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `CTSIC` reader - Clear To Send Input Change Interrupt Disable"]
+pub struct CTSIC_R(crate::FieldReader<bool, bool>);
+impl CTSIC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CTSIC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CTSIC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CTSIC` writer - Clear To Send Input Change Interrupt Disable"]
+pub struct CTSIC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CTSIC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `RXBRK` reader - Break Received Interrupt Disable"]
+pub struct RXBRK_R(crate::FieldReader<bool, bool>);
+impl RXBRK_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXBRK_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXBRK_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXBRK` writer - Break Received Interrupt Disable"]
+pub struct RXBRK_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXBRK_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u8 & 0x01) << 5);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt Disable"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt Disable"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Disable"]
+    #[inline(always)]
+    pub fn dre(&self) -> DRE_R {
+        DRE_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn txc(&self) -> TXC_R {
+        TXC_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxc(&self) -> RXC_R {
+        RXC_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Receive Start Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxs(&self) -> RXS_R {
+        RXS_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - Clear To Send Input Change Interrupt Disable"]
+    #[inline(always)]
+    pub fn ctsic(&self) -> CTSIC_R {
+        CTSIC_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 5 - Break Received Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxbrk(&self) -> RXBRK_R {
+        RXBRK_R::new(((self.bits >> 5) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Disable"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Disable"]
+    #[inline(always)]
+    pub fn dre(&mut self) -> DRE_W {
+        DRE_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn txc(&mut self) -> TXC_W {
+        TXC_W { w: self }
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxc(&mut self) -> RXC_W {
+        RXC_W { w: self }
+    }
+    #[doc = "Bit 3 - Receive Start Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxs(&mut self) -> RXS_W {
+        RXS_W { w: self }
+    }
+    #[doc = "Bit 4 - Clear To Send Input Change Interrupt Disable"]
+    #[inline(always)]
+    pub fn ctsic(&mut self) -> CTSIC_W {
+        CTSIC_W { w: self }
+    }
+    #[doc = "Bit 5 - Break Received Interrupt Disable"]
+    #[inline(always)]
+    pub fn rxbrk(&mut self) -> RXBRK_W {
+        RXBRK_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Disable"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/intenset.rs b/src/sercom0/usart_int/intenset.rs
new file mode 100644
index 0000000..f3ecf41
--- /dev/null
+++ b/src/sercom0/usart_int/intenset.rs
@@ -0,0 +1,388 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DRE` reader - Data Register Empty Interrupt Enable"]
+pub struct DRE_R(crate::FieldReader<bool, bool>);
+impl DRE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRE` writer - Data Register Empty Interrupt Enable"]
+pub struct DRE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `TXC` reader - Transmit Complete Interrupt Enable"]
+pub struct TXC_R(crate::FieldReader<bool, bool>);
+impl TXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXC` writer - Transmit Complete Interrupt Enable"]
+pub struct TXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXC` reader - Receive Complete Interrupt Enable"]
+pub struct RXC_R(crate::FieldReader<bool, bool>);
+impl RXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXC` writer - Receive Complete Interrupt Enable"]
+pub struct RXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `RXS` reader - Receive Start Interrupt Enable"]
+pub struct RXS_R(crate::FieldReader<bool, bool>);
+impl RXS_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXS_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXS_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXS` writer - Receive Start Interrupt Enable"]
+pub struct RXS_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXS_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `CTSIC` reader - Clear To Send Input Change Interrupt Enable"]
+pub struct CTSIC_R(crate::FieldReader<bool, bool>);
+impl CTSIC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CTSIC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CTSIC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CTSIC` writer - Clear To Send Input Change Interrupt Enable"]
+pub struct CTSIC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CTSIC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `RXBRK` reader - Break Received Interrupt Enable"]
+pub struct RXBRK_R(crate::FieldReader<bool, bool>);
+impl RXBRK_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXBRK_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXBRK_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXBRK` writer - Break Received Interrupt Enable"]
+pub struct RXBRK_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXBRK_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u8 & 0x01) << 5);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt Enable"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt Enable"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Enable"]
+    #[inline(always)]
+    pub fn dre(&self) -> DRE_R {
+        DRE_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn txc(&self) -> TXC_R {
+        TXC_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxc(&self) -> RXC_R {
+        RXC_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Receive Start Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxs(&self) -> RXS_R {
+        RXS_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - Clear To Send Input Change Interrupt Enable"]
+    #[inline(always)]
+    pub fn ctsic(&self) -> CTSIC_R {
+        CTSIC_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 5 - Break Received Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxbrk(&self) -> RXBRK_R {
+        RXBRK_R::new(((self.bits >> 5) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Enable"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Data Register Empty Interrupt Enable"]
+    #[inline(always)]
+    pub fn dre(&mut self) -> DRE_W {
+        DRE_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn txc(&mut self) -> TXC_W {
+        TXC_W { w: self }
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxc(&mut self) -> RXC_W {
+        RXC_W { w: self }
+    }
+    #[doc = "Bit 3 - Receive Start Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxs(&mut self) -> RXS_W {
+        RXS_W { w: self }
+    }
+    #[doc = "Bit 4 - Clear To Send Input Change Interrupt Enable"]
+    #[inline(always)]
+    pub fn ctsic(&mut self) -> CTSIC_W {
+        CTSIC_W { w: self }
+    }
+    #[doc = "Bit 5 - Break Received Interrupt Enable"]
+    #[inline(always)]
+    pub fn rxbrk(&mut self) -> RXBRK_W {
+        RXBRK_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt Enable"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/intflag.rs b/src/sercom0/usart_int/intflag.rs
new file mode 100644
index 0000000..36db4bd
--- /dev/null
+++ b/src/sercom0/usart_int/intflag.rs
@@ -0,0 +1,388 @@
+#[doc = "Register `INTFLAG` reader"]
+pub struct R(crate::R<INTFLAG_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTFLAG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTFLAG_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTFLAG_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTFLAG` writer"]
+pub struct W(crate::W<INTFLAG_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTFLAG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTFLAG_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTFLAG_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DRE` reader - Data Register Empty Interrupt"]
+pub struct DRE_R(crate::FieldReader<bool, bool>);
+impl DRE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        DRE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for DRE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `DRE` writer - Data Register Empty Interrupt"]
+pub struct DRE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> DRE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `TXC` reader - Transmit Complete Interrupt"]
+pub struct TXC_R(crate::FieldReader<bool, bool>);
+impl TXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXC` writer - Transmit Complete Interrupt"]
+pub struct TXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `RXC` reader - Receive Complete Interrupt"]
+pub struct RXC_R(crate::FieldReader<bool, bool>);
+impl RXC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXC` writer - Receive Complete Interrupt"]
+pub struct RXC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `RXS` reader - Receive Start Interrupt"]
+pub struct RXS_R(crate::FieldReader<bool, bool>);
+impl RXS_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXS_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXS_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXS` writer - Receive Start Interrupt"]
+pub struct RXS_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXS_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `CTSIC` reader - Clear To Send Input Change Interrupt"]
+pub struct CTSIC_R(crate::FieldReader<bool, bool>);
+impl CTSIC_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CTSIC_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CTSIC_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CTSIC` writer - Clear To Send Input Change Interrupt"]
+pub struct CTSIC_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CTSIC_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `RXBRK` reader - Break Received Interrupt"]
+pub struct RXBRK_R(crate::FieldReader<bool, bool>);
+impl RXBRK_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        RXBRK_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXBRK_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXBRK` writer - Break Received Interrupt"]
+pub struct RXBRK_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXBRK_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u8 & 0x01) << 5);
+        self.w
+    }
+}
+#[doc = "Field `ERROR` reader - Combined Error Interrupt"]
+pub struct ERROR_R(crate::FieldReader<bool, bool>);
+impl ERROR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ERROR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ERROR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ERROR` writer - Combined Error Interrupt"]
+pub struct ERROR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ERROR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Data Register Empty Interrupt"]
+    #[inline(always)]
+    pub fn dre(&self) -> DRE_R {
+        DRE_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt"]
+    #[inline(always)]
+    pub fn txc(&self) -> TXC_R {
+        TXC_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt"]
+    #[inline(always)]
+    pub fn rxc(&self) -> RXC_R {
+        RXC_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Receive Start Interrupt"]
+    #[inline(always)]
+    pub fn rxs(&self) -> RXS_R {
+        RXS_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - Clear To Send Input Change Interrupt"]
+    #[inline(always)]
+    pub fn ctsic(&self) -> CTSIC_R {
+        CTSIC_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 5 - Break Received Interrupt"]
+    #[inline(always)]
+    pub fn rxbrk(&self) -> RXBRK_R {
+        RXBRK_R::new(((self.bits >> 5) & 0x01) != 0)
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 7) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Data Register Empty Interrupt"]
+    #[inline(always)]
+    pub fn dre(&mut self) -> DRE_W {
+        DRE_W { w: self }
+    }
+    #[doc = "Bit 1 - Transmit Complete Interrupt"]
+    #[inline(always)]
+    pub fn txc(&mut self) -> TXC_W {
+        TXC_W { w: self }
+    }
+    #[doc = "Bit 2 - Receive Complete Interrupt"]
+    #[inline(always)]
+    pub fn rxc(&mut self) -> RXC_W {
+        RXC_W { w: self }
+    }
+    #[doc = "Bit 3 - Receive Start Interrupt"]
+    #[inline(always)]
+    pub fn rxs(&mut self) -> RXS_W {
+        RXS_W { w: self }
+    }
+    #[doc = "Bit 4 - Clear To Send Input Change Interrupt"]
+    #[inline(always)]
+    pub fn ctsic(&mut self) -> CTSIC_W {
+        CTSIC_W { w: self }
+    }
+    #[doc = "Bit 5 - Break Received Interrupt"]
+    #[inline(always)]
+    pub fn rxbrk(&mut self) -> RXBRK_W {
+        RXBRK_W { w: self }
+    }
+    #[doc = "Bit 7 - Combined Error Interrupt"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W {
+        ERROR_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"]
+pub struct INTFLAG_SPEC;
+impl crate::RegisterSpec for INTFLAG_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [intflag::R](R) reader structure"]
+impl crate::Readable for INTFLAG_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"]
+impl crate::Writable for INTFLAG_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTFLAG to value 0"]
+impl crate::Resettable for INTFLAG_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/rxpl.rs b/src/sercom0/usart_int/rxpl.rs
new file mode 100644
index 0000000..b4e97f4
--- /dev/null
+++ b/src/sercom0/usart_int/rxpl.rs
@@ -0,0 +1,102 @@
+#[doc = "Register `RXPL` reader"]
+pub struct R(crate::R<RXPL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RXPL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RXPL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RXPL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RXPL` writer"]
+pub struct W(crate::W<RXPL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RXPL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RXPL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RXPL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `RXPL` reader - Receive Pulse Length"]
+pub struct RXPL_R(crate::FieldReader<u8, u8>);
+impl RXPL_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        RXPL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for RXPL_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `RXPL` writer - Receive Pulse Length"]
+pub struct RXPL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> RXPL_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0xff) | (value as u8 & 0xff);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Receive Pulse Length"]
+    #[inline(always)]
+    pub fn rxpl(&self) -> RXPL_R {
+        RXPL_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Receive Pulse Length"]
+    #[inline(always)]
+    pub fn rxpl(&mut self) -> RXPL_W {
+        RXPL_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Receive Pulse Length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxpl](index.html) module"]
+pub struct RXPL_SPEC;
+impl crate::RegisterSpec for RXPL_SPEC {
+    type Ux = u8;
+}
+#[doc = "`read()` method returns [rxpl::R](R) reader structure"]
+impl crate::Readable for RXPL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rxpl::W](W) writer structure"]
+impl crate::Writable for RXPL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RXPL to value 0"]
+impl crate::Resettable for RXPL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/status.rs b/src/sercom0/usart_int/status.rs
new file mode 100644
index 0000000..bd7d3f1
--- /dev/null
+++ b/src/sercom0/usart_int/status.rs
@@ -0,0 +1,388 @@
+#[doc = "Register `STATUS` reader"]
+pub struct R(crate::R<STATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<STATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `STATUS` writer"]
+pub struct W(crate::W<STATUS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<STATUS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<STATUS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PERR` reader - Parity Error"]
+pub struct PERR_R(crate::FieldReader<bool, bool>);
+impl PERR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        PERR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for PERR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `PERR` writer - Parity Error"]
+pub struct PERR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> PERR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01);
+        self.w
+    }
+}
+#[doc = "Field `FERR` reader - Frame Error"]
+pub struct FERR_R(crate::FieldReader<bool, bool>);
+impl FERR_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        FERR_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for FERR_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `FERR` writer - Frame Error"]
+pub struct FERR_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> FERR_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1);
+        self.w
+    }
+}
+#[doc = "Field `BUFOVF` reader - Buffer Overflow"]
+pub struct BUFOVF_R(crate::FieldReader<bool, bool>);
+impl BUFOVF_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        BUFOVF_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BUFOVF_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BUFOVF` writer - Buffer Overflow"]
+pub struct BUFOVF_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BUFOVF_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2);
+        self.w
+    }
+}
+#[doc = "Field `CTS` reader - Clear To Send"]
+pub struct CTS_R(crate::FieldReader<bool, bool>);
+impl CTS_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CTS_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CTS_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CTS` writer - Clear To Send"]
+pub struct CTS_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> CTS_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3);
+        self.w
+    }
+}
+#[doc = "Field `ISF` reader - Inconsistent Sync Field"]
+pub struct ISF_R(crate::FieldReader<bool, bool>);
+impl ISF_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ISF_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ISF_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ISF` writer - Inconsistent Sync Field"]
+pub struct ISF_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> ISF_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4);
+        self.w
+    }
+}
+#[doc = "Field `COLL` reader - Collision Detected"]
+pub struct COLL_R(crate::FieldReader<bool, bool>);
+impl COLL_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        COLL_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for COLL_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `COLL` writer - Collision Detected"]
+pub struct COLL_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> COLL_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5);
+        self.w
+    }
+}
+#[doc = "Field `TXE` reader - Transmitter Empty"]
+pub struct TXE_R(crate::FieldReader<bool, bool>);
+impl TXE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        TXE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for TXE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `TXE` writer - Transmitter Empty"]
+pub struct TXE_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> TXE_W<'a> {
+    #[doc = r"Sets the field bit"]
+    #[inline(always)]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+    #[doc = r"Clears the field bit"]
+    #[inline(always)]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub fn bit(self, value: bool) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Parity Error"]
+    #[inline(always)]
+    pub fn perr(&self) -> PERR_R {
+        PERR_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - Frame Error"]
+    #[inline(always)]
+    pub fn ferr(&self) -> FERR_R {
+        FERR_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - Buffer Overflow"]
+    #[inline(always)]
+    pub fn bufovf(&self) -> BUFOVF_R {
+        BUFOVF_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+    #[doc = "Bit 3 - Clear To Send"]
+    #[inline(always)]
+    pub fn cts(&self) -> CTS_R {
+        CTS_R::new(((self.bits >> 3) & 0x01) != 0)
+    }
+    #[doc = "Bit 4 - Inconsistent Sync Field"]
+    #[inline(always)]
+    pub fn isf(&self) -> ISF_R {
+        ISF_R::new(((self.bits >> 4) & 0x01) != 0)
+    }
+    #[doc = "Bit 5 - Collision Detected"]
+    #[inline(always)]
+    pub fn coll(&self) -> COLL_R {
+        COLL_R::new(((self.bits >> 5) & 0x01) != 0)
+    }
+    #[doc = "Bit 6 - Transmitter Empty"]
+    #[inline(always)]
+    pub fn txe(&self) -> TXE_R {
+        TXE_R::new(((self.bits >> 6) & 0x01) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Parity Error"]
+    #[inline(always)]
+    pub fn perr(&mut self) -> PERR_W {
+        PERR_W { w: self }
+    }
+    #[doc = "Bit 1 - Frame Error"]
+    #[inline(always)]
+    pub fn ferr(&mut self) -> FERR_W {
+        FERR_W { w: self }
+    }
+    #[doc = "Bit 2 - Buffer Overflow"]
+    #[inline(always)]
+    pub fn bufovf(&mut self) -> BUFOVF_W {
+        BUFOVF_W { w: self }
+    }
+    #[doc = "Bit 3 - Clear To Send"]
+    #[inline(always)]
+    pub fn cts(&mut self) -> CTS_W {
+        CTS_W { w: self }
+    }
+    #[doc = "Bit 4 - Inconsistent Sync Field"]
+    #[inline(always)]
+    pub fn isf(&mut self) -> ISF_W {
+        ISF_W { w: self }
+    }
+    #[doc = "Bit 5 - Collision Detected"]
+    #[inline(always)]
+    pub fn coll(&mut self) -> COLL_W {
+        COLL_W { w: self }
+    }
+    #[doc = "Bit 6 - Transmitter Empty"]
+    #[inline(always)]
+    pub fn txe(&mut self) -> TXE_W {
+        TXE_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
+pub struct STATUS_SPEC;
+impl crate::RegisterSpec for STATUS_SPEC {
+    type Ux = u16;
+}
+#[doc = "`read()` method returns [status::R](R) reader structure"]
+impl crate::Readable for STATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"]
+impl crate::Writable for STATUS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets STATUS to value 0"]
+impl crate::Resettable for STATUS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}
diff --git a/src/sercom0/usart_int/syncbusy.rs b/src/sercom0/usart_int/syncbusy.rs
new file mode 100644
index 0000000..f59faf0
--- /dev/null
+++ b/src/sercom0/usart_int/syncbusy.rs
@@ -0,0 +1,90 @@
+#[doc = "Register `SYNCBUSY` reader"]
+pub struct R(crate::R<SYNCBUSY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SYNCBUSY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SYNCBUSY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SWRST` reader - Software Reset Synchronization Busy"]
+pub struct SWRST_R(crate::FieldReader<bool, bool>);
+impl SWRST_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        SWRST_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for SWRST_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `ENABLE` reader - SERCOM Enable Synchronization Busy"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        ENABLE_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for ENABLE_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `CTRLB` reader - CTRLB Synchronization Busy"]
+pub struct CTRLB_R(crate::FieldReader<bool, bool>);
+impl CTRLB_R {
+    pub(crate) fn new(bits: bool) -> Self {
+        CTRLB_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for CTRLB_R {
+    type Target = crate::FieldReader<bool, bool>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Software Reset Synchronization Busy"]
+    #[inline(always)]
+    pub fn swrst(&self) -> SWRST_R {
+        SWRST_R::new((self.bits & 0x01) != 0)
+    }
+    #[doc = "Bit 1 - SERCOM Enable Synchronization Busy"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+    }
+    #[doc = "Bit 2 - CTRLB Synchronization Busy"]
+    #[inline(always)]
+    pub fn ctrlb(&self) -> CTRLB_R {
+        CTRLB_R::new(((self.bits >> 2) & 0x01) != 0)
+    }
+}
+#[doc = "USART_INT Synchronization Busy\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"]
+pub struct SYNCBUSY_SPEC;
+impl crate::RegisterSpec for SYNCBUSY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [syncbusy::R](R) reader structure"]
+impl crate::Readable for SYNCBUSY_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets SYNCBUSY to value 0"]
+impl crate::Resettable for SYNCBUSY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}