diff options
Diffstat (limited to 'src/eic')
| -rw-r--r-- | src/eic/asynch.rs | 151 | ||||
| -rw-r--r-- | src/eic/config.rs | 1531 | ||||
| -rw-r--r-- | src/eic/ctrla.rs | 251 | ||||
| -rw-r--r-- | src/eic/debouncen.rs | 102 | ||||
| -rw-r--r-- | src/eic/dprescaler.rs | 671 | ||||
| -rw-r--r-- | src/eic/evctrl.rs | 102 | ||||
| -rw-r--r-- | src/eic/intenclr.rs | 102 | ||||
| -rw-r--r-- | src/eic/intenset.rs | 102 | ||||
| -rw-r--r-- | src/eic/intflag.rs | 102 | ||||
| -rw-r--r-- | src/eic/nmictrl.rs | 342 | ||||
| -rw-r--r-- | src/eic/nmiflag.rs | 112 | ||||
| -rw-r--r-- | src/eic/pinstate.rs | 52 | ||||
| -rw-r--r-- | src/eic/syncbusy.rs | 71 |
13 files changed, 3691 insertions, 0 deletions
diff --git a/src/eic/asynch.rs b/src/eic/asynch.rs new file mode 100644 index 0000000..0227933 --- /dev/null +++ b/src/eic/asynch.rs @@ -0,0 +1,151 @@ +#[doc = "Register `ASYNCH` reader"] +pub struct R(crate::R<ASYNCH_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<ASYNCH_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<ASYNCH_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<ASYNCH_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `ASYNCH` writer"] +pub struct W(crate::W<ASYNCH_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<ASYNCH_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<ASYNCH_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<ASYNCH_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Asynchronous Edge Detection Mode\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u16)] +pub enum ASYNCH_A { + #[doc = "0: Edge detection is clock synchronously operated"] + SYNC = 0, + #[doc = "1: Edge detection is clock asynchronously operated"] + ASYNC = 1, +} +impl From<ASYNCH_A> for u16 { + #[inline(always)] + fn from(variant: ASYNCH_A) -> Self { + variant as _ + } +} +#[doc = "Field `ASYNCH` reader - Asynchronous Edge Detection Mode"] +pub struct ASYNCH_R(crate::FieldReader<u16, ASYNCH_A>); +impl ASYNCH_R { + pub(crate) fn new(bits: u16) -> Self { + ASYNCH_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<ASYNCH_A> { + match self.bits { + 0 => Some(ASYNCH_A::SYNC), + 1 => Some(ASYNCH_A::ASYNC), + _ => None, + } + } + #[doc = "Checks if the value of the field is `SYNC`"] + #[inline(always)] + pub fn is_sync(&self) -> bool { + **self == ASYNCH_A::SYNC + } + #[doc = "Checks if the value of the field is `ASYNC`"] + #[inline(always)] + pub fn is_async(&self) -> bool { + **self == ASYNCH_A::ASYNC + } +} +impl core::ops::Deref for ASYNCH_R { + type Target = crate::FieldReader<u16, ASYNCH_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ASYNCH` writer - Asynchronous Edge Detection Mode"] +pub struct ASYNCH_W<'a> { + w: &'a mut W, +} +impl<'a> ASYNCH_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: ASYNCH_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "Edge detection is clock synchronously operated"] + #[inline(always)] + pub fn sync(self) -> &'a mut W { + self.variant(ASYNCH_A::SYNC) + } + #[doc = "Edge detection is clock asynchronously operated"] + #[inline(always)] + pub fn async_(self) -> &'a mut W { + self.variant(ASYNCH_A::ASYNC) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - Asynchronous Edge Detection Mode"] + #[inline(always)] + pub fn asynch(&self) -> ASYNCH_R { + ASYNCH_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - Asynchronous Edge Detection Mode"] + #[inline(always)] + pub fn asynch(&mut self) -> ASYNCH_W { + ASYNCH_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "External Interrupt Asynchronous Mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [asynch](index.html) module"] +pub struct ASYNCH_SPEC; +impl crate::RegisterSpec for ASYNCH_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [asynch::R](R) reader structure"] +impl crate::Readable for ASYNCH_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [asynch::W](W) writer structure"] +impl crate::Writable for ASYNCH_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets ASYNCH to value 0"] +impl crate::Resettable for ASYNCH_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/eic/config.rs b/src/eic/config.rs new file mode 100644 index 0000000..7b37c77 --- /dev/null +++ b/src/eic/config.rs @@ -0,0 +1,1531 @@ +#[doc = "Register `CONFIG[%s]` reader"] +pub struct R(crate::R<CONFIG_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CONFIG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CONFIG_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CONFIG_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `CONFIG[%s]` writer"] +pub struct W(crate::W<CONFIG_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<CONFIG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<CONFIG_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<CONFIG_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Input Sense Configuration 0\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SENSE0_A { + #[doc = "0: No detection"] + NONE = 0, + #[doc = "1: Rising edge detection"] + RISE = 1, + #[doc = "2: Falling edge detection"] + FALL = 2, + #[doc = "3: Both edges detection"] + BOTH = 3, + #[doc = "4: High level detection"] + HIGH = 4, + #[doc = "5: Low level detection"] + LOW = 5, +} +impl From<SENSE0_A> for u8 { + #[inline(always)] + fn from(variant: SENSE0_A) -> Self { + variant as _ + } +} +#[doc = "Field `SENSE0` reader - Input Sense Configuration 0"] +pub struct SENSE0_R(crate::FieldReader<u8, SENSE0_A>); +impl SENSE0_R { + pub(crate) fn new(bits: u8) -> Self { + SENSE0_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<SENSE0_A> { + match self.bits { + 0 => Some(SENSE0_A::NONE), + 1 => Some(SENSE0_A::RISE), + 2 => Some(SENSE0_A::FALL), + 3 => Some(SENSE0_A::BOTH), + 4 => Some(SENSE0_A::HIGH), + 5 => Some(SENSE0_A::LOW), + _ => None, + } + } + #[doc = "Checks if the value of the field is `NONE`"] + #[inline(always)] + pub fn is_none(&self) -> bool { + **self == SENSE0_A::NONE + } + #[doc = "Checks if the value of the field is `RISE`"] + #[inline(always)] + pub fn is_rise(&self) -> bool { + **self == SENSE0_A::RISE + } + #[doc = "Checks if the value of the field is `FALL`"] + #[inline(always)] + pub fn is_fall(&self) -> bool { + **self == SENSE0_A::FALL + } + #[doc = "Checks if the value of the field is `BOTH`"] + #[inline(always)] + pub fn is_both(&self) -> bool { + **self == SENSE0_A::BOTH + } + #[doc = "Checks if the value of the field is `HIGH`"] + #[inline(always)] + pub fn is_high(&self) -> bool { + **self == SENSE0_A::HIGH + } + #[doc = "Checks if the value of the field is `LOW`"] + #[inline(always)] + pub fn is_low(&self) -> bool { + **self == SENSE0_A::LOW + } +} +impl core::ops::Deref for SENSE0_R { + type Target = crate::FieldReader<u8, SENSE0_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SENSE0` writer - Input Sense Configuration 0"] +pub struct SENSE0_W<'a> { + w: &'a mut W, +} +impl<'a> SENSE0_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SENSE0_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "No detection"] + #[inline(always)] + pub fn none(self) -> &'a mut W { + self.variant(SENSE0_A::NONE) + } + #[doc = "Rising edge detection"] + #[inline(always)] + pub fn rise(self) -> &'a mut W { + self.variant(SENSE0_A::RISE) + } + #[doc = "Falling edge detection"] + #[inline(always)] + pub fn fall(self) -> &'a mut W { + self.variant(SENSE0_A::FALL) + } + #[doc = "Both edges detection"] + #[inline(always)] + pub fn both(self) -> &'a mut W { + self.variant(SENSE0_A::BOTH) + } + #[doc = "High level detection"] + #[inline(always)] + pub fn high(self) -> &'a mut W { + self.variant(SENSE0_A::HIGH) + } + #[doc = "Low level detection"] + #[inline(always)] + pub fn low(self) -> &'a mut W { + self.variant(SENSE0_A::LOW) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); + self.w + } +} +#[doc = "Field `FILTEN0` reader - Filter Enable 0"] +pub struct FILTEN0_R(crate::FieldReader<bool, bool>); +impl FILTEN0_R { + pub(crate) fn new(bits: bool) -> Self { + FILTEN0_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FILTEN0_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FILTEN0` writer - Filter Enable 0"] +pub struct FILTEN0_W<'a> { + w: &'a mut W, +} +impl<'a> FILTEN0_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); + self.w + } +} +#[doc = "Input Sense Configuration 1\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SENSE1_A { + #[doc = "0: No detection"] + NONE = 0, + #[doc = "1: Rising edge detection"] + RISE = 1, + #[doc = "2: Falling edge detection"] + FALL = 2, + #[doc = "3: Both edges detection"] + BOTH = 3, + #[doc = "4: High level detection"] + HIGH = 4, + #[doc = "5: Low level detection"] + LOW = 5, +} +impl From<SENSE1_A> for u8 { + #[inline(always)] + fn from(variant: SENSE1_A) -> Self { + variant as _ + } +} +#[doc = "Field `SENSE1` reader - Input Sense Configuration 1"] +pub struct SENSE1_R(crate::FieldReader<u8, SENSE1_A>); +impl SENSE1_R { + pub(crate) fn new(bits: u8) -> Self { + SENSE1_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<SENSE1_A> { + match self.bits { + 0 => Some(SENSE1_A::NONE), + 1 => Some(SENSE1_A::RISE), + 2 => Some(SENSE1_A::FALL), + 3 => Some(SENSE1_A::BOTH), + 4 => Some(SENSE1_A::HIGH), + 5 => Some(SENSE1_A::LOW), + _ => None, + } + } + #[doc = "Checks if the value of the field is `NONE`"] + #[inline(always)] + pub fn is_none(&self) -> bool { + **self == SENSE1_A::NONE + } + #[doc = "Checks if the value of the field is `RISE`"] + #[inline(always)] + pub fn is_rise(&self) -> bool { + **self == SENSE1_A::RISE + } + #[doc = "Checks if the value of the field is `FALL`"] + #[inline(always)] + pub fn is_fall(&self) -> bool { + **self == SENSE1_A::FALL + } + #[doc = "Checks if the value of the field is `BOTH`"] + #[inline(always)] + pub fn is_both(&self) -> bool { + **self == SENSE1_A::BOTH + } + #[doc = "Checks if the value of the field is `HIGH`"] + #[inline(always)] + pub fn is_high(&self) -> bool { + **self == SENSE1_A::HIGH + } + #[doc = "Checks if the value of the field is `LOW`"] + #[inline(always)] + pub fn is_low(&self) -> bool { + **self == SENSE1_A::LOW + } +} +impl core::ops::Deref for SENSE1_R { + type Target = crate::FieldReader<u8, SENSE1_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SENSE1` writer - Input Sense Configuration 1"] +pub struct SENSE1_W<'a> { + w: &'a mut W, +} +impl<'a> SENSE1_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SENSE1_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "No detection"] + #[inline(always)] + pub fn none(self) -> &'a mut W { + self.variant(SENSE1_A::NONE) + } + #[doc = "Rising edge detection"] + #[inline(always)] + pub fn rise(self) -> &'a mut W { + self.variant(SENSE1_A::RISE) + } + #[doc = "Falling edge detection"] + #[inline(always)] + pub fn fall(self) -> &'a mut W { + self.variant(SENSE1_A::FALL) + } + #[doc = "Both edges detection"] + #[inline(always)] + pub fn both(self) -> &'a mut W { + self.variant(SENSE1_A::BOTH) + } + #[doc = "High level detection"] + #[inline(always)] + pub fn high(self) -> &'a mut W { + self.variant(SENSE1_A::HIGH) + } + #[doc = "Low level detection"] + #[inline(always)] + pub fn low(self) -> &'a mut W { + self.variant(SENSE1_A::LOW) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); + self.w + } +} +#[doc = "Field `FILTEN1` reader - Filter Enable 1"] +pub struct FILTEN1_R(crate::FieldReader<bool, bool>); +impl FILTEN1_R { + pub(crate) fn new(bits: bool) -> Self { + FILTEN1_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FILTEN1_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FILTEN1` writer - Filter Enable 1"] +pub struct FILTEN1_W<'a> { + w: &'a mut W, +} +impl<'a> FILTEN1_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); + self.w + } +} +#[doc = "Input Sense Configuration 2\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SENSE2_A { + #[doc = "0: No detection"] + NONE = 0, + #[doc = "1: Rising edge detection"] + RISE = 1, + #[doc = "2: Falling edge detection"] + FALL = 2, + #[doc = "3: Both edges detection"] + BOTH = 3, + #[doc = "4: High level detection"] + HIGH = 4, + #[doc = "5: Low level detection"] + LOW = 5, +} +impl From<SENSE2_A> for u8 { + #[inline(always)] + fn from(variant: SENSE2_A) -> Self { + variant as _ + } +} +#[doc = "Field `SENSE2` reader - Input Sense Configuration 2"] +pub struct SENSE2_R(crate::FieldReader<u8, SENSE2_A>); +impl SENSE2_R { + pub(crate) fn new(bits: u8) -> Self { + SENSE2_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<SENSE2_A> { + match self.bits { + 0 => Some(SENSE2_A::NONE), + 1 => Some(SENSE2_A::RISE), + 2 => Some(SENSE2_A::FALL), + 3 => Some(SENSE2_A::BOTH), + 4 => Some(SENSE2_A::HIGH), + 5 => Some(SENSE2_A::LOW), + _ => None, + } + } + #[doc = "Checks if the value of the field is `NONE`"] + #[inline(always)] + pub fn is_none(&self) -> bool { + **self == SENSE2_A::NONE + } + #[doc = "Checks if the value of the field is `RISE`"] + #[inline(always)] + pub fn is_rise(&self) -> bool { + **self == SENSE2_A::RISE + } + #[doc = "Checks if the value of the field is `FALL`"] + #[inline(always)] + pub fn is_fall(&self) -> bool { + **self == SENSE2_A::FALL + } + #[doc = "Checks if the value of the field is `BOTH`"] + #[inline(always)] + pub fn is_both(&self) -> bool { + **self == SENSE2_A::BOTH + } + #[doc = "Checks if the value of the field is `HIGH`"] + #[inline(always)] + pub fn is_high(&self) -> bool { + **self == SENSE2_A::HIGH + } + #[doc = "Checks if the value of the field is `LOW`"] + #[inline(always)] + pub fn is_low(&self) -> bool { + **self == SENSE2_A::LOW + } +} +impl core::ops::Deref for SENSE2_R { + type Target = crate::FieldReader<u8, SENSE2_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SENSE2` writer - Input Sense Configuration 2"] +pub struct SENSE2_W<'a> { + w: &'a mut W, +} +impl<'a> SENSE2_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SENSE2_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "No detection"] + #[inline(always)] + pub fn none(self) -> &'a mut W { + self.variant(SENSE2_A::NONE) + } + #[doc = "Rising edge detection"] + #[inline(always)] + pub fn rise(self) -> &'a mut W { + self.variant(SENSE2_A::RISE) + } + #[doc = "Falling edge detection"] + #[inline(always)] + pub fn fall(self) -> &'a mut W { + self.variant(SENSE2_A::FALL) + } + #[doc = "Both edges detection"] + #[inline(always)] + pub fn both(self) -> &'a mut W { + self.variant(SENSE2_A::BOTH) + } + #[doc = "High level detection"] + #[inline(always)] + pub fn high(self) -> &'a mut W { + self.variant(SENSE2_A::HIGH) + } + #[doc = "Low level detection"] + #[inline(always)] + pub fn low(self) -> &'a mut W { + self.variant(SENSE2_A::LOW) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 8)) | ((value as u32 & 0x07) << 8); + self.w + } +} +#[doc = "Field `FILTEN2` reader - Filter Enable 2"] +pub struct FILTEN2_R(crate::FieldReader<bool, bool>); +impl FILTEN2_R { + pub(crate) fn new(bits: bool) -> Self { + FILTEN2_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FILTEN2_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FILTEN2` writer - Filter Enable 2"] +pub struct FILTEN2_W<'a> { + w: &'a mut W, +} +impl<'a> FILTEN2_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); + self.w + } +} +#[doc = "Input Sense Configuration 3\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SENSE3_A { + #[doc = "0: No detection"] + NONE = 0, + #[doc = "1: Rising edge detection"] + RISE = 1, + #[doc = "2: Falling edge detection"] + FALL = 2, + #[doc = "3: Both edges detection"] + BOTH = 3, + #[doc = "4: High level detection"] + HIGH = 4, + #[doc = "5: Low level detection"] + LOW = 5, +} +impl From<SENSE3_A> for u8 { + #[inline(always)] + fn from(variant: SENSE3_A) -> Self { + variant as _ + } +} +#[doc = "Field `SENSE3` reader - Input Sense Configuration 3"] +pub struct SENSE3_R(crate::FieldReader<u8, SENSE3_A>); +impl SENSE3_R { + pub(crate) fn new(bits: u8) -> Self { + SENSE3_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<SENSE3_A> { + match self.bits { + 0 => Some(SENSE3_A::NONE), + 1 => Some(SENSE3_A::RISE), + 2 => Some(SENSE3_A::FALL), + 3 => Some(SENSE3_A::BOTH), + 4 => Some(SENSE3_A::HIGH), + 5 => Some(SENSE3_A::LOW), + _ => None, + } + } + #[doc = "Checks if the value of the field is `NONE`"] + #[inline(always)] + pub fn is_none(&self) -> bool { + **self == SENSE3_A::NONE + } + #[doc = "Checks if the value of the field is `RISE`"] + #[inline(always)] + pub fn is_rise(&self) -> bool { + **self == SENSE3_A::RISE + } + #[doc = "Checks if the value of the field is `FALL`"] + #[inline(always)] + pub fn is_fall(&self) -> bool { + **self == SENSE3_A::FALL + } + #[doc = "Checks if the value of the field is `BOTH`"] + #[inline(always)] + pub fn is_both(&self) -> bool { + **self == SENSE3_A::BOTH + } + #[doc = "Checks if the value of the field is `HIGH`"] + #[inline(always)] + pub fn is_high(&self) -> bool { + **self == SENSE3_A::HIGH + } + #[doc = "Checks if the value of the field is `LOW`"] + #[inline(always)] + pub fn is_low(&self) -> bool { + **self == SENSE3_A::LOW + } +} +impl core::ops::Deref for SENSE3_R { + type Target = crate::FieldReader<u8, SENSE3_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SENSE3` writer - Input Sense Configuration 3"] +pub struct SENSE3_W<'a> { + w: &'a mut W, +} +impl<'a> SENSE3_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SENSE3_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "No detection"] + #[inline(always)] + pub fn none(self) -> &'a mut W { + self.variant(SENSE3_A::NONE) + } + #[doc = "Rising edge detection"] + #[inline(always)] + pub fn rise(self) -> &'a mut W { + self.variant(SENSE3_A::RISE) + } + #[doc = "Falling edge detection"] + #[inline(always)] + pub fn fall(self) -> &'a mut W { + self.variant(SENSE3_A::FALL) + } + #[doc = "Both edges detection"] + #[inline(always)] + pub fn both(self) -> &'a mut W { + self.variant(SENSE3_A::BOTH) + } + #[doc = "High level detection"] + #[inline(always)] + pub fn high(self) -> &'a mut W { + self.variant(SENSE3_A::HIGH) + } + #[doc = "Low level detection"] + #[inline(always)] + pub fn low(self) -> &'a mut W { + self.variant(SENSE3_A::LOW) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); + self.w + } +} +#[doc = "Field `FILTEN3` reader - Filter Enable 3"] +pub struct FILTEN3_R(crate::FieldReader<bool, bool>); +impl FILTEN3_R { + pub(crate) fn new(bits: bool) -> Self { + FILTEN3_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FILTEN3_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FILTEN3` writer - Filter Enable 3"] +pub struct FILTEN3_W<'a> { + w: &'a mut W, +} +impl<'a> FILTEN3_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); + self.w + } +} +#[doc = "Input Sense Configuration 4\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SENSE4_A { + #[doc = "0: No detection"] + NONE = 0, + #[doc = "1: Rising edge detection"] + RISE = 1, + #[doc = "2: Falling edge detection"] + FALL = 2, + #[doc = "3: Both edges detection"] + BOTH = 3, + #[doc = "4: High level detection"] + HIGH = 4, + #[doc = "5: Low level detection"] + LOW = 5, +} +impl From<SENSE4_A> for u8 { + #[inline(always)] + fn from(variant: SENSE4_A) -> Self { + variant as _ + } +} +#[doc = "Field `SENSE4` reader - Input Sense Configuration 4"] +pub struct SENSE4_R(crate::FieldReader<u8, SENSE4_A>); +impl SENSE4_R { + pub(crate) fn new(bits: u8) -> Self { + SENSE4_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<SENSE4_A> { + match self.bits { + 0 => Some(SENSE4_A::NONE), + 1 => Some(SENSE4_A::RISE), + 2 => Some(SENSE4_A::FALL), + 3 => Some(SENSE4_A::BOTH), + 4 => Some(SENSE4_A::HIGH), + 5 => Some(SENSE4_A::LOW), + _ => None, + } + } + #[doc = "Checks if the value of the field is `NONE`"] + #[inline(always)] + pub fn is_none(&self) -> bool { + **self == SENSE4_A::NONE + } + #[doc = "Checks if the value of the field is `RISE`"] + #[inline(always)] + pub fn is_rise(&self) -> bool { + **self == SENSE4_A::RISE + } + #[doc = "Checks if the value of the field is `FALL`"] + #[inline(always)] + pub fn is_fall(&self) -> bool { + **self == SENSE4_A::FALL + } + #[doc = "Checks if the value of the field is `BOTH`"] + #[inline(always)] + pub fn is_both(&self) -> bool { + **self == SENSE4_A::BOTH + } + #[doc = "Checks if the value of the field is `HIGH`"] + #[inline(always)] + pub fn is_high(&self) -> bool { + **self == SENSE4_A::HIGH + } + #[doc = "Checks if the value of the field is `LOW`"] + #[inline(always)] + pub fn is_low(&self) -> bool { + **self == SENSE4_A::LOW + } +} +impl core::ops::Deref for SENSE4_R { + type Target = crate::FieldReader<u8, SENSE4_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SENSE4` writer - Input Sense Configuration 4"] +pub struct SENSE4_W<'a> { + w: &'a mut W, +} +impl<'a> SENSE4_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SENSE4_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "No detection"] + #[inline(always)] + pub fn none(self) -> &'a mut W { + self.variant(SENSE4_A::NONE) + } + #[doc = "Rising edge detection"] + #[inline(always)] + pub fn rise(self) -> &'a mut W { + self.variant(SENSE4_A::RISE) + } + #[doc = "Falling edge detection"] + #[inline(always)] + pub fn fall(self) -> &'a mut W { + self.variant(SENSE4_A::FALL) + } + #[doc = "Both edges detection"] + #[inline(always)] + pub fn both(self) -> &'a mut W { + self.variant(SENSE4_A::BOTH) + } + #[doc = "High level detection"] + #[inline(always)] + pub fn high(self) -> &'a mut W { + self.variant(SENSE4_A::HIGH) + } + #[doc = "Low level detection"] + #[inline(always)] + pub fn low(self) -> &'a mut W { + self.variant(SENSE4_A::LOW) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 16)) | ((value as u32 & 0x07) << 16); + self.w + } +} +#[doc = "Field `FILTEN4` reader - Filter Enable 4"] +pub struct FILTEN4_R(crate::FieldReader<bool, bool>); +impl FILTEN4_R { + pub(crate) fn new(bits: bool) -> Self { + FILTEN4_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FILTEN4_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FILTEN4` writer - Filter Enable 4"] +pub struct FILTEN4_W<'a> { + w: &'a mut W, +} +impl<'a> FILTEN4_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); + self.w + } +} +#[doc = "Input Sense Configuration 5\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SENSE5_A { + #[doc = "0: No detection"] + NONE = 0, + #[doc = "1: Rising edge detection"] + RISE = 1, + #[doc = "2: Falling edge detection"] + FALL = 2, + #[doc = "3: Both edges detection"] + BOTH = 3, + #[doc = "4: High level detection"] + HIGH = 4, + #[doc = "5: Low level detection"] + LOW = 5, +} +impl From<SENSE5_A> for u8 { + #[inline(always)] + fn from(variant: SENSE5_A) -> Self { + variant as _ + } +} +#[doc = "Field `SENSE5` reader - Input Sense Configuration 5"] +pub struct SENSE5_R(crate::FieldReader<u8, SENSE5_A>); +impl SENSE5_R { + pub(crate) fn new(bits: u8) -> Self { + SENSE5_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<SENSE5_A> { + match self.bits { + 0 => Some(SENSE5_A::NONE), + 1 => Some(SENSE5_A::RISE), + 2 => Some(SENSE5_A::FALL), + 3 => Some(SENSE5_A::BOTH), + 4 => Some(SENSE5_A::HIGH), + 5 => Some(SENSE5_A::LOW), + _ => None, + } + } + #[doc = "Checks if the value of the field is `NONE`"] + #[inline(always)] + pub fn is_none(&self) -> bool { + **self == SENSE5_A::NONE + } + #[doc = "Checks if the value of the field is `RISE`"] + #[inline(always)] + pub fn is_rise(&self) -> bool { + **self == SENSE5_A::RISE + } + #[doc = "Checks if the value of the field is `FALL`"] + #[inline(always)] + pub fn is_fall(&self) -> bool { + **self == SENSE5_A::FALL + } + #[doc = "Checks if the value of the field is `BOTH`"] + #[inline(always)] + pub fn is_both(&self) -> bool { + **self == SENSE5_A::BOTH + } + #[doc = "Checks if the value of the field is `HIGH`"] + #[inline(always)] + pub fn is_high(&self) -> bool { + **self == SENSE5_A::HIGH + } + #[doc = "Checks if the value of the field is `LOW`"] + #[inline(always)] + pub fn is_low(&self) -> bool { + **self == SENSE5_A::LOW + } +} +impl core::ops::Deref for SENSE5_R { + type Target = crate::FieldReader<u8, SENSE5_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SENSE5` writer - Input Sense Configuration 5"] +pub struct SENSE5_W<'a> { + w: &'a mut W, +} +impl<'a> SENSE5_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SENSE5_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "No detection"] + #[inline(always)] + pub fn none(self) -> &'a mut W { + self.variant(SENSE5_A::NONE) + } + #[doc = "Rising edge detection"] + #[inline(always)] + pub fn rise(self) -> &'a mut W { + self.variant(SENSE5_A::RISE) + } + #[doc = "Falling edge detection"] + #[inline(always)] + pub fn fall(self) -> &'a mut W { + self.variant(SENSE5_A::FALL) + } + #[doc = "Both edges detection"] + #[inline(always)] + pub fn both(self) -> &'a mut W { + self.variant(SENSE5_A::BOTH) + } + #[doc = "High level detection"] + #[inline(always)] + pub fn high(self) -> &'a mut W { + self.variant(SENSE5_A::HIGH) + } + #[doc = "Low level detection"] + #[inline(always)] + pub fn low(self) -> &'a mut W { + self.variant(SENSE5_A::LOW) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 20)) | ((value as u32 & 0x07) << 20); + self.w + } +} +#[doc = "Field `FILTEN5` reader - Filter Enable 5"] +pub struct FILTEN5_R(crate::FieldReader<bool, bool>); +impl FILTEN5_R { + pub(crate) fn new(bits: bool) -> Self { + FILTEN5_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FILTEN5_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FILTEN5` writer - Filter Enable 5"] +pub struct FILTEN5_W<'a> { + w: &'a mut W, +} +impl<'a> FILTEN5_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); + self.w + } +} +#[doc = "Input Sense Configuration 6\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SENSE6_A { + #[doc = "0: No detection"] + NONE = 0, + #[doc = "1: Rising edge detection"] + RISE = 1, + #[doc = "2: Falling edge detection"] + FALL = 2, + #[doc = "3: Both edges detection"] + BOTH = 3, + #[doc = "4: High level detection"] + HIGH = 4, + #[doc = "5: Low level detection"] + LOW = 5, +} +impl From<SENSE6_A> for u8 { + #[inline(always)] + fn from(variant: SENSE6_A) -> Self { + variant as _ + } +} +#[doc = "Field `SENSE6` reader - Input Sense Configuration 6"] +pub struct SENSE6_R(crate::FieldReader<u8, SENSE6_A>); +impl SENSE6_R { + pub(crate) fn new(bits: u8) -> Self { + SENSE6_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<SENSE6_A> { + match self.bits { + 0 => Some(SENSE6_A::NONE), + 1 => Some(SENSE6_A::RISE), + 2 => Some(SENSE6_A::FALL), + 3 => Some(SENSE6_A::BOTH), + 4 => Some(SENSE6_A::HIGH), + 5 => Some(SENSE6_A::LOW), + _ => None, + } + } + #[doc = "Checks if the value of the field is `NONE`"] + #[inline(always)] + pub fn is_none(&self) -> bool { + **self == SENSE6_A::NONE + } + #[doc = "Checks if the value of the field is `RISE`"] + #[inline(always)] + pub fn is_rise(&self) -> bool { + **self == SENSE6_A::RISE + } + #[doc = "Checks if the value of the field is `FALL`"] + #[inline(always)] + pub fn is_fall(&self) -> bool { + **self == SENSE6_A::FALL + } + #[doc = "Checks if the value of the field is `BOTH`"] + #[inline(always)] + pub fn is_both(&self) -> bool { + **self == SENSE6_A::BOTH + } + #[doc = "Checks if the value of the field is `HIGH`"] + #[inline(always)] + pub fn is_high(&self) -> bool { + **self == SENSE6_A::HIGH + } + #[doc = "Checks if the value of the field is `LOW`"] + #[inline(always)] + pub fn is_low(&self) -> bool { + **self == SENSE6_A::LOW + } +} +impl core::ops::Deref for SENSE6_R { + type Target = crate::FieldReader<u8, SENSE6_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SENSE6` writer - Input Sense Configuration 6"] +pub struct SENSE6_W<'a> { + w: &'a mut W, +} +impl<'a> SENSE6_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SENSE6_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "No detection"] + #[inline(always)] + pub fn none(self) -> &'a mut W { + self.variant(SENSE6_A::NONE) + } + #[doc = "Rising edge detection"] + #[inline(always)] + pub fn rise(self) -> &'a mut W { + self.variant(SENSE6_A::RISE) + } + #[doc = "Falling edge detection"] + #[inline(always)] + pub fn fall(self) -> &'a mut W { + self.variant(SENSE6_A::FALL) + } + #[doc = "Both edges detection"] + #[inline(always)] + pub fn both(self) -> &'a mut W { + self.variant(SENSE6_A::BOTH) + } + #[doc = "High level detection"] + #[inline(always)] + pub fn high(self) -> &'a mut W { + self.variant(SENSE6_A::HIGH) + } + #[doc = "Low level detection"] + #[inline(always)] + pub fn low(self) -> &'a mut W { + self.variant(SENSE6_A::LOW) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 24)) | ((value as u32 & 0x07) << 24); + self.w + } +} +#[doc = "Field `FILTEN6` reader - Filter Enable 6"] +pub struct FILTEN6_R(crate::FieldReader<bool, bool>); +impl FILTEN6_R { + pub(crate) fn new(bits: bool) -> Self { + FILTEN6_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FILTEN6_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FILTEN6` writer - Filter Enable 6"] +pub struct FILTEN6_W<'a> { + w: &'a mut W, +} +impl<'a> FILTEN6_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); + self.w + } +} +#[doc = "Input Sense Configuration 7\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SENSE7_A { + #[doc = "0: No detection"] + NONE = 0, + #[doc = "1: Rising edge detection"] + RISE = 1, + #[doc = "2: Falling edge detection"] + FALL = 2, + #[doc = "3: Both edges detection"] + BOTH = 3, + #[doc = "4: High level detection"] + HIGH = 4, + #[doc = "5: Low level detection"] + LOW = 5, +} +impl From<SENSE7_A> for u8 { + #[inline(always)] + fn from(variant: SENSE7_A) -> Self { + variant as _ + } +} +#[doc = "Field `SENSE7` reader - Input Sense Configuration 7"] +pub struct SENSE7_R(crate::FieldReader<u8, SENSE7_A>); +impl SENSE7_R { + pub(crate) fn new(bits: u8) -> Self { + SENSE7_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<SENSE7_A> { + match self.bits { + 0 => Some(SENSE7_A::NONE), + 1 => Some(SENSE7_A::RISE), + 2 => Some(SENSE7_A::FALL), + 3 => Some(SENSE7_A::BOTH), + 4 => Some(SENSE7_A::HIGH), + 5 => Some(SENSE7_A::LOW), + _ => None, + } + } + #[doc = "Checks if the value of the field is `NONE`"] + #[inline(always)] + pub fn is_none(&self) -> bool { + **self == SENSE7_A::NONE + } + #[doc = "Checks if the value of the field is `RISE`"] + #[inline(always)] + pub fn is_rise(&self) -> bool { + **self == SENSE7_A::RISE + } + #[doc = "Checks if the value of the field is `FALL`"] + #[inline(always)] + pub fn is_fall(&self) -> bool { + **self == SENSE7_A::FALL + } + #[doc = "Checks if the value of the field is `BOTH`"] + #[inline(always)] + pub fn is_both(&self) -> bool { + **self == SENSE7_A::BOTH + } + #[doc = "Checks if the value of the field is `HIGH`"] + #[inline(always)] + pub fn is_high(&self) -> bool { + **self == SENSE7_A::HIGH + } + #[doc = "Checks if the value of the field is `LOW`"] + #[inline(always)] + pub fn is_low(&self) -> bool { + **self == SENSE7_A::LOW + } +} +impl core::ops::Deref for SENSE7_R { + type Target = crate::FieldReader<u8, SENSE7_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SENSE7` writer - Input Sense Configuration 7"] +pub struct SENSE7_W<'a> { + w: &'a mut W, +} +impl<'a> SENSE7_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SENSE7_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "No detection"] + #[inline(always)] + pub fn none(self) -> &'a mut W { + self.variant(SENSE7_A::NONE) + } + #[doc = "Rising edge detection"] + #[inline(always)] + pub fn rise(self) -> &'a mut W { + self.variant(SENSE7_A::RISE) + } + #[doc = "Falling edge detection"] + #[inline(always)] + pub fn fall(self) -> &'a mut W { + self.variant(SENSE7_A::FALL) + } + #[doc = "Both edges detection"] + #[inline(always)] + pub fn both(self) -> &'a mut W { + self.variant(SENSE7_A::BOTH) + } + #[doc = "High level detection"] + #[inline(always)] + pub fn high(self) -> &'a mut W { + self.variant(SENSE7_A::HIGH) + } + #[doc = "Low level detection"] + #[inline(always)] + pub fn low(self) -> &'a mut W { + self.variant(SENSE7_A::LOW) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 28)) | ((value as u32 & 0x07) << 28); + self.w + } +} +#[doc = "Field `FILTEN7` reader - Filter Enable 7"] +pub struct FILTEN7_R(crate::FieldReader<bool, bool>); +impl FILTEN7_R { + pub(crate) fn new(bits: bool) -> Self { + FILTEN7_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FILTEN7_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FILTEN7` writer - Filter Enable 7"] +pub struct FILTEN7_W<'a> { + w: &'a mut W, +} +impl<'a> FILTEN7_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); + self.w + } +} +impl R { + #[doc = "Bits 0:2 - Input Sense Configuration 0"] + #[inline(always)] + pub fn sense0(&self) -> SENSE0_R { + SENSE0_R::new((self.bits & 0x07) as u8) + } + #[doc = "Bit 3 - Filter Enable 0"] + #[inline(always)] + pub fn filten0(&self) -> FILTEN0_R { + FILTEN0_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bits 4:6 - Input Sense Configuration 1"] + #[inline(always)] + pub fn sense1(&self) -> SENSE1_R { + SENSE1_R::new(((self.bits >> 4) & 0x07) as u8) + } + #[doc = "Bit 7 - Filter Enable 1"] + #[inline(always)] + pub fn filten1(&self) -> FILTEN1_R { + FILTEN1_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bits 8:10 - Input Sense Configuration 2"] + #[inline(always)] + pub fn sense2(&self) -> SENSE2_R { + SENSE2_R::new(((self.bits >> 8) & 0x07) as u8) + } + #[doc = "Bit 11 - Filter Enable 2"] + #[inline(always)] + pub fn filten2(&self) -> FILTEN2_R { + FILTEN2_R::new(((self.bits >> 11) & 0x01) != 0) + } + #[doc = "Bits 12:14 - Input Sense Configuration 3"] + #[inline(always)] + pub fn sense3(&self) -> SENSE3_R { + SENSE3_R::new(((self.bits >> 12) & 0x07) as u8) + } + #[doc = "Bit 15 - Filter Enable 3"] + #[inline(always)] + pub fn filten3(&self) -> FILTEN3_R { + FILTEN3_R::new(((self.bits >> 15) & 0x01) != 0) + } + #[doc = "Bits 16:18 - Input Sense Configuration 4"] + #[inline(always)] + pub fn sense4(&self) -> SENSE4_R { + SENSE4_R::new(((self.bits >> 16) & 0x07) as u8) + } + #[doc = "Bit 19 - Filter Enable 4"] + #[inline(always)] + pub fn filten4(&self) -> FILTEN4_R { + FILTEN4_R::new(((self.bits >> 19) & 0x01) != 0) + } + #[doc = "Bits 20:22 - Input Sense Configuration 5"] + #[inline(always)] + pub fn sense5(&self) -> SENSE5_R { + SENSE5_R::new(((self.bits >> 20) & 0x07) as u8) + } + #[doc = "Bit 23 - Filter Enable 5"] + #[inline(always)] + pub fn filten5(&self) -> FILTEN5_R { + FILTEN5_R::new(((self.bits >> 23) & 0x01) != 0) + } + #[doc = "Bits 24:26 - Input Sense Configuration 6"] + #[inline(always)] + pub fn sense6(&self) -> SENSE6_R { + SENSE6_R::new(((self.bits >> 24) & 0x07) as u8) + } + #[doc = "Bit 27 - Filter Enable 6"] + #[inline(always)] + pub fn filten6(&self) -> FILTEN6_R { + FILTEN6_R::new(((self.bits >> 27) & 0x01) != 0) + } + #[doc = "Bits 28:30 - Input Sense Configuration 7"] + #[inline(always)] + pub fn sense7(&self) -> SENSE7_R { + SENSE7_R::new(((self.bits >> 28) & 0x07) as u8) + } + #[doc = "Bit 31 - Filter Enable 7"] + #[inline(always)] + pub fn filten7(&self) -> FILTEN7_R { + FILTEN7_R::new(((self.bits >> 31) & 0x01) != 0) + } +} +impl W { + #[doc = "Bits 0:2 - Input Sense Configuration 0"] + #[inline(always)] + pub fn sense0(&mut self) -> SENSE0_W { + SENSE0_W { w: self } + } + #[doc = "Bit 3 - Filter Enable 0"] + #[inline(always)] + pub fn filten0(&mut self) -> FILTEN0_W { + FILTEN0_W { w: self } + } + #[doc = "Bits 4:6 - Input Sense Configuration 1"] + #[inline(always)] + pub fn sense1(&mut self) -> SENSE1_W { + SENSE1_W { w: self } + } + #[doc = "Bit 7 - Filter Enable 1"] + #[inline(always)] + pub fn filten1(&mut self) -> FILTEN1_W { + FILTEN1_W { w: self } + } + #[doc = "Bits 8:10 - Input Sense Configuration 2"] + #[inline(always)] + pub fn sense2(&mut self) -> SENSE2_W { + SENSE2_W { w: self } + } + #[doc = "Bit 11 - Filter Enable 2"] + #[inline(always)] + pub fn filten2(&mut self) -> FILTEN2_W { + FILTEN2_W { w: self } + } + #[doc = "Bits 12:14 - Input Sense Configuration 3"] + #[inline(always)] + pub fn sense3(&mut self) -> SENSE3_W { + SENSE3_W { w: self } + } + #[doc = "Bit 15 - Filter Enable 3"] + #[inline(always)] + pub fn filten3(&mut self) -> FILTEN3_W { + FILTEN3_W { w: self } + } + #[doc = "Bits 16:18 - Input Sense Configuration 4"] + #[inline(always)] + pub fn sense4(&mut self) -> SENSE4_W { + SENSE4_W { w: self } + } + #[doc = "Bit 19 - Filter Enable 4"] + #[inline(always)] + pub fn filten4(&mut self) -> FILTEN4_W { + FILTEN4_W { w: self } + } + #[doc = "Bits 20:22 - Input Sense Configuration 5"] + #[inline(always)] + pub fn sense5(&mut self) -> SENSE5_W { + SENSE5_W { w: self } + } + #[doc = "Bit 23 - Filter Enable 5"] + #[inline(always)] + pub fn filten5(&mut self) -> FILTEN5_W { + FILTEN5_W { w: self } + } + #[doc = "Bits 24:26 - Input Sense Configuration 6"] + #[inline(always)] + pub fn sense6(&mut self) -> SENSE6_W { + SENSE6_W { w: self } + } + #[doc = "Bit 27 - Filter Enable 6"] + #[inline(always)] + pub fn filten6(&mut self) -> FILTEN6_W { + FILTEN6_W { w: self } + } + #[doc = "Bits 28:30 - Input Sense Configuration 7"] + #[inline(always)] + pub fn sense7(&mut self) -> SENSE7_W { + SENSE7_W { w: self } + } + #[doc = "Bit 31 - Filter Enable 7"] + #[inline(always)] + pub fn filten7(&mut self) -> FILTEN7_W { + FILTEN7_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "External Interrupt Sense Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [config](index.html) module"] +pub struct CONFIG_SPEC; +impl crate::RegisterSpec for CONFIG_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [config::R](R) reader structure"] +impl crate::Readable for CONFIG_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [config::W](W) writer structure"] +impl crate::Writable for CONFIG_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CONFIG[%s] +to value 0"] +impl crate::Resettable for CONFIG_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/eic/ctrla.rs b/src/eic/ctrla.rs new file mode 100644 index 0000000..3cc4ce0 --- /dev/null +++ b/src/eic/ctrla.rs @@ -0,0 +1,251 @@ +#[doc = "Register `CTRLA` reader"] +pub struct R(crate::R<CTRLA_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CTRLA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CTRLA_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CTRLA_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `CTRLA` writer"] +pub struct W(crate::W<CTRLA_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<CTRLA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<CTRLA_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<CTRLA_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `SWRST` reader - Software Reset"] +pub struct SWRST_R(crate::FieldReader<bool, bool>); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SWRST` writer - Software Reset"] +pub struct SWRST_W<'a> { + w: &'a mut W, +} +impl<'a> SWRST_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +#[doc = "Field `ENABLE` reader - Enable"] +pub struct ENABLE_R(crate::FieldReader<bool, bool>); +impl ENABLE_R { + pub(crate) fn new(bits: bool) -> Self { + ENABLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENABLE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENABLE` writer - Enable"] +pub struct ENABLE_W<'a> { + w: &'a mut W, +} +impl<'a> ENABLE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1); + self.w + } +} +#[doc = "Clock Selection\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum CKSEL_A { + #[doc = "0: Clocked by GCLK"] + CLK_GCLK = 0, + #[doc = "1: Clocked by ULP32K"] + CLK_ULP32K = 1, +} +impl From<CKSEL_A> for bool { + #[inline(always)] + fn from(variant: CKSEL_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `CKSEL` reader - Clock Selection"] +pub struct CKSEL_R(crate::FieldReader<bool, CKSEL_A>); +impl CKSEL_R { + pub(crate) fn new(bits: bool) -> Self { + CKSEL_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> CKSEL_A { + match self.bits { + false => CKSEL_A::CLK_GCLK, + true => CKSEL_A::CLK_ULP32K, + } + } + #[doc = "Checks if the value of the field is `CLK_GCLK`"] + #[inline(always)] + pub fn is_clk_gclk(&self) -> bool { + **self == CKSEL_A::CLK_GCLK + } + #[doc = "Checks if the value of the field is `CLK_ULP32K`"] + #[inline(always)] + pub fn is_clk_ulp32k(&self) -> bool { + **self == CKSEL_A::CLK_ULP32K + } +} +impl core::ops::Deref for CKSEL_R { + type Target = crate::FieldReader<bool, CKSEL_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CKSEL` writer - Clock Selection"] +pub struct CKSEL_W<'a> { + w: &'a mut W, +} +impl<'a> CKSEL_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: CKSEL_A) -> &'a mut W { + self.bit(variant.into()) + } + #[doc = "Clocked by GCLK"] + #[inline(always)] + pub fn clk_gclk(self) -> &'a mut W { + self.variant(CKSEL_A::CLK_GCLK) + } + #[doc = "Clocked by ULP32K"] + #[inline(always)] + pub fn clk_ulp32k(self) -> &'a mut W { + self.variant(CKSEL_A::CLK_ULP32K) + } + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4); + self.w + } +} +impl R { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Enable"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 4 - Clock Selection"] + #[inline(always)] + pub fn cksel(&self) -> CKSEL_R { + CKSEL_R::new(((self.bits >> 4) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&mut self) -> SWRST_W { + SWRST_W { w: self } + } + #[doc = "Bit 1 - Enable"] + #[inline(always)] + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W { w: self } + } + #[doc = "Bit 4 - Clock Selection"] + #[inline(always)] + pub fn cksel(&mut self) -> CKSEL_W { + CKSEL_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"] +pub struct CTRLA_SPEC; +impl crate::RegisterSpec for CTRLA_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [ctrla::R](R) reader structure"] +impl crate::Readable for CTRLA_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"] +impl crate::Writable for CTRLA_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CTRLA to value 0"] +impl crate::Resettable for CTRLA_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/eic/debouncen.rs b/src/eic/debouncen.rs new file mode 100644 index 0000000..d6d1953 --- /dev/null +++ b/src/eic/debouncen.rs @@ -0,0 +1,102 @@ +#[doc = "Register `DEBOUNCEN` reader"] +pub struct R(crate::R<DEBOUNCEN_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<DEBOUNCEN_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<DEBOUNCEN_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<DEBOUNCEN_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `DEBOUNCEN` writer"] +pub struct W(crate::W<DEBOUNCEN_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<DEBOUNCEN_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<DEBOUNCEN_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<DEBOUNCEN_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `DEBOUNCEN` reader - Debouncer Enable"] +pub struct DEBOUNCEN_R(crate::FieldReader<u16, u16>); +impl DEBOUNCEN_R { + pub(crate) fn new(bits: u16) -> Self { + DEBOUNCEN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DEBOUNCEN_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DEBOUNCEN` writer - Debouncer Enable"] +pub struct DEBOUNCEN_W<'a> { + w: &'a mut W, +} +impl<'a> DEBOUNCEN_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - Debouncer Enable"] + #[inline(always)] + pub fn debouncen(&self) -> DEBOUNCEN_R { + DEBOUNCEN_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - Debouncer Enable"] + #[inline(always)] + pub fn debouncen(&mut self) -> DEBOUNCEN_W { + DEBOUNCEN_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Debouncer Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [debouncen](index.html) module"] +pub struct DEBOUNCEN_SPEC; +impl crate::RegisterSpec for DEBOUNCEN_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [debouncen::R](R) reader structure"] +impl crate::Readable for DEBOUNCEN_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [debouncen::W](W) writer structure"] +impl crate::Writable for DEBOUNCEN_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets DEBOUNCEN to value 0"] +impl crate::Resettable for DEBOUNCEN_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/eic/dprescaler.rs b/src/eic/dprescaler.rs new file mode 100644 index 0000000..2bfbc46 --- /dev/null +++ b/src/eic/dprescaler.rs @@ -0,0 +1,671 @@ +#[doc = "Register `DPRESCALER` reader"] +pub struct R(crate::R<DPRESCALER_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<DPRESCALER_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<DPRESCALER_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<DPRESCALER_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `DPRESCALER` writer"] +pub struct W(crate::W<DPRESCALER_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<DPRESCALER_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<DPRESCALER_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<DPRESCALER_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Debouncer Prescaler\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum PRESCALER0_A { + #[doc = "0: EIC clock divided by 2"] + DIV2 = 0, + #[doc = "1: EIC clock divided by 4"] + DIV4 = 1, + #[doc = "2: EIC clock divided by 8"] + DIV8 = 2, + #[doc = "3: EIC clock divided by 16"] + DIV16 = 3, + #[doc = "4: EIC clock divided by 32"] + DIV32 = 4, + #[doc = "5: EIC clock divided by 64"] + DIV64 = 5, + #[doc = "6: EIC clock divided by 128"] + DIV128 = 6, + #[doc = "7: EIC clock divided by 256"] + DIV256 = 7, +} +impl From<PRESCALER0_A> for u8 { + #[inline(always)] + fn from(variant: PRESCALER0_A) -> Self { + variant as _ + } +} +#[doc = "Field `PRESCALER0` reader - Debouncer Prescaler"] +pub struct PRESCALER0_R(crate::FieldReader<u8, PRESCALER0_A>); +impl PRESCALER0_R { + pub(crate) fn new(bits: u8) -> Self { + PRESCALER0_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> PRESCALER0_A { + match self.bits { + 0 => PRESCALER0_A::DIV2, + 1 => PRESCALER0_A::DIV4, + 2 => PRESCALER0_A::DIV8, + 3 => PRESCALER0_A::DIV16, + 4 => PRESCALER0_A::DIV32, + 5 => PRESCALER0_A::DIV64, + 6 => PRESCALER0_A::DIV128, + 7 => PRESCALER0_A::DIV256, + _ => unreachable!(), + } + } + #[doc = "Checks if the value of the field is `DIV2`"] + #[inline(always)] + pub fn is_div2(&self) -> bool { + **self == PRESCALER0_A::DIV2 + } + #[doc = "Checks if the value of the field is `DIV4`"] + #[inline(always)] + pub fn is_div4(&self) -> bool { + **self == PRESCALER0_A::DIV4 + } + #[doc = "Checks if the value of the field is `DIV8`"] + #[inline(always)] + pub fn is_div8(&self) -> bool { + **self == PRESCALER0_A::DIV8 + } + #[doc = "Checks if the value of the field is `DIV16`"] + #[inline(always)] + pub fn is_div16(&self) -> bool { + **self == PRESCALER0_A::DIV16 + } + #[doc = "Checks if the value of the field is `DIV32`"] + #[inline(always)] + pub fn is_div32(&self) -> bool { + **self == PRESCALER0_A::DIV32 + } + #[doc = "Checks if the value of the field is `DIV64`"] + #[inline(always)] + pub fn is_div64(&self) -> bool { + **self == PRESCALER0_A::DIV64 + } + #[doc = "Checks if the value of the field is `DIV128`"] + #[inline(always)] + pub fn is_div128(&self) -> bool { + **self == PRESCALER0_A::DIV128 + } + #[doc = "Checks if the value of the field is `DIV256`"] + #[inline(always)] + pub fn is_div256(&self) -> bool { + **self == PRESCALER0_A::DIV256 + } +} +impl core::ops::Deref for PRESCALER0_R { + type Target = crate::FieldReader<u8, PRESCALER0_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PRESCALER0` writer - Debouncer Prescaler"] +pub struct PRESCALER0_W<'a> { + w: &'a mut W, +} +impl<'a> PRESCALER0_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: PRESCALER0_A) -> &'a mut W { + self.bits(variant.into()) + } + #[doc = "EIC clock divided by 2"] + #[inline(always)] + pub fn div2(self) -> &'a mut W { + self.variant(PRESCALER0_A::DIV2) + } + #[doc = "EIC clock divided by 4"] + #[inline(always)] + pub fn div4(self) -> &'a mut W { + self.variant(PRESCALER0_A::DIV4) + } + #[doc = "EIC clock divided by 8"] + #[inline(always)] + pub fn div8(self) -> &'a mut W { + self.variant(PRESCALER0_A::DIV8) + } + #[doc = "EIC clock divided by 16"] + #[inline(always)] + pub fn div16(self) -> &'a mut W { + self.variant(PRESCALER0_A::DIV16) + } + #[doc = "EIC clock divided by 32"] + #[inline(always)] + pub fn div32(self) -> &'a mut W { + self.variant(PRESCALER0_A::DIV32) + } + #[doc = "EIC clock divided by 64"] + #[inline(always)] + pub fn div64(self) -> &'a mut W { + self.variant(PRESCALER0_A::DIV64) + } + #[doc = "EIC clock divided by 128"] + #[inline(always)] + pub fn div128(self) -> &'a mut W { + self.variant(PRESCALER0_A::DIV128) + } + #[doc = "EIC clock divided by 256"] + #[inline(always)] + pub fn div256(self) -> &'a mut W { + self.variant(PRESCALER0_A::DIV256) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); + self.w + } +} +#[doc = "Debouncer number of states\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum STATES0_A { + #[doc = "0: 3 low frequency samples"] + LFREQ3 = 0, + #[doc = "1: 7 low frequency samples"] + LFREQ7 = 1, +} +impl From<STATES0_A> for bool { + #[inline(always)] + fn from(variant: STATES0_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `STATES0` reader - Debouncer number of states"] +pub struct STATES0_R(crate::FieldReader<bool, STATES0_A>); +impl STATES0_R { + pub(crate) fn new(bits: bool) -> Self { + STATES0_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> STATES0_A { + match self.bits { + false => STATES0_A::LFREQ3, + true => STATES0_A::LFREQ7, + } + } + #[doc = "Checks if the value of the field is `LFREQ3`"] + #[inline(always)] + pub fn is_lfreq3(&self) -> bool { + **self == STATES0_A::LFREQ3 + } + #[doc = "Checks if the value of the field is `LFREQ7`"] + #[inline(always)] + pub fn is_lfreq7(&self) -> bool { + **self == STATES0_A::LFREQ7 + } +} +impl core::ops::Deref for STATES0_R { + type Target = crate::FieldReader<bool, STATES0_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `STATES0` writer - Debouncer number of states"] +pub struct STATES0_W<'a> { + w: &'a mut W, +} +impl<'a> STATES0_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: STATES0_A) -> &'a mut W { + self.bit(variant.into()) + } + #[doc = "3 low frequency samples"] + #[inline(always)] + pub fn lfreq3(self) -> &'a mut W { + self.variant(STATES0_A::LFREQ3) + } + #[doc = "7 low frequency samples"] + #[inline(always)] + pub fn lfreq7(self) -> &'a mut W { + self.variant(STATES0_A::LFREQ7) + } + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); + self.w + } +} +#[doc = "Debouncer Prescaler\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum PRESCALER1_A { + #[doc = "0: EIC clock divided by 2"] + DIV2 = 0, + #[doc = "1: EIC clock divided by 4"] + DIV4 = 1, + #[doc = "2: EIC clock divided by 8"] + DIV8 = 2, + #[doc = "3: EIC clock divided by 16"] + DIV16 = 3, + #[doc = "4: EIC clock divided by 32"] + DIV32 = 4, + #[doc = "5: EIC clock divided by 64"] + DIV64 = 5, + #[doc = "6: EIC clock divided by 128"] + DIV128 = 6, + #[doc = "7: EIC clock divided by 256"] + DIV256 = 7, +} +impl From<PRESCALER1_A> for u8 { + #[inline(always)] + fn from(variant: PRESCALER1_A) -> Self { + variant as _ + } +} +#[doc = "Field `PRESCALER1` reader - Debouncer Prescaler"] +pub struct PRESCALER1_R(crate::FieldReader<u8, PRESCALER1_A>); +impl PRESCALER1_R { + pub(crate) fn new(bits: u8) -> Self { + PRESCALER1_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> PRESCALER1_A { + match self.bits { + 0 => PRESCALER1_A::DIV2, + 1 => PRESCALER1_A::DIV4, + 2 => PRESCALER1_A::DIV8, + 3 => PRESCALER1_A::DIV16, + 4 => PRESCALER1_A::DIV32, + 5 => PRESCALER1_A::DIV64, + 6 => PRESCALER1_A::DIV128, + 7 => PRESCALER1_A::DIV256, + _ => unreachable!(), + } + } + #[doc = "Checks if the value of the field is `DIV2`"] + #[inline(always)] + pub fn is_div2(&self) -> bool { + **self == PRESCALER1_A::DIV2 + } + #[doc = "Checks if the value of the field is `DIV4`"] + #[inline(always)] + pub fn is_div4(&self) -> bool { + **self == PRESCALER1_A::DIV4 + } + #[doc = "Checks if the value of the field is `DIV8`"] + #[inline(always)] + pub fn is_div8(&self) -> bool { + **self == PRESCALER1_A::DIV8 + } + #[doc = "Checks if the value of the field is `DIV16`"] + #[inline(always)] + pub fn is_div16(&self) -> bool { + **self == PRESCALER1_A::DIV16 + } + #[doc = "Checks if the value of the field is `DIV32`"] + #[inline(always)] + pub fn is_div32(&self) -> bool { + **self == PRESCALER1_A::DIV32 + } + #[doc = "Checks if the value of the field is `DIV64`"] + #[inline(always)] + pub fn is_div64(&self) -> bool { + **self == PRESCALER1_A::DIV64 + } + #[doc = "Checks if the value of the field is `DIV128`"] + #[inline(always)] + pub fn is_div128(&self) -> bool { + **self == PRESCALER1_A::DIV128 + } + #[doc = "Checks if the value of the field is `DIV256`"] + #[inline(always)] + pub fn is_div256(&self) -> bool { + **self == PRESCALER1_A::DIV256 + } +} +impl core::ops::Deref for PRESCALER1_R { + type Target = crate::FieldReader<u8, PRESCALER1_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PRESCALER1` writer - Debouncer Prescaler"] +pub struct PRESCALER1_W<'a> { + w: &'a mut W, +} +impl<'a> PRESCALER1_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: PRESCALER1_A) -> &'a mut W { + self.bits(variant.into()) + } + #[doc = "EIC clock divided by 2"] + #[inline(always)] + pub fn div2(self) -> &'a mut W { + self.variant(PRESCALER1_A::DIV2) + } + #[doc = "EIC clock divided by 4"] + #[inline(always)] + pub fn div4(self) -> &'a mut W { + self.variant(PRESCALER1_A::DIV4) + } + #[doc = "EIC clock divided by 8"] + #[inline(always)] + pub fn div8(self) -> &'a mut W { + self.variant(PRESCALER1_A::DIV8) + } + #[doc = "EIC clock divided by 16"] + #[inline(always)] + pub fn div16(self) -> &'a mut W { + self.variant(PRESCALER1_A::DIV16) + } + #[doc = "EIC clock divided by 32"] + #[inline(always)] + pub fn div32(self) -> &'a mut W { + self.variant(PRESCALER1_A::DIV32) + } + #[doc = "EIC clock divided by 64"] + #[inline(always)] + pub fn div64(self) -> &'a mut W { + self.variant(PRESCALER1_A::DIV64) + } + #[doc = "EIC clock divided by 128"] + #[inline(always)] + pub fn div128(self) -> &'a mut W { + self.variant(PRESCALER1_A::DIV128) + } + #[doc = "EIC clock divided by 256"] + #[inline(always)] + pub fn div256(self) -> &'a mut W { + self.variant(PRESCALER1_A::DIV256) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); + self.w + } +} +#[doc = "Debouncer number of states\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum STATES1_A { + #[doc = "0: 3 low frequency samples"] + LFREQ3 = 0, + #[doc = "1: 7 low frequency samples"] + LFREQ7 = 1, +} +impl From<STATES1_A> for bool { + #[inline(always)] + fn from(variant: STATES1_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `STATES1` reader - Debouncer number of states"] +pub struct STATES1_R(crate::FieldReader<bool, STATES1_A>); +impl STATES1_R { + pub(crate) fn new(bits: bool) -> Self { + STATES1_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> STATES1_A { + match self.bits { + false => STATES1_A::LFREQ3, + true => STATES1_A::LFREQ7, + } + } + #[doc = "Checks if the value of the field is `LFREQ3`"] + #[inline(always)] + pub fn is_lfreq3(&self) -> bool { + **self == STATES1_A::LFREQ3 + } + #[doc = "Checks if the value of the field is `LFREQ7`"] + #[inline(always)] + pub fn is_lfreq7(&self) -> bool { + **self == STATES1_A::LFREQ7 + } +} +impl core::ops::Deref for STATES1_R { + type Target = crate::FieldReader<bool, STATES1_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `STATES1` writer - Debouncer number of states"] +pub struct STATES1_W<'a> { + w: &'a mut W, +} +impl<'a> STATES1_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: STATES1_A) -> &'a mut W { + self.bit(variant.into()) + } + #[doc = "3 low frequency samples"] + #[inline(always)] + pub fn lfreq3(self) -> &'a mut W { + self.variant(STATES1_A::LFREQ3) + } + #[doc = "7 low frequency samples"] + #[inline(always)] + pub fn lfreq7(self) -> &'a mut W { + self.variant(STATES1_A::LFREQ7) + } + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); + self.w + } +} +#[doc = "Pin Sampler frequency selection\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum TICKON_A { + #[doc = "0: Clocked by GCLK"] + CLK_GCLK_EIC = 0, + #[doc = "1: Clocked by Low Frequency Clock"] + CLK_LFREQ = 1, +} +impl From<TICKON_A> for bool { + #[inline(always)] + fn from(variant: TICKON_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `TICKON` reader - Pin Sampler frequency selection"] +pub struct TICKON_R(crate::FieldReader<bool, TICKON_A>); +impl TICKON_R { + pub(crate) fn new(bits: bool) -> Self { + TICKON_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> TICKON_A { + match self.bits { + false => TICKON_A::CLK_GCLK_EIC, + true => TICKON_A::CLK_LFREQ, + } + } + #[doc = "Checks if the value of the field is `CLK_GCLK_EIC`"] + #[inline(always)] + pub fn is_clk_gclk_eic(&self) -> bool { + **self == TICKON_A::CLK_GCLK_EIC + } + #[doc = "Checks if the value of the field is `CLK_LFREQ`"] + #[inline(always)] + pub fn is_clk_lfreq(&self) -> bool { + **self == TICKON_A::CLK_LFREQ + } +} +impl core::ops::Deref for TICKON_R { + type Target = crate::FieldReader<bool, TICKON_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `TICKON` writer - Pin Sampler frequency selection"] +pub struct TICKON_W<'a> { + w: &'a mut W, +} +impl<'a> TICKON_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: TICKON_A) -> &'a mut W { + self.bit(variant.into()) + } + #[doc = "Clocked by GCLK"] + #[inline(always)] + pub fn clk_gclk_eic(self) -> &'a mut W { + self.variant(TICKON_A::CLK_GCLK_EIC) + } + #[doc = "Clocked by Low Frequency Clock"] + #[inline(always)] + pub fn clk_lfreq(self) -> &'a mut W { + self.variant(TICKON_A::CLK_LFREQ) + } + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); + self.w + } +} +impl R { + #[doc = "Bits 0:2 - Debouncer Prescaler"] + #[inline(always)] + pub fn prescaler0(&self) -> PRESCALER0_R { + PRESCALER0_R::new((self.bits & 0x07) as u8) + } + #[doc = "Bit 3 - Debouncer number of states"] + #[inline(always)] + pub fn states0(&self) -> STATES0_R { + STATES0_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bits 4:6 - Debouncer Prescaler"] + #[inline(always)] + pub fn prescaler1(&self) -> PRESCALER1_R { + PRESCALER1_R::new(((self.bits >> 4) & 0x07) as u8) + } + #[doc = "Bit 7 - Debouncer number of states"] + #[inline(always)] + pub fn states1(&self) -> STATES1_R { + STATES1_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 16 - Pin Sampler frequency selection"] + #[inline(always)] + pub fn tickon(&self) -> TICKON_R { + TICKON_R::new(((self.bits >> 16) & 0x01) != 0) + } +} +impl W { + #[doc = "Bits 0:2 - Debouncer Prescaler"] + #[inline(always)] + pub fn prescaler0(&mut self) -> PRESCALER0_W { + PRESCALER0_W { w: self } + } + #[doc = "Bit 3 - Debouncer number of states"] + #[inline(always)] + pub fn states0(&mut self) -> STATES0_W { + STATES0_W { w: self } + } + #[doc = "Bits 4:6 - Debouncer Prescaler"] + #[inline(always)] + pub fn prescaler1(&mut self) -> PRESCALER1_W { + PRESCALER1_W { w: self } + } + #[doc = "Bit 7 - Debouncer number of states"] + #[inline(always)] + pub fn states1(&mut self) -> STATES1_W { + STATES1_W { w: self } + } + #[doc = "Bit 16 - Pin Sampler frequency selection"] + #[inline(always)] + pub fn tickon(&mut self) -> TICKON_W { + TICKON_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Debouncer Prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dprescaler](index.html) module"] +pub struct DPRESCALER_SPEC; +impl crate::RegisterSpec for DPRESCALER_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [dprescaler::R](R) reader structure"] +impl crate::Readable for DPRESCALER_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [dprescaler::W](W) writer structure"] +impl crate::Writable for DPRESCALER_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets DPRESCALER to value 0"] +impl crate::Resettable for DPRESCALER_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/eic/evctrl.rs b/src/eic/evctrl.rs new file mode 100644 index 0000000..e23d3f1 --- /dev/null +++ b/src/eic/evctrl.rs @@ -0,0 +1,102 @@ +#[doc = "Register `EVCTRL` reader"] +pub struct R(crate::R<EVCTRL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<EVCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<EVCTRL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<EVCTRL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `EVCTRL` writer"] +pub struct W(crate::W<EVCTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<EVCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<EVCTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<EVCTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `EXTINTEO` reader - External Interrupt Event Output Enable"] +pub struct EXTINTEO_R(crate::FieldReader<u16, u16>); +impl EXTINTEO_R { + pub(crate) fn new(bits: u16) -> Self { + EXTINTEO_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for EXTINTEO_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `EXTINTEO` writer - External Interrupt Event Output Enable"] +pub struct EXTINTEO_W<'a> { + w: &'a mut W, +} +impl<'a> EXTINTEO_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - External Interrupt Event Output Enable"] + #[inline(always)] + pub fn extinteo(&self) -> EXTINTEO_R { + EXTINTEO_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - External Interrupt Event Output Enable"] + #[inline(always)] + pub fn extinteo(&mut self) -> EXTINTEO_W { + EXTINTEO_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Event Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [evctrl](index.html) module"] +pub struct EVCTRL_SPEC; +impl crate::RegisterSpec for EVCTRL_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [evctrl::R](R) reader structure"] +impl crate::Readable for EVCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [evctrl::W](W) writer structure"] +impl crate::Writable for EVCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets EVCTRL to value 0"] +impl crate::Resettable for EVCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/eic/intenclr.rs b/src/eic/intenclr.rs new file mode 100644 index 0000000..389cfb0 --- /dev/null +++ b/src/eic/intenclr.rs @@ -0,0 +1,102 @@ +#[doc = "Register `INTENCLR` reader"] +pub struct R(crate::R<INTENCLR_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<INTENCLR_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<INTENCLR_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<INTENCLR_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `INTENCLR` writer"] +pub struct W(crate::W<INTENCLR_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<INTENCLR_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<INTENCLR_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<INTENCLR_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `EXTINT` reader - External Interrupt Enable"] +pub struct EXTINT_R(crate::FieldReader<u16, u16>); +impl EXTINT_R { + pub(crate) fn new(bits: u16) -> Self { + EXTINT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for EXTINT_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `EXTINT` writer - External Interrupt Enable"] +pub struct EXTINT_W<'a> { + w: &'a mut W, +} +impl<'a> EXTINT_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - External Interrupt Enable"] + #[inline(always)] + pub fn extint(&self) -> EXTINT_R { + EXTINT_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - External Interrupt Enable"] + #[inline(always)] + pub fn extint(&mut self) -> EXTINT_W { + EXTINT_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"] +pub struct INTENCLR_SPEC; +impl crate::RegisterSpec for INTENCLR_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [intenclr::R](R) reader structure"] +impl crate::Readable for INTENCLR_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"] +impl crate::Writable for INTENCLR_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTENCLR to value 0"] +impl crate::Resettable for INTENCLR_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/eic/intenset.rs b/src/eic/intenset.rs new file mode 100644 index 0000000..4a699e0 --- /dev/null +++ b/src/eic/intenset.rs @@ -0,0 +1,102 @@ +#[doc = "Register `INTENSET` reader"] +pub struct R(crate::R<INTENSET_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<INTENSET_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<INTENSET_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<INTENSET_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `INTENSET` writer"] +pub struct W(crate::W<INTENSET_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<INTENSET_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<INTENSET_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<INTENSET_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `EXTINT` reader - External Interrupt Enable"] +pub struct EXTINT_R(crate::FieldReader<u16, u16>); +impl EXTINT_R { + pub(crate) fn new(bits: u16) -> Self { + EXTINT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for EXTINT_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `EXTINT` writer - External Interrupt Enable"] +pub struct EXTINT_W<'a> { + w: &'a mut W, +} +impl<'a> EXTINT_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - External Interrupt Enable"] + #[inline(always)] + pub fn extint(&self) -> EXTINT_R { + EXTINT_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - External Interrupt Enable"] + #[inline(always)] + pub fn extint(&mut self) -> EXTINT_W { + EXTINT_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"] +pub struct INTENSET_SPEC; +impl crate::RegisterSpec for INTENSET_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [intenset::R](R) reader structure"] +impl crate::Readable for INTENSET_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"] +impl crate::Writable for INTENSET_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTENSET to value 0"] +impl crate::Resettable for INTENSET_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/eic/intflag.rs b/src/eic/intflag.rs new file mode 100644 index 0000000..0fcb751 --- /dev/null +++ b/src/eic/intflag.rs @@ -0,0 +1,102 @@ +#[doc = "Register `INTFLAG` reader"] +pub struct R(crate::R<INTFLAG_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<INTFLAG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<INTFLAG_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<INTFLAG_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `INTFLAG` writer"] +pub struct W(crate::W<INTFLAG_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<INTFLAG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<INTFLAG_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<INTFLAG_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `EXTINT` reader - External Interrupt"] +pub struct EXTINT_R(crate::FieldReader<u16, u16>); +impl EXTINT_R { + pub(crate) fn new(bits: u16) -> Self { + EXTINT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for EXTINT_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `EXTINT` writer - External Interrupt"] +pub struct EXTINT_W<'a> { + w: &'a mut W, +} +impl<'a> EXTINT_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - External Interrupt"] + #[inline(always)] + pub fn extint(&self) -> EXTINT_R { + EXTINT_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - External Interrupt"] + #[inline(always)] + pub fn extint(&mut self) -> EXTINT_W { + EXTINT_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"] +pub struct INTFLAG_SPEC; +impl crate::RegisterSpec for INTFLAG_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [intflag::R](R) reader structure"] +impl crate::Readable for INTFLAG_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"] +impl crate::Writable for INTFLAG_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTFLAG to value 0"] +impl crate::Resettable for INTFLAG_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/eic/nmictrl.rs b/src/eic/nmictrl.rs new file mode 100644 index 0000000..1e16dbd --- /dev/null +++ b/src/eic/nmictrl.rs @@ -0,0 +1,342 @@ +#[doc = "Register `NMICTRL` reader"] +pub struct R(crate::R<NMICTRL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<NMICTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<NMICTRL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<NMICTRL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `NMICTRL` writer"] +pub struct W(crate::W<NMICTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<NMICTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<NMICTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<NMICTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Non-Maskable Interrupt Sense Configuration\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum NMISENSE_A { + #[doc = "0: No detection"] + NONE = 0, + #[doc = "1: Rising-edge detection"] + RISE = 1, + #[doc = "2: Falling-edge detection"] + FALL = 2, + #[doc = "3: Both-edges detection"] + BOTH = 3, + #[doc = "4: High-level detection"] + HIGH = 4, + #[doc = "5: Low-level detection"] + LOW = 5, +} +impl From<NMISENSE_A> for u8 { + #[inline(always)] + fn from(variant: NMISENSE_A) -> Self { + variant as _ + } +} +#[doc = "Field `NMISENSE` reader - Non-Maskable Interrupt Sense Configuration"] +pub struct NMISENSE_R(crate::FieldReader<u8, NMISENSE_A>); +impl NMISENSE_R { + pub(crate) fn new(bits: u8) -> Self { + NMISENSE_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<NMISENSE_A> { + match self.bits { + 0 => Some(NMISENSE_A::NONE), + 1 => Some(NMISENSE_A::RISE), + 2 => Some(NMISENSE_A::FALL), + 3 => Some(NMISENSE_A::BOTH), + 4 => Some(NMISENSE_A::HIGH), + 5 => Some(NMISENSE_A::LOW), + _ => None, + } + } + #[doc = "Checks if the value of the field is `NONE`"] + #[inline(always)] + pub fn is_none(&self) -> bool { + **self == NMISENSE_A::NONE + } + #[doc = "Checks if the value of the field is `RISE`"] + #[inline(always)] + pub fn is_rise(&self) -> bool { + **self == NMISENSE_A::RISE + } + #[doc = "Checks if the value of the field is `FALL`"] + #[inline(always)] + pub fn is_fall(&self) -> bool { + **self == NMISENSE_A::FALL + } + #[doc = "Checks if the value of the field is `BOTH`"] + #[inline(always)] + pub fn is_both(&self) -> bool { + **self == NMISENSE_A::BOTH + } + #[doc = "Checks if the value of the field is `HIGH`"] + #[inline(always)] + pub fn is_high(&self) -> bool { + **self == NMISENSE_A::HIGH + } + #[doc = "Checks if the value of the field is `LOW`"] + #[inline(always)] + pub fn is_low(&self) -> bool { + **self == NMISENSE_A::LOW + } +} +impl core::ops::Deref for NMISENSE_R { + type Target = crate::FieldReader<u8, NMISENSE_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `NMISENSE` writer - Non-Maskable Interrupt Sense Configuration"] +pub struct NMISENSE_W<'a> { + w: &'a mut W, +} +impl<'a> NMISENSE_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: NMISENSE_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "No detection"] + #[inline(always)] + pub fn none(self) -> &'a mut W { + self.variant(NMISENSE_A::NONE) + } + #[doc = "Rising-edge detection"] + #[inline(always)] + pub fn rise(self) -> &'a mut W { + self.variant(NMISENSE_A::RISE) + } + #[doc = "Falling-edge detection"] + #[inline(always)] + pub fn fall(self) -> &'a mut W { + self.variant(NMISENSE_A::FALL) + } + #[doc = "Both-edges detection"] + #[inline(always)] + pub fn both(self) -> &'a mut W { + self.variant(NMISENSE_A::BOTH) + } + #[doc = "High-level detection"] + #[inline(always)] + pub fn high(self) -> &'a mut W { + self.variant(NMISENSE_A::HIGH) + } + #[doc = "Low-level detection"] + #[inline(always)] + pub fn low(self) -> &'a mut W { + self.variant(NMISENSE_A::LOW) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x07) | (value as u8 & 0x07); + self.w + } +} +#[doc = "Field `NMIFILTEN` reader - Non-Maskable Interrupt Filter Enable"] +pub struct NMIFILTEN_R(crate::FieldReader<bool, bool>); +impl NMIFILTEN_R { + pub(crate) fn new(bits: bool) -> Self { + NMIFILTEN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for NMIFILTEN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `NMIFILTEN` writer - Non-Maskable Interrupt Filter Enable"] +pub struct NMIFILTEN_W<'a> { + w: &'a mut W, +} +impl<'a> NMIFILTEN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3); + self.w + } +} +#[doc = "Asynchronous Edge Detection Mode\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum NMIASYNCH_A { + #[doc = "0: Edge detection is clock synchronously operated"] + SYNC = 0, + #[doc = "1: Edge detection is clock asynchronously operated"] + ASYNC = 1, +} +impl From<NMIASYNCH_A> for bool { + #[inline(always)] + fn from(variant: NMIASYNCH_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `NMIASYNCH` reader - Asynchronous Edge Detection Mode"] +pub struct NMIASYNCH_R(crate::FieldReader<bool, NMIASYNCH_A>); +impl NMIASYNCH_R { + pub(crate) fn new(bits: bool) -> Self { + NMIASYNCH_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> NMIASYNCH_A { + match self.bits { + false => NMIASYNCH_A::SYNC, + true => NMIASYNCH_A::ASYNC, + } + } + #[doc = "Checks if the value of the field is `SYNC`"] + #[inline(always)] + pub fn is_sync(&self) -> bool { + **self == NMIASYNCH_A::SYNC + } + #[doc = "Checks if the value of the field is `ASYNC`"] + #[inline(always)] + pub fn is_async(&self) -> bool { + **self == NMIASYNCH_A::ASYNC + } +} +impl core::ops::Deref for NMIASYNCH_R { + type Target = crate::FieldReader<bool, NMIASYNCH_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `NMIASYNCH` writer - Asynchronous Edge Detection Mode"] +pub struct NMIASYNCH_W<'a> { + w: &'a mut W, +} +impl<'a> NMIASYNCH_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: NMIASYNCH_A) -> &'a mut W { + self.bit(variant.into()) + } + #[doc = "Edge detection is clock synchronously operated"] + #[inline(always)] + pub fn sync(self) -> &'a mut W { + self.variant(NMIASYNCH_A::SYNC) + } + #[doc = "Edge detection is clock asynchronously operated"] + #[inline(always)] + pub fn async_(self) -> &'a mut W { + self.variant(NMIASYNCH_A::ASYNC) + } + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4); + self.w + } +} +impl R { + #[doc = "Bits 0:2 - Non-Maskable Interrupt Sense Configuration"] + #[inline(always)] + pub fn nmisense(&self) -> NMISENSE_R { + NMISENSE_R::new((self.bits & 0x07) as u8) + } + #[doc = "Bit 3 - Non-Maskable Interrupt Filter Enable"] + #[inline(always)] + pub fn nmifilten(&self) -> NMIFILTEN_R { + NMIFILTEN_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Asynchronous Edge Detection Mode"] + #[inline(always)] + pub fn nmiasynch(&self) -> NMIASYNCH_R { + NMIASYNCH_R::new(((self.bits >> 4) & 0x01) != 0) + } +} +impl W { + #[doc = "Bits 0:2 - Non-Maskable Interrupt Sense Configuration"] + #[inline(always)] + pub fn nmisense(&mut self) -> NMISENSE_W { + NMISENSE_W { w: self } + } + #[doc = "Bit 3 - Non-Maskable Interrupt Filter Enable"] + #[inline(always)] + pub fn nmifilten(&mut self) -> NMIFILTEN_W { + NMIFILTEN_W { w: self } + } + #[doc = "Bit 4 - Asynchronous Edge Detection Mode"] + #[inline(always)] + pub fn nmiasynch(&mut self) -> NMIASYNCH_W { + NMIASYNCH_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Non-Maskable Interrupt Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nmictrl](index.html) module"] +pub struct NMICTRL_SPEC; +impl crate::RegisterSpec for NMICTRL_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [nmictrl::R](R) reader structure"] +impl crate::Readable for NMICTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [nmictrl::W](W) writer structure"] +impl crate::Writable for NMICTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets NMICTRL to value 0"] +impl crate::Resettable for NMICTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/eic/nmiflag.rs b/src/eic/nmiflag.rs new file mode 100644 index 0000000..3155276 --- /dev/null +++ b/src/eic/nmiflag.rs @@ -0,0 +1,112 @@ +#[doc = "Register `NMIFLAG` reader"] +pub struct R(crate::R<NMIFLAG_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<NMIFLAG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<NMIFLAG_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<NMIFLAG_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `NMIFLAG` writer"] +pub struct W(crate::W<NMIFLAG_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<NMIFLAG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<NMIFLAG_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<NMIFLAG_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `NMI` reader - Non-Maskable Interrupt"] +pub struct NMI_R(crate::FieldReader<bool, bool>); +impl NMI_R { + pub(crate) fn new(bits: bool) -> Self { + NMI_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for NMI_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `NMI` writer - Non-Maskable Interrupt"] +pub struct NMI_W<'a> { + w: &'a mut W, +} +impl<'a> NMI_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +impl R { + #[doc = "Bit 0 - Non-Maskable Interrupt"] + #[inline(always)] + pub fn nmi(&self) -> NMI_R { + NMI_R::new((self.bits & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Non-Maskable Interrupt"] + #[inline(always)] + pub fn nmi(&mut self) -> NMI_W { + NMI_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Non-Maskable Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nmiflag](index.html) module"] +pub struct NMIFLAG_SPEC; +impl crate::RegisterSpec for NMIFLAG_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [nmiflag::R](R) reader structure"] +impl crate::Readable for NMIFLAG_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [nmiflag::W](W) writer structure"] +impl crate::Writable for NMIFLAG_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets NMIFLAG to value 0"] +impl crate::Resettable for NMIFLAG_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/eic/pinstate.rs b/src/eic/pinstate.rs new file mode 100644 index 0000000..a3ccb57 --- /dev/null +++ b/src/eic/pinstate.rs @@ -0,0 +1,52 @@ +#[doc = "Register `PINSTATE` reader"] +pub struct R(crate::R<PINSTATE_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<PINSTATE_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<PINSTATE_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<PINSTATE_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `PINSTATE` reader - Pin State"] +pub struct PINSTATE_R(crate::FieldReader<u16, u16>); +impl PINSTATE_R { + pub(crate) fn new(bits: u16) -> Self { + PINSTATE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PINSTATE_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:15 - Pin State"] + #[inline(always)] + pub fn pinstate(&self) -> PINSTATE_R { + PINSTATE_R::new((self.bits & 0xffff) as u16) + } +} +#[doc = "Pin State\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pinstate](index.html) module"] +pub struct PINSTATE_SPEC; +impl crate::RegisterSpec for PINSTATE_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [pinstate::R](R) reader structure"] +impl crate::Readable for PINSTATE_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets PINSTATE to value 0"] +impl crate::Resettable for PINSTATE_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/eic/syncbusy.rs b/src/eic/syncbusy.rs new file mode 100644 index 0000000..949f238 --- /dev/null +++ b/src/eic/syncbusy.rs @@ -0,0 +1,71 @@ +#[doc = "Register `SYNCBUSY` reader"] +pub struct R(crate::R<SYNCBUSY_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<SYNCBUSY_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<SYNCBUSY_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `SWRST` reader - Software Reset Synchronization Busy Status"] +pub struct SWRST_R(crate::FieldReader<bool, bool>); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENABLE` reader - Enable Synchronization Busy Status"] +pub struct ENABLE_R(crate::FieldReader<bool, bool>); +impl ENABLE_R { + pub(crate) fn new(bits: bool) -> Self { + ENABLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENABLE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bit 0 - Software Reset Synchronization Busy Status"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Enable Synchronization Busy Status"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + } +} +#[doc = "Synchronization Busy\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] +pub struct SYNCBUSY_SPEC; +impl crate::RegisterSpec for SYNCBUSY_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] +impl crate::Readable for SYNCBUSY_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets SYNCBUSY to value 0"] +impl crate::Resettable for SYNCBUSY_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} |