diff options
Diffstat (limited to 'src/gclk')
| -rw-r--r-- | src/gclk/ctrla.rs | 112 | ||||
| -rw-r--r-- | src/gclk/genctrl.rs | 589 | ||||
| -rw-r--r-- | src/gclk/pchctrl.rs | 335 | ||||
| -rw-r--r-- | src/gclk/syncbusy.rs | 1024 |
4 files changed, 2060 insertions, 0 deletions
diff --git a/src/gclk/ctrla.rs b/src/gclk/ctrla.rs new file mode 100644 index 0000000..c3a893a --- /dev/null +++ b/src/gclk/ctrla.rs @@ -0,0 +1,112 @@ +#[doc = "Register `CTRLA` reader"] +pub struct R(crate::R<CTRLA_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CTRLA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CTRLA_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CTRLA_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `CTRLA` writer"] +pub struct W(crate::W<CTRLA_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<CTRLA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<CTRLA_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<CTRLA_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `SWRST` reader - Software Reset"] +pub struct SWRST_R(crate::FieldReader<bool, bool>); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SWRST` writer - Software Reset"] +pub struct SWRST_W<'a> { + w: &'a mut W, +} +impl<'a> SWRST_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +impl R { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&mut self) -> SWRST_W { + SWRST_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"] +pub struct CTRLA_SPEC; +impl crate::RegisterSpec for CTRLA_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [ctrla::R](R) reader structure"] +impl crate::Readable for CTRLA_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"] +impl crate::Writable for CTRLA_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CTRLA to value 0"] +impl crate::Resettable for CTRLA_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/gclk/genctrl.rs b/src/gclk/genctrl.rs new file mode 100644 index 0000000..d808c48 --- /dev/null +++ b/src/gclk/genctrl.rs @@ -0,0 +1,589 @@ +#[doc = "Register `GENCTRL[%s]` reader"] +pub struct R(crate::R<GENCTRL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<GENCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<GENCTRL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<GENCTRL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `GENCTRL[%s]` writer"] +pub struct W(crate::W<GENCTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<GENCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<GENCTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<GENCTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Source Select\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SRC_A { + #[doc = "0: XOSC oscillator output"] + XOSC = 0, + #[doc = "1: Generator input pad"] + GCLKIN = 1, + #[doc = "2: Generic clock generator 1 output"] + GCLKGEN1 = 2, + #[doc = "3: OSCULP32K oscillator output"] + OSCULP32K = 3, + #[doc = "4: OSC32K oscillator output"] + OSC32K = 4, + #[doc = "5: XOSC32K oscillator output"] + XOSC32K = 5, + #[doc = "6: OSC48M oscillator output"] + OSC48M = 6, + #[doc = "7: DPLL96M output"] + DPLL96M = 7, +} +impl From<SRC_A> for u8 { + #[inline(always)] + fn from(variant: SRC_A) -> Self { + variant as _ + } +} +#[doc = "Field `SRC` reader - Source Select"] +pub struct SRC_R(crate::FieldReader<u8, SRC_A>); +impl SRC_R { + pub(crate) fn new(bits: u8) -> Self { + SRC_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> SRC_A { + match self.bits { + 0 => SRC_A::XOSC, + 1 => SRC_A::GCLKIN, + 2 => SRC_A::GCLKGEN1, + 3 => SRC_A::OSCULP32K, + 4 => SRC_A::OSC32K, + 5 => SRC_A::XOSC32K, + 6 => SRC_A::OSC48M, + 7 => SRC_A::DPLL96M, + _ => unreachable!(), + } + } + #[doc = "Checks if the value of the field is `XOSC`"] + #[inline(always)] + pub fn is_xosc(&self) -> bool { + **self == SRC_A::XOSC + } + #[doc = "Checks if the value of the field is `GCLKIN`"] + #[inline(always)] + pub fn is_gclkin(&self) -> bool { + **self == SRC_A::GCLKIN + } + #[doc = "Checks if the value of the field is `GCLKGEN1`"] + #[inline(always)] + pub fn is_gclkgen1(&self) -> bool { + **self == SRC_A::GCLKGEN1 + } + #[doc = "Checks if the value of the field is `OSCULP32K`"] + #[inline(always)] + pub fn is_osculp32k(&self) -> bool { + **self == SRC_A::OSCULP32K + } + #[doc = "Checks if the value of the field is `OSC32K`"] + #[inline(always)] + pub fn is_osc32k(&self) -> bool { + **self == SRC_A::OSC32K + } + #[doc = "Checks if the value of the field is `XOSC32K`"] + #[inline(always)] + pub fn is_xosc32k(&self) -> bool { + **self == SRC_A::XOSC32K + } + #[doc = "Checks if the value of the field is `OSC48M`"] + #[inline(always)] + pub fn is_osc48m(&self) -> bool { + **self == SRC_A::OSC48M + } + #[doc = "Checks if the value of the field is `DPLL96M`"] + #[inline(always)] + pub fn is_dpll96m(&self) -> bool { + **self == SRC_A::DPLL96M + } +} +impl core::ops::Deref for SRC_R { + type Target = crate::FieldReader<u8, SRC_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SRC` writer - Source Select"] +pub struct SRC_W<'a> { + w: &'a mut W, +} +impl<'a> SRC_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SRC_A) -> &'a mut W { + self.bits(variant.into()) + } + #[doc = "XOSC oscillator output"] + #[inline(always)] + pub fn xosc(self) -> &'a mut W { + self.variant(SRC_A::XOSC) + } + #[doc = "Generator input pad"] + #[inline(always)] + pub fn gclkin(self) -> &'a mut W { + self.variant(SRC_A::GCLKIN) + } + #[doc = "Generic clock generator 1 output"] + #[inline(always)] + pub fn gclkgen1(self) -> &'a mut W { + self.variant(SRC_A::GCLKGEN1) + } + #[doc = "OSCULP32K oscillator output"] + #[inline(always)] + pub fn osculp32k(self) -> &'a mut W { + self.variant(SRC_A::OSCULP32K) + } + #[doc = "OSC32K oscillator output"] + #[inline(always)] + pub fn osc32k(self) -> &'a mut W { + self.variant(SRC_A::OSC32K) + } + #[doc = "XOSC32K oscillator output"] + #[inline(always)] + pub fn xosc32k(self) -> &'a mut W { + self.variant(SRC_A::XOSC32K) + } + #[doc = "OSC48M oscillator output"] + #[inline(always)] + pub fn osc48m(self) -> &'a mut W { + self.variant(SRC_A::OSC48M) + } + #[doc = "DPLL96M output"] + #[inline(always)] + pub fn dpll96m(self) -> &'a mut W { + self.variant(SRC_A::DPLL96M) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); + self.w + } +} +#[doc = "Field `GENEN` reader - Generic Clock Generator Enable"] +pub struct GENEN_R(crate::FieldReader<bool, bool>); +impl GENEN_R { + pub(crate) fn new(bits: bool) -> Self { + GENEN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for GENEN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `GENEN` writer - Generic Clock Generator Enable"] +pub struct GENEN_W<'a> { + w: &'a mut W, +} +impl<'a> GENEN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); + self.w + } +} +#[doc = "Field `IDC` reader - Improve Duty Cycle"] +pub struct IDC_R(crate::FieldReader<bool, bool>); +impl IDC_R { + pub(crate) fn new(bits: bool) -> Self { + IDC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for IDC_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `IDC` writer - Improve Duty Cycle"] +pub struct IDC_W<'a> { + w: &'a mut W, +} +impl<'a> IDC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); + self.w + } +} +#[doc = "Field `OOV` reader - Output Off Value"] +pub struct OOV_R(crate::FieldReader<bool, bool>); +impl OOV_R { + pub(crate) fn new(bits: bool) -> Self { + OOV_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OOV_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OOV` writer - Output Off Value"] +pub struct OOV_W<'a> { + w: &'a mut W, +} +impl<'a> OOV_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); + self.w + } +} +#[doc = "Field `OE` reader - Output Enable"] +pub struct OE_R(crate::FieldReader<bool, bool>); +impl OE_R { + pub(crate) fn new(bits: bool) -> Self { + OE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OE` writer - Output Enable"] +pub struct OE_W<'a> { + w: &'a mut W, +} +impl<'a> OE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); + self.w + } +} +#[doc = "Divide Selection\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum DIVSEL_A { + #[doc = "0: Divide input directly by divider factor"] + DIV1 = 0, + #[doc = "1: Divide input by 2^(divider factor+ 1)"] + DIV2 = 1, +} +impl From<DIVSEL_A> for bool { + #[inline(always)] + fn from(variant: DIVSEL_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `DIVSEL` reader - Divide Selection"] +pub struct DIVSEL_R(crate::FieldReader<bool, DIVSEL_A>); +impl DIVSEL_R { + pub(crate) fn new(bits: bool) -> Self { + DIVSEL_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> DIVSEL_A { + match self.bits { + false => DIVSEL_A::DIV1, + true => DIVSEL_A::DIV2, + } + } + #[doc = "Checks if the value of the field is `DIV1`"] + #[inline(always)] + pub fn is_div1(&self) -> bool { + **self == DIVSEL_A::DIV1 + } + #[doc = "Checks if the value of the field is `DIV2`"] + #[inline(always)] + pub fn is_div2(&self) -> bool { + **self == DIVSEL_A::DIV2 + } +} +impl core::ops::Deref for DIVSEL_R { + type Target = crate::FieldReader<bool, DIVSEL_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DIVSEL` writer - Divide Selection"] +pub struct DIVSEL_W<'a> { + w: &'a mut W, +} +impl<'a> DIVSEL_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: DIVSEL_A) -> &'a mut W { + self.bit(variant.into()) + } + #[doc = "Divide input directly by divider factor"] + #[inline(always)] + pub fn div1(self) -> &'a mut W { + self.variant(DIVSEL_A::DIV1) + } + #[doc = "Divide input by 2^(divider factor+ 1)"] + #[inline(always)] + pub fn div2(self) -> &'a mut W { + self.variant(DIVSEL_A::DIV2) + } + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); + self.w + } +} +#[doc = "Field `RUNSTDBY` reader - Run in Standby"] +pub struct RUNSTDBY_R(crate::FieldReader<bool, bool>); +impl RUNSTDBY_R { + pub(crate) fn new(bits: bool) -> Self { + RUNSTDBY_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RUNSTDBY_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RUNSTDBY` writer - Run in Standby"] +pub struct RUNSTDBY_W<'a> { + w: &'a mut W, +} +impl<'a> RUNSTDBY_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); + self.w + } +} +#[doc = "Field `DIV` reader - Division Factor"] +pub struct DIV_R(crate::FieldReader<u16, u16>); +impl DIV_R { + pub(crate) fn new(bits: u16) -> Self { + DIV_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DIV_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DIV` writer - Division Factor"] +pub struct DIV_W<'a> { + w: &'a mut W, +} +impl<'a> DIV_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !(0xffff << 16)) | ((value as u32 & 0xffff) << 16); + self.w + } +} +impl R { + #[doc = "Bits 0:2 - Source Select"] + #[inline(always)] + pub fn src(&self) -> SRC_R { + SRC_R::new((self.bits & 0x07) as u8) + } + #[doc = "Bit 8 - Generic Clock Generator Enable"] + #[inline(always)] + pub fn genen(&self) -> GENEN_R { + GENEN_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 9 - Improve Duty Cycle"] + #[inline(always)] + pub fn idc(&self) -> IDC_R { + IDC_R::new(((self.bits >> 9) & 0x01) != 0) + } + #[doc = "Bit 10 - Output Off Value"] + #[inline(always)] + pub fn oov(&self) -> OOV_R { + OOV_R::new(((self.bits >> 10) & 0x01) != 0) + } + #[doc = "Bit 11 - Output Enable"] + #[inline(always)] + pub fn oe(&self) -> OE_R { + OE_R::new(((self.bits >> 11) & 0x01) != 0) + } + #[doc = "Bit 12 - Divide Selection"] + #[inline(always)] + pub fn divsel(&self) -> DIVSEL_R { + DIVSEL_R::new(((self.bits >> 12) & 0x01) != 0) + } + #[doc = "Bit 13 - Run in Standby"] + #[inline(always)] + pub fn runstdby(&self) -> RUNSTDBY_R { + RUNSTDBY_R::new(((self.bits >> 13) & 0x01) != 0) + } + #[doc = "Bits 16:31 - Division Factor"] + #[inline(always)] + pub fn div(&self) -> DIV_R { + DIV_R::new(((self.bits >> 16) & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:2 - Source Select"] + #[inline(always)] + pub fn src(&mut self) -> SRC_W { + SRC_W { w: self } + } + #[doc = "Bit 8 - Generic Clock Generator Enable"] + #[inline(always)] + pub fn genen(&mut self) -> GENEN_W { + GENEN_W { w: self } + } + #[doc = "Bit 9 - Improve Duty Cycle"] + #[inline(always)] + pub fn idc(&mut self) -> IDC_W { + IDC_W { w: self } + } + #[doc = "Bit 10 - Output Off Value"] + #[inline(always)] + pub fn oov(&mut self) -> OOV_W { + OOV_W { w: self } + } + #[doc = "Bit 11 - Output Enable"] + #[inline(always)] + pub fn oe(&mut self) -> OE_W { + OE_W { w: self } + } + #[doc = "Bit 12 - Divide Selection"] + #[inline(always)] + pub fn divsel(&mut self) -> DIVSEL_W { + DIVSEL_W { w: self } + } + #[doc = "Bit 13 - Run in Standby"] + #[inline(always)] + pub fn runstdby(&mut self) -> RUNSTDBY_W { + RUNSTDBY_W { w: self } + } + #[doc = "Bits 16:31 - Division Factor"] + #[inline(always)] + pub fn div(&mut self) -> DIV_W { + DIV_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Generic Clock Generator Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [genctrl](index.html) module"] +pub struct GENCTRL_SPEC; +impl crate::RegisterSpec for GENCTRL_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [genctrl::R](R) reader structure"] +impl crate::Readable for GENCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [genctrl::W](W) writer structure"] +impl crate::Writable for GENCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets GENCTRL[%s] +to value 0"] +impl crate::Resettable for GENCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/gclk/pchctrl.rs b/src/gclk/pchctrl.rs new file mode 100644 index 0000000..2c94a9f --- /dev/null +++ b/src/gclk/pchctrl.rs @@ -0,0 +1,335 @@ +#[doc = "Register `PCHCTRL[%s]` reader"] +pub struct R(crate::R<PCHCTRL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<PCHCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<PCHCTRL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<PCHCTRL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `PCHCTRL[%s]` writer"] +pub struct W(crate::W<PCHCTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<PCHCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<PCHCTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<PCHCTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Generic Clock Generator\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum GEN_A { + #[doc = "0: Generic clock generator 0"] + GCLK0 = 0, + #[doc = "1: Generic clock generator 1"] + GCLK1 = 1, + #[doc = "2: Generic clock generator 2"] + GCLK2 = 2, + #[doc = "3: Generic clock generator 3"] + GCLK3 = 3, + #[doc = "4: Generic clock generator 4"] + GCLK4 = 4, + #[doc = "5: Generic clock generator 5"] + GCLK5 = 5, + #[doc = "6: Generic clock generator 6"] + GCLK6 = 6, + #[doc = "7: Generic clock generator 7"] + GCLK7 = 7, + #[doc = "8: Generic clock generator 8"] + GCLK8 = 8, +} +impl From<GEN_A> for u8 { + #[inline(always)] + fn from(variant: GEN_A) -> Self { + variant as _ + } +} +#[doc = "Field `GEN` reader - Generic Clock Generator"] +pub struct GEN_R(crate::FieldReader<u8, GEN_A>); +impl GEN_R { + pub(crate) fn new(bits: u8) -> Self { + GEN_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<GEN_A> { + match self.bits { + 0 => Some(GEN_A::GCLK0), + 1 => Some(GEN_A::GCLK1), + 2 => Some(GEN_A::GCLK2), + 3 => Some(GEN_A::GCLK3), + 4 => Some(GEN_A::GCLK4), + 5 => Some(GEN_A::GCLK5), + 6 => Some(GEN_A::GCLK6), + 7 => Some(GEN_A::GCLK7), + 8 => Some(GEN_A::GCLK8), + _ => None, + } + } + #[doc = "Checks if the value of the field is `GCLK0`"] + #[inline(always)] + pub fn is_gclk0(&self) -> bool { + **self == GEN_A::GCLK0 + } + #[doc = "Checks if the value of the field is `GCLK1`"] + #[inline(always)] + pub fn is_gclk1(&self) -> bool { + **self == GEN_A::GCLK1 + } + #[doc = "Checks if the value of the field is `GCLK2`"] + #[inline(always)] + pub fn is_gclk2(&self) -> bool { + **self == GEN_A::GCLK2 + } + #[doc = "Checks if the value of the field is `GCLK3`"] + #[inline(always)] + pub fn is_gclk3(&self) -> bool { + **self == GEN_A::GCLK3 + } + #[doc = "Checks if the value of the field is `GCLK4`"] + #[inline(always)] + pub fn is_gclk4(&self) -> bool { + **self == GEN_A::GCLK4 + } + #[doc = "Checks if the value of the field is `GCLK5`"] + #[inline(always)] + pub fn is_gclk5(&self) -> bool { + **self == GEN_A::GCLK5 + } + #[doc = "Checks if the value of the field is `GCLK6`"] + #[inline(always)] + pub fn is_gclk6(&self) -> bool { + **self == GEN_A::GCLK6 + } + #[doc = "Checks if the value of the field is `GCLK7`"] + #[inline(always)] + pub fn is_gclk7(&self) -> bool { + **self == GEN_A::GCLK7 + } + #[doc = "Checks if the value of the field is `GCLK8`"] + #[inline(always)] + pub fn is_gclk8(&self) -> bool { + **self == GEN_A::GCLK8 + } +} +impl core::ops::Deref for GEN_R { + type Target = crate::FieldReader<u8, GEN_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `GEN` writer - Generic Clock Generator"] +pub struct GEN_W<'a> { + w: &'a mut W, +} +impl<'a> GEN_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: GEN_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "Generic clock generator 0"] + #[inline(always)] + pub fn gclk0(self) -> &'a mut W { + self.variant(GEN_A::GCLK0) + } + #[doc = "Generic clock generator 1"] + #[inline(always)] + pub fn gclk1(self) -> &'a mut W { + self.variant(GEN_A::GCLK1) + } + #[doc = "Generic clock generator 2"] + #[inline(always)] + pub fn gclk2(self) -> &'a mut W { + self.variant(GEN_A::GCLK2) + } + #[doc = "Generic clock generator 3"] + #[inline(always)] + pub fn gclk3(self) -> &'a mut W { + self.variant(GEN_A::GCLK3) + } + #[doc = "Generic clock generator 4"] + #[inline(always)] + pub fn gclk4(self) -> &'a mut W { + self.variant(GEN_A::GCLK4) + } + #[doc = "Generic clock generator 5"] + #[inline(always)] + pub fn gclk5(self) -> &'a mut W { + self.variant(GEN_A::GCLK5) + } + #[doc = "Generic clock generator 6"] + #[inline(always)] + pub fn gclk6(self) -> &'a mut W { + self.variant(GEN_A::GCLK6) + } + #[doc = "Generic clock generator 7"] + #[inline(always)] + pub fn gclk7(self) -> &'a mut W { + self.variant(GEN_A::GCLK7) + } + #[doc = "Generic clock generator 8"] + #[inline(always)] + pub fn gclk8(self) -> &'a mut W { + self.variant(GEN_A::GCLK8) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); + self.w + } +} +#[doc = "Field `CHEN` reader - Channel Enable"] +pub struct CHEN_R(crate::FieldReader<bool, bool>); +impl CHEN_R { + pub(crate) fn new(bits: bool) -> Self { + CHEN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CHEN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CHEN` writer - Channel Enable"] +pub struct CHEN_W<'a> { + w: &'a mut W, +} +impl<'a> CHEN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); + self.w + } +} +#[doc = "Field `WRTLOCK` reader - Write Lock"] +pub struct WRTLOCK_R(crate::FieldReader<bool, bool>); +impl WRTLOCK_R { + pub(crate) fn new(bits: bool) -> Self { + WRTLOCK_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for WRTLOCK_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `WRTLOCK` writer - Write Lock"] +pub struct WRTLOCK_W<'a> { + w: &'a mut W, +} +impl<'a> WRTLOCK_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); + self.w + } +} +impl R { + #[doc = "Bits 0:3 - Generic Clock Generator"] + #[inline(always)] + pub fn gen(&self) -> GEN_R { + GEN_R::new((self.bits & 0x0f) as u8) + } + #[doc = "Bit 6 - Channel Enable"] + #[inline(always)] + pub fn chen(&self) -> CHEN_R { + CHEN_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Write Lock"] + #[inline(always)] + pub fn wrtlock(&self) -> WRTLOCK_R { + WRTLOCK_R::new(((self.bits >> 7) & 0x01) != 0) + } +} +impl W { + #[doc = "Bits 0:3 - Generic Clock Generator"] + #[inline(always)] + pub fn gen(&mut self) -> GEN_W { + GEN_W { w: self } + } + #[doc = "Bit 6 - Channel Enable"] + #[inline(always)] + pub fn chen(&mut self) -> CHEN_W { + CHEN_W { w: self } + } + #[doc = "Bit 7 - Write Lock"] + #[inline(always)] + pub fn wrtlock(&mut self) -> WRTLOCK_W { + WRTLOCK_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Peripheral Clock Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pchctrl](index.html) module"] +pub struct PCHCTRL_SPEC; +impl crate::RegisterSpec for PCHCTRL_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [pchctrl::R](R) reader structure"] +impl crate::Readable for PCHCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [pchctrl::W](W) writer structure"] +impl crate::Writable for PCHCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets PCHCTRL[%s] +to value 0"] +impl crate::Resettable for PCHCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/gclk/syncbusy.rs b/src/gclk/syncbusy.rs new file mode 100644 index 0000000..d759b91 --- /dev/null +++ b/src/gclk/syncbusy.rs @@ -0,0 +1,1024 @@ +#[doc = "Register `SYNCBUSY` reader"] +pub struct R(crate::R<SYNCBUSY_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<SYNCBUSY_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<SYNCBUSY_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `SWRST` reader - Software Reset Synchroniation Busy bit"] +pub struct SWRST_R(crate::FieldReader<bool, bool>); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Generic Clock Generator Control 0 Synchronization Busy bits\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum GENCTRL0_A { + #[doc = "1: Generic clock generator 0"] + GCLK0 = 1, + #[doc = "1: Generic clock generator 1"] + GCLK1 = 1, + #[doc = "1: Generic clock generator 2"] + GCLK2 = 1, + #[doc = "1: Generic clock generator 3"] + GCLK3 = 1, + #[doc = "1: Generic clock generator 4"] + GCLK4 = 1, + #[doc = "1: Generic clock generator 5"] + GCLK5 = 1, + #[doc = "1: Generic clock generator 6"] + GCLK6 = 1, + #[doc = "1: Generic clock generator 7"] + GCLK7 = 1, + #[doc = "1: Generic clock generator 8"] + GCLK8 = 1, +} +impl From<GENCTRL0_A> for bool { + #[inline(always)] + fn from(variant: GENCTRL0_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `GENCTRL0` reader - Generic Clock Generator Control 0 Synchronization Busy bits"] +pub struct GENCTRL0_R(crate::FieldReader<bool, GENCTRL0_A>); +impl GENCTRL0_R { + pub(crate) fn new(bits: bool) -> Self { + GENCTRL0_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<GENCTRL0_A> { + match self.bits { + true => Some(GENCTRL0_A::GCLK0), + true => Some(GENCTRL0_A::GCLK1), + true => Some(GENCTRL0_A::GCLK2), + true => Some(GENCTRL0_A::GCLK3), + true => Some(GENCTRL0_A::GCLK4), + true => Some(GENCTRL0_A::GCLK5), + true => Some(GENCTRL0_A::GCLK6), + true => Some(GENCTRL0_A::GCLK7), + true => Some(GENCTRL0_A::GCLK8), + _ => None, + } + } + #[doc = "Checks if the value of the field is `GCLK0`"] + #[inline(always)] + pub fn is_gclk0(&self) -> bool { + **self == GENCTRL0_A::GCLK0 + } + #[doc = "Checks if the value of the field is `GCLK1`"] + #[inline(always)] + pub fn is_gclk1(&self) -> bool { + **self == GENCTRL0_A::GCLK1 + } + #[doc = "Checks if the value of the field is `GCLK2`"] + #[inline(always)] + pub fn is_gclk2(&self) -> bool { + **self == GENCTRL0_A::GCLK2 + } + #[doc = "Checks if the value of the field is `GCLK3`"] + #[inline(always)] + pub fn is_gclk3(&self) -> bool { + **self == GENCTRL0_A::GCLK3 + } + #[doc = "Checks if the value of the field is `GCLK4`"] + #[inline(always)] + pub fn is_gclk4(&self) -> bool { + **self == GENCTRL0_A::GCLK4 + } + #[doc = "Checks if the value of the field is `GCLK5`"] + #[inline(always)] + pub fn is_gclk5(&self) -> bool { + **self == GENCTRL0_A::GCLK5 + } + #[doc = "Checks if the value of the field is `GCLK6`"] + #[inline(always)] + pub fn is_gclk6(&self) -> bool { + **self == GENCTRL0_A::GCLK6 + } + #[doc = "Checks if the value of the field is `GCLK7`"] + #[inline(always)] + pub fn is_gclk7(&self) -> bool { + **self == GENCTRL0_A::GCLK7 + } + #[doc = "Checks if the value of the field is `GCLK8`"] + #[inline(always)] + pub fn is_gclk8(&self) -> bool { + **self == GENCTRL0_A::GCLK8 + } +} +impl core::ops::Deref for GENCTRL0_R { + type Target = crate::FieldReader<bool, GENCTRL0_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Generic Clock Generator Control 1 Synchronization Busy bits\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum GENCTRL1_A { + #[doc = "1: Generic clock generator 0"] + GCLK0 = 1, + #[doc = "1: Generic clock generator 1"] + GCLK1 = 1, + #[doc = "1: Generic clock generator 2"] + GCLK2 = 1, + #[doc = "1: Generic clock generator 3"] + GCLK3 = 1, + #[doc = "1: Generic clock generator 4"] + GCLK4 = 1, + #[doc = "1: Generic clock generator 5"] + GCLK5 = 1, + #[doc = "1: Generic clock generator 6"] + GCLK6 = 1, + #[doc = "1: Generic clock generator 7"] + GCLK7 = 1, + #[doc = "1: Generic clock generator 8"] + GCLK8 = 1, +} +impl From<GENCTRL1_A> for bool { + #[inline(always)] + fn from(variant: GENCTRL1_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `GENCTRL1` reader - Generic Clock Generator Control 1 Synchronization Busy bits"] +pub struct GENCTRL1_R(crate::FieldReader<bool, GENCTRL1_A>); +impl GENCTRL1_R { + pub(crate) fn new(bits: bool) -> Self { + GENCTRL1_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<GENCTRL1_A> { + match self.bits { + true => Some(GENCTRL1_A::GCLK0), + true => Some(GENCTRL1_A::GCLK1), + true => Some(GENCTRL1_A::GCLK2), + true => Some(GENCTRL1_A::GCLK3), + true => Some(GENCTRL1_A::GCLK4), + true => Some(GENCTRL1_A::GCLK5), + true => Some(GENCTRL1_A::GCLK6), + true => Some(GENCTRL1_A::GCLK7), + true => Some(GENCTRL1_A::GCLK8), + _ => None, + } + } + #[doc = "Checks if the value of the field is `GCLK0`"] + #[inline(always)] + pub fn is_gclk0(&self) -> bool { + **self == GENCTRL1_A::GCLK0 + } + #[doc = "Checks if the value of the field is `GCLK1`"] + #[inline(always)] + pub fn is_gclk1(&self) -> bool { + **self == GENCTRL1_A::GCLK1 + } + #[doc = "Checks if the value of the field is `GCLK2`"] + #[inline(always)] + pub fn is_gclk2(&self) -> bool { + **self == GENCTRL1_A::GCLK2 + } + #[doc = "Checks if the value of the field is `GCLK3`"] + #[inline(always)] + pub fn is_gclk3(&self) -> bool { + **self == GENCTRL1_A::GCLK3 + } + #[doc = "Checks if the value of the field is `GCLK4`"] + #[inline(always)] + pub fn is_gclk4(&self) -> bool { + **self == GENCTRL1_A::GCLK4 + } + #[doc = "Checks if the value of the field is `GCLK5`"] + #[inline(always)] + pub fn is_gclk5(&self) -> bool { + **self == GENCTRL1_A::GCLK5 + } + #[doc = "Checks if the value of the field is `GCLK6`"] + #[inline(always)] + pub fn is_gclk6(&self) -> bool { + **self == GENCTRL1_A::GCLK6 + } + #[doc = "Checks if the value of the field is `GCLK7`"] + #[inline(always)] + pub fn is_gclk7(&self) -> bool { + **self == GENCTRL1_A::GCLK7 + } + #[doc = "Checks if the value of the field is `GCLK8`"] + #[inline(always)] + pub fn is_gclk8(&self) -> bool { + **self == GENCTRL1_A::GCLK8 + } +} +impl core::ops::Deref for GENCTRL1_R { + type Target = crate::FieldReader<bool, GENCTRL1_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Generic Clock Generator Control 2 Synchronization Busy bits\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum GENCTRL2_A { + #[doc = "1: Generic clock generator 0"] + GCLK0 = 1, + #[doc = "1: Generic clock generator 1"] + GCLK1 = 1, + #[doc = "1: Generic clock generator 2"] + GCLK2 = 1, + #[doc = "1: Generic clock generator 3"] + GCLK3 = 1, + #[doc = "1: Generic clock generator 4"] + GCLK4 = 1, + #[doc = "1: Generic clock generator 5"] + GCLK5 = 1, + #[doc = "1: Generic clock generator 6"] + GCLK6 = 1, + #[doc = "1: Generic clock generator 7"] + GCLK7 = 1, + #[doc = "1: Generic clock generator 8"] + GCLK8 = 1, +} +impl From<GENCTRL2_A> for bool { + #[inline(always)] + fn from(variant: GENCTRL2_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `GENCTRL2` reader - Generic Clock Generator Control 2 Synchronization Busy bits"] +pub struct GENCTRL2_R(crate::FieldReader<bool, GENCTRL2_A>); +impl GENCTRL2_R { + pub(crate) fn new(bits: bool) -> Self { + GENCTRL2_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<GENCTRL2_A> { + match self.bits { + true => Some(GENCTRL2_A::GCLK0), + true => Some(GENCTRL2_A::GCLK1), + true => Some(GENCTRL2_A::GCLK2), + true => Some(GENCTRL2_A::GCLK3), + true => Some(GENCTRL2_A::GCLK4), + true => Some(GENCTRL2_A::GCLK5), + true => Some(GENCTRL2_A::GCLK6), + true => Some(GENCTRL2_A::GCLK7), + true => Some(GENCTRL2_A::GCLK8), + _ => None, + } + } + #[doc = "Checks if the value of the field is `GCLK0`"] + #[inline(always)] + pub fn is_gclk0(&self) -> bool { + **self == GENCTRL2_A::GCLK0 + } + #[doc = "Checks if the value of the field is `GCLK1`"] + #[inline(always)] + pub fn is_gclk1(&self) -> bool { + **self == GENCTRL2_A::GCLK1 + } + #[doc = "Checks if the value of the field is `GCLK2`"] + #[inline(always)] + pub fn is_gclk2(&self) -> bool { + **self == GENCTRL2_A::GCLK2 + } + #[doc = "Checks if the value of the field is `GCLK3`"] + #[inline(always)] + pub fn is_gclk3(&self) -> bool { + **self == GENCTRL2_A::GCLK3 + } + #[doc = "Checks if the value of the field is `GCLK4`"] + #[inline(always)] + pub fn is_gclk4(&self) -> bool { + **self == GENCTRL2_A::GCLK4 + } + #[doc = "Checks if the value of the field is `GCLK5`"] + #[inline(always)] + pub fn is_gclk5(&self) -> bool { + **self == GENCTRL2_A::GCLK5 + } + #[doc = "Checks if the value of the field is `GCLK6`"] + #[inline(always)] + pub fn is_gclk6(&self) -> bool { + **self == GENCTRL2_A::GCLK6 + } + #[doc = "Checks if the value of the field is `GCLK7`"] + #[inline(always)] + pub fn is_gclk7(&self) -> bool { + **self == GENCTRL2_A::GCLK7 + } + #[doc = "Checks if the value of the field is `GCLK8`"] + #[inline(always)] + pub fn is_gclk8(&self) -> bool { + **self == GENCTRL2_A::GCLK8 + } +} +impl core::ops::Deref for GENCTRL2_R { + type Target = crate::FieldReader<bool, GENCTRL2_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Generic Clock Generator Control 3 Synchronization Busy bits\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum GENCTRL3_A { + #[doc = "1: Generic clock generator 0"] + GCLK0 = 1, + #[doc = "1: Generic clock generator 1"] + GCLK1 = 1, + #[doc = "1: Generic clock generator 2"] + GCLK2 = 1, + #[doc = "1: Generic clock generator 3"] + GCLK3 = 1, + #[doc = "1: Generic clock generator 4"] + GCLK4 = 1, + #[doc = "1: Generic clock generator 5"] + GCLK5 = 1, + #[doc = "1: Generic clock generator 6"] + GCLK6 = 1, + #[doc = "1: Generic clock generator 7"] + GCLK7 = 1, + #[doc = "1: Generic clock generator 8"] + GCLK8 = 1, +} +impl From<GENCTRL3_A> for bool { + #[inline(always)] + fn from(variant: GENCTRL3_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `GENCTRL3` reader - Generic Clock Generator Control 3 Synchronization Busy bits"] +pub struct GENCTRL3_R(crate::FieldReader<bool, GENCTRL3_A>); +impl GENCTRL3_R { + pub(crate) fn new(bits: bool) -> Self { + GENCTRL3_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<GENCTRL3_A> { + match self.bits { + true => Some(GENCTRL3_A::GCLK0), + true => Some(GENCTRL3_A::GCLK1), + true => Some(GENCTRL3_A::GCLK2), + true => Some(GENCTRL3_A::GCLK3), + true => Some(GENCTRL3_A::GCLK4), + true => Some(GENCTRL3_A::GCLK5), + true => Some(GENCTRL3_A::GCLK6), + true => Some(GENCTRL3_A::GCLK7), + true => Some(GENCTRL3_A::GCLK8), + _ => None, + } + } + #[doc = "Checks if the value of the field is `GCLK0`"] + #[inline(always)] + pub fn is_gclk0(&self) -> bool { + **self == GENCTRL3_A::GCLK0 + } + #[doc = "Checks if the value of the field is `GCLK1`"] + #[inline(always)] + pub fn is_gclk1(&self) -> bool { + **self == GENCTRL3_A::GCLK1 + } + #[doc = "Checks if the value of the field is `GCLK2`"] + #[inline(always)] + pub fn is_gclk2(&self) -> bool { + **self == GENCTRL3_A::GCLK2 + } + #[doc = "Checks if the value of the field is `GCLK3`"] + #[inline(always)] + pub fn is_gclk3(&self) -> bool { + **self == GENCTRL3_A::GCLK3 + } + #[doc = "Checks if the value of the field is `GCLK4`"] + #[inline(always)] + pub fn is_gclk4(&self) -> bool { + **self == GENCTRL3_A::GCLK4 + } + #[doc = "Checks if the value of the field is `GCLK5`"] + #[inline(always)] + pub fn is_gclk5(&self) -> bool { + **self == GENCTRL3_A::GCLK5 + } + #[doc = "Checks if the value of the field is `GCLK6`"] + #[inline(always)] + pub fn is_gclk6(&self) -> bool { + **self == GENCTRL3_A::GCLK6 + } + #[doc = "Checks if the value of the field is `GCLK7`"] + #[inline(always)] + pub fn is_gclk7(&self) -> bool { + **self == GENCTRL3_A::GCLK7 + } + #[doc = "Checks if the value of the field is `GCLK8`"] + #[inline(always)] + pub fn is_gclk8(&self) -> bool { + **self == GENCTRL3_A::GCLK8 + } +} +impl core::ops::Deref for GENCTRL3_R { + type Target = crate::FieldReader<bool, GENCTRL3_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Generic Clock Generator Control 4 Synchronization Busy bits\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum GENCTRL4_A { + #[doc = "1: Generic clock generator 0"] + GCLK0 = 1, + #[doc = "1: Generic clock generator 1"] + GCLK1 = 1, + #[doc = "1: Generic clock generator 2"] + GCLK2 = 1, + #[doc = "1: Generic clock generator 3"] + GCLK3 = 1, + #[doc = "1: Generic clock generator 4"] + GCLK4 = 1, + #[doc = "1: Generic clock generator 5"] + GCLK5 = 1, + #[doc = "1: Generic clock generator 6"] + GCLK6 = 1, + #[doc = "1: Generic clock generator 7"] + GCLK7 = 1, + #[doc = "1: Generic clock generator 8"] + GCLK8 = 1, +} +impl From<GENCTRL4_A> for bool { + #[inline(always)] + fn from(variant: GENCTRL4_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `GENCTRL4` reader - Generic Clock Generator Control 4 Synchronization Busy bits"] +pub struct GENCTRL4_R(crate::FieldReader<bool, GENCTRL4_A>); +impl GENCTRL4_R { + pub(crate) fn new(bits: bool) -> Self { + GENCTRL4_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<GENCTRL4_A> { + match self.bits { + true => Some(GENCTRL4_A::GCLK0), + true => Some(GENCTRL4_A::GCLK1), + true => Some(GENCTRL4_A::GCLK2), + true => Some(GENCTRL4_A::GCLK3), + true => Some(GENCTRL4_A::GCLK4), + true => Some(GENCTRL4_A::GCLK5), + true => Some(GENCTRL4_A::GCLK6), + true => Some(GENCTRL4_A::GCLK7), + true => Some(GENCTRL4_A::GCLK8), + _ => None, + } + } + #[doc = "Checks if the value of the field is `GCLK0`"] + #[inline(always)] + pub fn is_gclk0(&self) -> bool { + **self == GENCTRL4_A::GCLK0 + } + #[doc = "Checks if the value of the field is `GCLK1`"] + #[inline(always)] + pub fn is_gclk1(&self) -> bool { + **self == GENCTRL4_A::GCLK1 + } + #[doc = "Checks if the value of the field is `GCLK2`"] + #[inline(always)] + pub fn is_gclk2(&self) -> bool { + **self == GENCTRL4_A::GCLK2 + } + #[doc = "Checks if the value of the field is `GCLK3`"] + #[inline(always)] + pub fn is_gclk3(&self) -> bool { + **self == GENCTRL4_A::GCLK3 + } + #[doc = "Checks if the value of the field is `GCLK4`"] + #[inline(always)] + pub fn is_gclk4(&self) -> bool { + **self == GENCTRL4_A::GCLK4 + } + #[doc = "Checks if the value of the field is `GCLK5`"] + #[inline(always)] + pub fn is_gclk5(&self) -> bool { + **self == GENCTRL4_A::GCLK5 + } + #[doc = "Checks if the value of the field is `GCLK6`"] + #[inline(always)] + pub fn is_gclk6(&self) -> bool { + **self == GENCTRL4_A::GCLK6 + } + #[doc = "Checks if the value of the field is `GCLK7`"] + #[inline(always)] + pub fn is_gclk7(&self) -> bool { + **self == GENCTRL4_A::GCLK7 + } + #[doc = "Checks if the value of the field is `GCLK8`"] + #[inline(always)] + pub fn is_gclk8(&self) -> bool { + **self == GENCTRL4_A::GCLK8 + } +} +impl core::ops::Deref for GENCTRL4_R { + type Target = crate::FieldReader<bool, GENCTRL4_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Generic Clock Generator Control 5 Synchronization Busy bits\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum GENCTRL5_A { + #[doc = "1: Generic clock generator 0"] + GCLK0 = 1, + #[doc = "1: Generic clock generator 1"] + GCLK1 = 1, + #[doc = "1: Generic clock generator 2"] + GCLK2 = 1, + #[doc = "1: Generic clock generator 3"] + GCLK3 = 1, + #[doc = "1: Generic clock generator 4"] + GCLK4 = 1, + #[doc = "1: Generic clock generator 5"] + GCLK5 = 1, + #[doc = "1: Generic clock generator 6"] + GCLK6 = 1, + #[doc = "1: Generic clock generator 7"] + GCLK7 = 1, + #[doc = "1: Generic clock generator 8"] + GCLK8 = 1, +} +impl From<GENCTRL5_A> for bool { + #[inline(always)] + fn from(variant: GENCTRL5_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `GENCTRL5` reader - Generic Clock Generator Control 5 Synchronization Busy bits"] +pub struct GENCTRL5_R(crate::FieldReader<bool, GENCTRL5_A>); +impl GENCTRL5_R { + pub(crate) fn new(bits: bool) -> Self { + GENCTRL5_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<GENCTRL5_A> { + match self.bits { + true => Some(GENCTRL5_A::GCLK0), + true => Some(GENCTRL5_A::GCLK1), + true => Some(GENCTRL5_A::GCLK2), + true => Some(GENCTRL5_A::GCLK3), + true => Some(GENCTRL5_A::GCLK4), + true => Some(GENCTRL5_A::GCLK5), + true => Some(GENCTRL5_A::GCLK6), + true => Some(GENCTRL5_A::GCLK7), + true => Some(GENCTRL5_A::GCLK8), + _ => None, + } + } + #[doc = "Checks if the value of the field is `GCLK0`"] + #[inline(always)] + pub fn is_gclk0(&self) -> bool { + **self == GENCTRL5_A::GCLK0 + } + #[doc = "Checks if the value of the field is `GCLK1`"] + #[inline(always)] + pub fn is_gclk1(&self) -> bool { + **self == GENCTRL5_A::GCLK1 + } + #[doc = "Checks if the value of the field is `GCLK2`"] + #[inline(always)] + pub fn is_gclk2(&self) -> bool { + **self == GENCTRL5_A::GCLK2 + } + #[doc = "Checks if the value of the field is `GCLK3`"] + #[inline(always)] + pub fn is_gclk3(&self) -> bool { + **self == GENCTRL5_A::GCLK3 + } + #[doc = "Checks if the value of the field is `GCLK4`"] + #[inline(always)] + pub fn is_gclk4(&self) -> bool { + **self == GENCTRL5_A::GCLK4 + } + #[doc = "Checks if the value of the field is `GCLK5`"] + #[inline(always)] + pub fn is_gclk5(&self) -> bool { + **self == GENCTRL5_A::GCLK5 + } + #[doc = "Checks if the value of the field is `GCLK6`"] + #[inline(always)] + pub fn is_gclk6(&self) -> bool { + **self == GENCTRL5_A::GCLK6 + } + #[doc = "Checks if the value of the field is `GCLK7`"] + #[inline(always)] + pub fn is_gclk7(&self) -> bool { + **self == GENCTRL5_A::GCLK7 + } + #[doc = "Checks if the value of the field is `GCLK8`"] + #[inline(always)] + pub fn is_gclk8(&self) -> bool { + **self == GENCTRL5_A::GCLK8 + } +} +impl core::ops::Deref for GENCTRL5_R { + type Target = crate::FieldReader<bool, GENCTRL5_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Generic Clock Generator Control 6 Synchronization Busy bits\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum GENCTRL6_A { + #[doc = "1: Generic clock generator 0"] + GCLK0 = 1, + #[doc = "1: Generic clock generator 1"] + GCLK1 = 1, + #[doc = "1: Generic clock generator 2"] + GCLK2 = 1, + #[doc = "1: Generic clock generator 3"] + GCLK3 = 1, + #[doc = "1: Generic clock generator 4"] + GCLK4 = 1, + #[doc = "1: Generic clock generator 5"] + GCLK5 = 1, + #[doc = "1: Generic clock generator 6"] + GCLK6 = 1, + #[doc = "1: Generic clock generator 7"] + GCLK7 = 1, + #[doc = "1: Generic clock generator 8"] + GCLK8 = 1, +} +impl From<GENCTRL6_A> for bool { + #[inline(always)] + fn from(variant: GENCTRL6_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `GENCTRL6` reader - Generic Clock Generator Control 6 Synchronization Busy bits"] +pub struct GENCTRL6_R(crate::FieldReader<bool, GENCTRL6_A>); +impl GENCTRL6_R { + pub(crate) fn new(bits: bool) -> Self { + GENCTRL6_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<GENCTRL6_A> { + match self.bits { + true => Some(GENCTRL6_A::GCLK0), + true => Some(GENCTRL6_A::GCLK1), + true => Some(GENCTRL6_A::GCLK2), + true => Some(GENCTRL6_A::GCLK3), + true => Some(GENCTRL6_A::GCLK4), + true => Some(GENCTRL6_A::GCLK5), + true => Some(GENCTRL6_A::GCLK6), + true => Some(GENCTRL6_A::GCLK7), + true => Some(GENCTRL6_A::GCLK8), + _ => None, + } + } + #[doc = "Checks if the value of the field is `GCLK0`"] + #[inline(always)] + pub fn is_gclk0(&self) -> bool { + **self == GENCTRL6_A::GCLK0 + } + #[doc = "Checks if the value of the field is `GCLK1`"] + #[inline(always)] + pub fn is_gclk1(&self) -> bool { + **self == GENCTRL6_A::GCLK1 + } + #[doc = "Checks if the value of the field is `GCLK2`"] + #[inline(always)] + pub fn is_gclk2(&self) -> bool { + **self == GENCTRL6_A::GCLK2 + } + #[doc = "Checks if the value of the field is `GCLK3`"] + #[inline(always)] + pub fn is_gclk3(&self) -> bool { + **self == GENCTRL6_A::GCLK3 + } + #[doc = "Checks if the value of the field is `GCLK4`"] + #[inline(always)] + pub fn is_gclk4(&self) -> bool { + **self == GENCTRL6_A::GCLK4 + } + #[doc = "Checks if the value of the field is `GCLK5`"] + #[inline(always)] + pub fn is_gclk5(&self) -> bool { + **self == GENCTRL6_A::GCLK5 + } + #[doc = "Checks if the value of the field is `GCLK6`"] + #[inline(always)] + pub fn is_gclk6(&self) -> bool { + **self == GENCTRL6_A::GCLK6 + } + #[doc = "Checks if the value of the field is `GCLK7`"] + #[inline(always)] + pub fn is_gclk7(&self) -> bool { + **self == GENCTRL6_A::GCLK7 + } + #[doc = "Checks if the value of the field is `GCLK8`"] + #[inline(always)] + pub fn is_gclk8(&self) -> bool { + **self == GENCTRL6_A::GCLK8 + } +} +impl core::ops::Deref for GENCTRL6_R { + type Target = crate::FieldReader<bool, GENCTRL6_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Generic Clock Generator Control 7 Synchronization Busy bits\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum GENCTRL7_A { + #[doc = "1: Generic clock generator 0"] + GCLK0 = 1, + #[doc = "1: Generic clock generator 1"] + GCLK1 = 1, + #[doc = "1: Generic clock generator 2"] + GCLK2 = 1, + #[doc = "1: Generic clock generator 3"] + GCLK3 = 1, + #[doc = "1: Generic clock generator 4"] + GCLK4 = 1, + #[doc = "1: Generic clock generator 5"] + GCLK5 = 1, + #[doc = "1: Generic clock generator 6"] + GCLK6 = 1, + #[doc = "1: Generic clock generator 7"] + GCLK7 = 1, + #[doc = "1: Generic clock generator 8"] + GCLK8 = 1, +} +impl From<GENCTRL7_A> for bool { + #[inline(always)] + fn from(variant: GENCTRL7_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `GENCTRL7` reader - Generic Clock Generator Control 7 Synchronization Busy bits"] +pub struct GENCTRL7_R(crate::FieldReader<bool, GENCTRL7_A>); +impl GENCTRL7_R { + pub(crate) fn new(bits: bool) -> Self { + GENCTRL7_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<GENCTRL7_A> { + match self.bits { + true => Some(GENCTRL7_A::GCLK0), + true => Some(GENCTRL7_A::GCLK1), + true => Some(GENCTRL7_A::GCLK2), + true => Some(GENCTRL7_A::GCLK3), + true => Some(GENCTRL7_A::GCLK4), + true => Some(GENCTRL7_A::GCLK5), + true => Some(GENCTRL7_A::GCLK6), + true => Some(GENCTRL7_A::GCLK7), + true => Some(GENCTRL7_A::GCLK8), + _ => None, + } + } + #[doc = "Checks if the value of the field is `GCLK0`"] + #[inline(always)] + pub fn is_gclk0(&self) -> bool { + **self == GENCTRL7_A::GCLK0 + } + #[doc = "Checks if the value of the field is `GCLK1`"] + #[inline(always)] + pub fn is_gclk1(&self) -> bool { + **self == GENCTRL7_A::GCLK1 + } + #[doc = "Checks if the value of the field is `GCLK2`"] + #[inline(always)] + pub fn is_gclk2(&self) -> bool { + **self == GENCTRL7_A::GCLK2 + } + #[doc = "Checks if the value of the field is `GCLK3`"] + #[inline(always)] + pub fn is_gclk3(&self) -> bool { + **self == GENCTRL7_A::GCLK3 + } + #[doc = "Checks if the value of the field is `GCLK4`"] + #[inline(always)] + pub fn is_gclk4(&self) -> bool { + **self == GENCTRL7_A::GCLK4 + } + #[doc = "Checks if the value of the field is `GCLK5`"] + #[inline(always)] + pub fn is_gclk5(&self) -> bool { + **self == GENCTRL7_A::GCLK5 + } + #[doc = "Checks if the value of the field is `GCLK6`"] + #[inline(always)] + pub fn is_gclk6(&self) -> bool { + **self == GENCTRL7_A::GCLK6 + } + #[doc = "Checks if the value of the field is `GCLK7`"] + #[inline(always)] + pub fn is_gclk7(&self) -> bool { + **self == GENCTRL7_A::GCLK7 + } + #[doc = "Checks if the value of the field is `GCLK8`"] + #[inline(always)] + pub fn is_gclk8(&self) -> bool { + **self == GENCTRL7_A::GCLK8 + } +} +impl core::ops::Deref for GENCTRL7_R { + type Target = crate::FieldReader<bool, GENCTRL7_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Generic Clock Generator Control 8 Synchronization Busy bits\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum GENCTRL8_A { + #[doc = "1: Generic clock generator 0"] + GCLK0 = 1, + #[doc = "1: Generic clock generator 1"] + GCLK1 = 1, + #[doc = "1: Generic clock generator 2"] + GCLK2 = 1, + #[doc = "1: Generic clock generator 3"] + GCLK3 = 1, + #[doc = "1: Generic clock generator 4"] + GCLK4 = 1, + #[doc = "1: Generic clock generator 5"] + GCLK5 = 1, + #[doc = "1: Generic clock generator 6"] + GCLK6 = 1, + #[doc = "1: Generic clock generator 7"] + GCLK7 = 1, + #[doc = "1: Generic clock generator 8"] + GCLK8 = 1, +} +impl From<GENCTRL8_A> for bool { + #[inline(always)] + fn from(variant: GENCTRL8_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `GENCTRL8` reader - Generic Clock Generator Control 8 Synchronization Busy bits"] +pub struct GENCTRL8_R(crate::FieldReader<bool, GENCTRL8_A>); +impl GENCTRL8_R { + pub(crate) fn new(bits: bool) -> Self { + GENCTRL8_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<GENCTRL8_A> { + match self.bits { + true => Some(GENCTRL8_A::GCLK0), + true => Some(GENCTRL8_A::GCLK1), + true => Some(GENCTRL8_A::GCLK2), + true => Some(GENCTRL8_A::GCLK3), + true => Some(GENCTRL8_A::GCLK4), + true => Some(GENCTRL8_A::GCLK5), + true => Some(GENCTRL8_A::GCLK6), + true => Some(GENCTRL8_A::GCLK7), + true => Some(GENCTRL8_A::GCLK8), + _ => None, + } + } + #[doc = "Checks if the value of the field is `GCLK0`"] + #[inline(always)] + pub fn is_gclk0(&self) -> bool { + **self == GENCTRL8_A::GCLK0 + } + #[doc = "Checks if the value of the field is `GCLK1`"] + #[inline(always)] + pub fn is_gclk1(&self) -> bool { + **self == GENCTRL8_A::GCLK1 + } + #[doc = "Checks if the value of the field is `GCLK2`"] + #[inline(always)] + pub fn is_gclk2(&self) -> bool { + **self == GENCTRL8_A::GCLK2 + } + #[doc = "Checks if the value of the field is `GCLK3`"] + #[inline(always)] + pub fn is_gclk3(&self) -> bool { + **self == GENCTRL8_A::GCLK3 + } + #[doc = "Checks if the value of the field is `GCLK4`"] + #[inline(always)] + pub fn is_gclk4(&self) -> bool { + **self == GENCTRL8_A::GCLK4 + } + #[doc = "Checks if the value of the field is `GCLK5`"] + #[inline(always)] + pub fn is_gclk5(&self) -> bool { + **self == GENCTRL8_A::GCLK5 + } + #[doc = "Checks if the value of the field is `GCLK6`"] + #[inline(always)] + pub fn is_gclk6(&self) -> bool { + **self == GENCTRL8_A::GCLK6 + } + #[doc = "Checks if the value of the field is `GCLK7`"] + #[inline(always)] + pub fn is_gclk7(&self) -> bool { + **self == GENCTRL8_A::GCLK7 + } + #[doc = "Checks if the value of the field is `GCLK8`"] + #[inline(always)] + pub fn is_gclk8(&self) -> bool { + **self == GENCTRL8_A::GCLK8 + } +} +impl core::ops::Deref for GENCTRL8_R { + type Target = crate::FieldReader<bool, GENCTRL8_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bit 0 - Software Reset Synchroniation Busy bit"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 2 - Generic Clock Generator Control 0 Synchronization Busy bits"] + #[inline(always)] + pub fn genctrl0(&self) -> GENCTRL0_R { + GENCTRL0_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Generic Clock Generator Control 1 Synchronization Busy bits"] + #[inline(always)] + pub fn genctrl1(&self) -> GENCTRL1_R { + GENCTRL1_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Generic Clock Generator Control 2 Synchronization Busy bits"] + #[inline(always)] + pub fn genctrl2(&self) -> GENCTRL2_R { + GENCTRL2_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Generic Clock Generator Control 3 Synchronization Busy bits"] + #[inline(always)] + pub fn genctrl3(&self) -> GENCTRL3_R { + GENCTRL3_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Generic Clock Generator Control 4 Synchronization Busy bits"] + #[inline(always)] + pub fn genctrl4(&self) -> GENCTRL4_R { + GENCTRL4_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Generic Clock Generator Control 5 Synchronization Busy bits"] + #[inline(always)] + pub fn genctrl5(&self) -> GENCTRL5_R { + GENCTRL5_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Generic Clock Generator Control 6 Synchronization Busy bits"] + #[inline(always)] + pub fn genctrl6(&self) -> GENCTRL6_R { + GENCTRL6_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 9 - Generic Clock Generator Control 7 Synchronization Busy bits"] + #[inline(always)] + pub fn genctrl7(&self) -> GENCTRL7_R { + GENCTRL7_R::new(((self.bits >> 9) & 0x01) != 0) + } + #[doc = "Bit 10 - Generic Clock Generator Control 8 Synchronization Busy bits"] + #[inline(always)] + pub fn genctrl8(&self) -> GENCTRL8_R { + GENCTRL8_R::new(((self.bits >> 10) & 0x01) != 0) + } +} +#[doc = "Synchronization Busy\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] +pub struct SYNCBUSY_SPEC; +impl crate::RegisterSpec for SYNCBUSY_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] +impl crate::Readable for SYNCBUSY_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets SYNCBUSY to value 0"] +impl crate::Resettable for SYNCBUSY_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} |