diff options
Diffstat (limited to 'src/pm/stdbycfg.rs')
| -rw-r--r-- | src/pm/stdbycfg.rs | 200 |
1 files changed, 200 insertions, 0 deletions
diff --git a/src/pm/stdbycfg.rs b/src/pm/stdbycfg.rs new file mode 100644 index 0000000..4520038 --- /dev/null +++ b/src/pm/stdbycfg.rs @@ -0,0 +1,200 @@ +#[doc = "Register `STDBYCFG` reader"] +pub struct R(crate::R<STDBYCFG_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<STDBYCFG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<STDBYCFG_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<STDBYCFG_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `STDBYCFG` writer"] +pub struct W(crate::W<STDBYCFG_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<STDBYCFG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<STDBYCFG_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<STDBYCFG_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Voltage Regulator Standby mode\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum VREGSMOD_A { + #[doc = "0: Automatic mode"] + AUTO = 0, + #[doc = "1: Performance oriented"] + PERFORMANCE = 1, + #[doc = "2: Low Power oriented"] + LP = 2, +} +impl From<VREGSMOD_A> for u8 { + #[inline(always)] + fn from(variant: VREGSMOD_A) -> Self { + variant as _ + } +} +#[doc = "Field `VREGSMOD` reader - Voltage Regulator Standby mode"] +pub struct VREGSMOD_R(crate::FieldReader<u8, VREGSMOD_A>); +impl VREGSMOD_R { + pub(crate) fn new(bits: u8) -> Self { + VREGSMOD_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<VREGSMOD_A> { + match self.bits { + 0 => Some(VREGSMOD_A::AUTO), + 1 => Some(VREGSMOD_A::PERFORMANCE), + 2 => Some(VREGSMOD_A::LP), + _ => None, + } + } + #[doc = "Checks if the value of the field is `AUTO`"] + #[inline(always)] + pub fn is_auto(&self) -> bool { + **self == VREGSMOD_A::AUTO + } + #[doc = "Checks if the value of the field is `PERFORMANCE`"] + #[inline(always)] + pub fn is_performance(&self) -> bool { + **self == VREGSMOD_A::PERFORMANCE + } + #[doc = "Checks if the value of the field is `LP`"] + #[inline(always)] + pub fn is_lp(&self) -> bool { + **self == VREGSMOD_A::LP + } +} +impl core::ops::Deref for VREGSMOD_R { + type Target = crate::FieldReader<u8, VREGSMOD_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `VREGSMOD` writer - Voltage Regulator Standby mode"] +pub struct VREGSMOD_W<'a> { + w: &'a mut W, +} +impl<'a> VREGSMOD_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: VREGSMOD_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "Automatic mode"] + #[inline(always)] + pub fn auto(self) -> &'a mut W { + self.variant(VREGSMOD_A::AUTO) + } + #[doc = "Performance oriented"] + #[inline(always)] + pub fn performance(self) -> &'a mut W { + self.variant(VREGSMOD_A::PERFORMANCE) + } + #[doc = "Low Power oriented"] + #[inline(always)] + pub fn lp(self) -> &'a mut W { + self.variant(VREGSMOD_A::LP) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u16 & 0x03) << 6); + self.w + } +} +#[doc = "Field `BBIASHS` reader - Back Bias for HMCRAMCHS"] +pub struct BBIASHS_R(crate::FieldReader<u8, u8>); +impl BBIASHS_R { + pub(crate) fn new(bits: u8) -> Self { + BBIASHS_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for BBIASHS_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `BBIASHS` writer - Back Bias for HMCRAMCHS"] +pub struct BBIASHS_W<'a> { + w: &'a mut W, +} +impl<'a> BBIASHS_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u16 & 0x03) << 10); + self.w + } +} +impl R { + #[doc = "Bits 6:7 - Voltage Regulator Standby mode"] + #[inline(always)] + pub fn vregsmod(&self) -> VREGSMOD_R { + VREGSMOD_R::new(((self.bits >> 6) & 0x03) as u8) + } + #[doc = "Bits 10:11 - Back Bias for HMCRAMCHS"] + #[inline(always)] + pub fn bbiashs(&self) -> BBIASHS_R { + BBIASHS_R::new(((self.bits >> 10) & 0x03) as u8) + } +} +impl W { + #[doc = "Bits 6:7 - Voltage Regulator Standby mode"] + #[inline(always)] + pub fn vregsmod(&mut self) -> VREGSMOD_W { + VREGSMOD_W { w: self } + } + #[doc = "Bits 10:11 - Back Bias for HMCRAMCHS"] + #[inline(always)] + pub fn bbiashs(&mut self) -> BBIASHS_W { + BBIASHS_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Standby Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stdbycfg](index.html) module"] +pub struct STDBYCFG_SPEC; +impl crate::RegisterSpec for STDBYCFG_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [stdbycfg::R](R) reader structure"] +impl crate::Readable for STDBYCFG_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [stdbycfg::W](W) writer structure"] +impl crate::Writable for STDBYCFG_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets STDBYCFG to value 0x0400"] +impl crate::Resettable for STDBYCFG_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0x0400 + } +} |