diff options
Diffstat (limited to 'src/sercom0/usart_ext')
| -rw-r--r-- | src/sercom0/usart_ext/baud.rs | 102 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/baud_frac_mode.rs | 138 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/baud_fracfp_mode.rs | 138 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/baud_usartfp_mode.rs | 102 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/ctrla.rs | 1158 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/ctrlb.rs | 642 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/ctrlc.rs | 174 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/data.rs | 102 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/dbgctrl.rs | 112 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/intenclr.rs | 388 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/intenset.rs | 388 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/intflag.rs | 388 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/rxpl.rs | 102 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/status.rs | 388 | ||||
| -rw-r--r-- | src/sercom0/usart_ext/syncbusy.rs | 90 |
15 files changed, 4412 insertions, 0 deletions
diff --git a/src/sercom0/usart_ext/baud.rs b/src/sercom0/usart_ext/baud.rs new file mode 100644 index 0000000..da7444a --- /dev/null +++ b/src/sercom0/usart_ext/baud.rs @@ -0,0 +1,102 @@ +#[doc = "Register `BAUD` reader"] +pub struct R(crate::R<BAUD_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<BAUD_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<BAUD_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<BAUD_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `BAUD` writer"] +pub struct W(crate::W<BAUD_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<BAUD_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<BAUD_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<BAUD_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `BAUD` reader - Baud Rate Value"] +pub struct BAUD_R(crate::FieldReader<u16, u16>); +impl BAUD_R { + pub(crate) fn new(bits: u16) -> Self { + BAUD_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for BAUD_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `BAUD` writer - Baud Rate Value"] +pub struct BAUD_W<'a> { + w: &'a mut W, +} +impl<'a> BAUD_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u16 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - Baud Rate Value"] + #[inline(always)] + pub fn baud(&self) -> BAUD_R { + BAUD_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - Baud Rate Value"] + #[inline(always)] + pub fn baud(&mut self) -> BAUD_W { + BAUD_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud](index.html) module"] +pub struct BAUD_SPEC; +impl crate::RegisterSpec for BAUD_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [baud::R](R) reader structure"] +impl crate::Readable for BAUD_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [baud::W](W) writer structure"] +impl crate::Writable for BAUD_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets BAUD to value 0"] +impl crate::Resettable for BAUD_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/baud_frac_mode.rs b/src/sercom0/usart_ext/baud_frac_mode.rs new file mode 100644 index 0000000..31e0a81 --- /dev/null +++ b/src/sercom0/usart_ext/baud_frac_mode.rs @@ -0,0 +1,138 @@ +#[doc = "Register `BAUD_FRAC_MODE` reader"] +pub struct R(crate::R<BAUD_FRAC_MODE_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<BAUD_FRAC_MODE_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<BAUD_FRAC_MODE_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<BAUD_FRAC_MODE_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `BAUD_FRAC_MODE` writer"] +pub struct W(crate::W<BAUD_FRAC_MODE_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<BAUD_FRAC_MODE_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<BAUD_FRAC_MODE_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<BAUD_FRAC_MODE_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `BAUD` reader - Baud Rate Value"] +pub struct BAUD_R(crate::FieldReader<u16, u16>); +impl BAUD_R { + pub(crate) fn new(bits: u16) -> Self { + BAUD_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for BAUD_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `BAUD` writer - Baud Rate Value"] +pub struct BAUD_W<'a> { + w: &'a mut W, +} +impl<'a> BAUD_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0x1fff) | (value as u16 & 0x1fff); + self.w + } +} +#[doc = "Field `FP` reader - Fractional Part"] +pub struct FP_R(crate::FieldReader<u8, u8>); +impl FP_R { + pub(crate) fn new(bits: u8) -> Self { + FP_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FP_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FP` writer - Fractional Part"] +pub struct FP_W<'a> { + w: &'a mut W, +} +impl<'a> FP_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u16 & 0x07) << 13); + self.w + } +} +impl R { + #[doc = "Bits 0:12 - Baud Rate Value"] + #[inline(always)] + pub fn baud(&self) -> BAUD_R { + BAUD_R::new((self.bits & 0x1fff) as u16) + } + #[doc = "Bits 13:15 - Fractional Part"] + #[inline(always)] + pub fn fp(&self) -> FP_R { + FP_R::new(((self.bits >> 13) & 0x07) as u8) + } +} +impl W { + #[doc = "Bits 0:12 - Baud Rate Value"] + #[inline(always)] + pub fn baud(&mut self) -> BAUD_W { + BAUD_W { w: self } + } + #[doc = "Bits 13:15 - Fractional Part"] + #[inline(always)] + pub fn fp(&mut self) -> FP_W { + FP_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud_frac_mode](index.html) module"] +pub struct BAUD_FRAC_MODE_SPEC; +impl crate::RegisterSpec for BAUD_FRAC_MODE_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [baud_frac_mode::R](R) reader structure"] +impl crate::Readable for BAUD_FRAC_MODE_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [baud_frac_mode::W](W) writer structure"] +impl crate::Writable for BAUD_FRAC_MODE_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets BAUD_FRAC_MODE to value 0"] +impl crate::Resettable for BAUD_FRAC_MODE_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/baud_fracfp_mode.rs b/src/sercom0/usart_ext/baud_fracfp_mode.rs new file mode 100644 index 0000000..833e44a --- /dev/null +++ b/src/sercom0/usart_ext/baud_fracfp_mode.rs @@ -0,0 +1,138 @@ +#[doc = "Register `BAUD_FRACFP_MODE` reader"] +pub struct R(crate::R<BAUD_FRACFP_MODE_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<BAUD_FRACFP_MODE_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<BAUD_FRACFP_MODE_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<BAUD_FRACFP_MODE_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `BAUD_FRACFP_MODE` writer"] +pub struct W(crate::W<BAUD_FRACFP_MODE_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<BAUD_FRACFP_MODE_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<BAUD_FRACFP_MODE_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<BAUD_FRACFP_MODE_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `BAUD` reader - Baud Rate Value"] +pub struct BAUD_R(crate::FieldReader<u16, u16>); +impl BAUD_R { + pub(crate) fn new(bits: u16) -> Self { + BAUD_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for BAUD_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `BAUD` writer - Baud Rate Value"] +pub struct BAUD_W<'a> { + w: &'a mut W, +} +impl<'a> BAUD_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0x1fff) | (value as u16 & 0x1fff); + self.w + } +} +#[doc = "Field `FP` reader - Fractional Part"] +pub struct FP_R(crate::FieldReader<u8, u8>); +impl FP_R { + pub(crate) fn new(bits: u8) -> Self { + FP_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FP_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FP` writer - Fractional Part"] +pub struct FP_W<'a> { + w: &'a mut W, +} +impl<'a> FP_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u16 & 0x07) << 13); + self.w + } +} +impl R { + #[doc = "Bits 0:12 - Baud Rate Value"] + #[inline(always)] + pub fn baud(&self) -> BAUD_R { + BAUD_R::new((self.bits & 0x1fff) as u16) + } + #[doc = "Bits 13:15 - Fractional Part"] + #[inline(always)] + pub fn fp(&self) -> FP_R { + FP_R::new(((self.bits >> 13) & 0x07) as u8) + } +} +impl W { + #[doc = "Bits 0:12 - Baud Rate Value"] + #[inline(always)] + pub fn baud(&mut self) -> BAUD_W { + BAUD_W { w: self } + } + #[doc = "Bits 13:15 - Fractional Part"] + #[inline(always)] + pub fn fp(&mut self) -> FP_W { + FP_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud_fracfp_mode](index.html) module"] +pub struct BAUD_FRACFP_MODE_SPEC; +impl crate::RegisterSpec for BAUD_FRACFP_MODE_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [baud_fracfp_mode::R](R) reader structure"] +impl crate::Readable for BAUD_FRACFP_MODE_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [baud_fracfp_mode::W](W) writer structure"] +impl crate::Writable for BAUD_FRACFP_MODE_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets BAUD_FRACFP_MODE to value 0"] +impl crate::Resettable for BAUD_FRACFP_MODE_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/baud_usartfp_mode.rs b/src/sercom0/usart_ext/baud_usartfp_mode.rs new file mode 100644 index 0000000..f992604 --- /dev/null +++ b/src/sercom0/usart_ext/baud_usartfp_mode.rs @@ -0,0 +1,102 @@ +#[doc = "Register `BAUD_USARTFP_MODE` reader"] +pub struct R(crate::R<BAUD_USARTFP_MODE_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<BAUD_USARTFP_MODE_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<BAUD_USARTFP_MODE_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<BAUD_USARTFP_MODE_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `BAUD_USARTFP_MODE` writer"] +pub struct W(crate::W<BAUD_USARTFP_MODE_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<BAUD_USARTFP_MODE_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<BAUD_USARTFP_MODE_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<BAUD_USARTFP_MODE_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `BAUD` reader - Baud Rate Value"] +pub struct BAUD_R(crate::FieldReader<u16, u16>); +impl BAUD_R { + pub(crate) fn new(bits: u16) -> Self { + BAUD_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for BAUD_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `BAUD` writer - Baud Rate Value"] +pub struct BAUD_W<'a> { + w: &'a mut W, +} +impl<'a> BAUD_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u16 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - Baud Rate Value"] + #[inline(always)] + pub fn baud(&self) -> BAUD_R { + BAUD_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - Baud Rate Value"] + #[inline(always)] + pub fn baud(&mut self) -> BAUD_W { + BAUD_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Baud Rate\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud_usartfp_mode](index.html) module"] +pub struct BAUD_USARTFP_MODE_SPEC; +impl crate::RegisterSpec for BAUD_USARTFP_MODE_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [baud_usartfp_mode::R](R) reader structure"] +impl crate::Readable for BAUD_USARTFP_MODE_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [baud_usartfp_mode::W](W) writer structure"] +impl crate::Writable for BAUD_USARTFP_MODE_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets BAUD_USARTFP_MODE to value 0"] +impl crate::Resettable for BAUD_USARTFP_MODE_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/ctrla.rs b/src/sercom0/usart_ext/ctrla.rs new file mode 100644 index 0000000..9431067 --- /dev/null +++ b/src/sercom0/usart_ext/ctrla.rs @@ -0,0 +1,1158 @@ +#[doc = "Register `CTRLA` reader"] +pub struct R(crate::R<CTRLA_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CTRLA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CTRLA_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CTRLA_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `CTRLA` writer"] +pub struct W(crate::W<CTRLA_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<CTRLA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<CTRLA_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<CTRLA_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `SWRST` reader - Software Reset"] +pub struct SWRST_R(crate::FieldReader<bool, bool>); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SWRST` writer - Software Reset"] +pub struct SWRST_W<'a> { + w: &'a mut W, +} +impl<'a> SWRST_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); + self.w + } +} +#[doc = "Field `ENABLE` reader - Enable"] +pub struct ENABLE_R(crate::FieldReader<bool, bool>); +impl ENABLE_R { + pub(crate) fn new(bits: bool) -> Self { + ENABLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENABLE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENABLE` writer - Enable"] +pub struct ENABLE_W<'a> { + w: &'a mut W, +} +impl<'a> ENABLE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); + self.w + } +} +#[doc = "Operating Mode\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum MODE_A { + #[doc = "0: USART with external clock"] + USART_EXT_CLK = 0, + #[doc = "1: USART with internal clock"] + USART_INT_CLK = 1, + #[doc = "2: SPI in slave operation"] + SPI_SLAVE = 2, + #[doc = "3: SPI in master operation"] + SPI_MASTER = 3, + #[doc = "4: I2C slave operation"] + I2C_SLAVE = 4, + #[doc = "5: I2C master operation"] + I2C_MASTER = 5, +} +impl From<MODE_A> for u8 { + #[inline(always)] + fn from(variant: MODE_A) -> Self { + variant as _ + } +} +#[doc = "Field `MODE` reader - Operating Mode"] +pub struct MODE_R(crate::FieldReader<u8, MODE_A>); +impl MODE_R { + pub(crate) fn new(bits: u8) -> Self { + MODE_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<MODE_A> { + match self.bits { + 0 => Some(MODE_A::USART_EXT_CLK), + 1 => Some(MODE_A::USART_INT_CLK), + 2 => Some(MODE_A::SPI_SLAVE), + 3 => Some(MODE_A::SPI_MASTER), + 4 => Some(MODE_A::I2C_SLAVE), + 5 => Some(MODE_A::I2C_MASTER), + _ => None, + } + } + #[doc = "Checks if the value of the field is `USART_EXT_CLK`"] + #[inline(always)] + pub fn is_usart_ext_clk(&self) -> bool { + **self == MODE_A::USART_EXT_CLK + } + #[doc = "Checks if the value of the field is `USART_INT_CLK`"] + #[inline(always)] + pub fn is_usart_int_clk(&self) -> bool { + **self == MODE_A::USART_INT_CLK + } + #[doc = "Checks if the value of the field is `SPI_SLAVE`"] + #[inline(always)] + pub fn is_spi_slave(&self) -> bool { + **self == MODE_A::SPI_SLAVE + } + #[doc = "Checks if the value of the field is `SPI_MASTER`"] + #[inline(always)] + pub fn is_spi_master(&self) -> bool { + **self == MODE_A::SPI_MASTER + } + #[doc = "Checks if the value of the field is `I2C_SLAVE`"] + #[inline(always)] + pub fn is_i2c_slave(&self) -> bool { + **self == MODE_A::I2C_SLAVE + } + #[doc = "Checks if the value of the field is `I2C_MASTER`"] + #[inline(always)] + pub fn is_i2c_master(&self) -> bool { + **self == MODE_A::I2C_MASTER + } +} +impl core::ops::Deref for MODE_R { + type Target = crate::FieldReader<u8, MODE_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MODE` writer - Operating Mode"] +pub struct MODE_W<'a> { + w: &'a mut W, +} +impl<'a> MODE_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: MODE_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "USART with external clock"] + #[inline(always)] + pub fn usart_ext_clk(self) -> &'a mut W { + self.variant(MODE_A::USART_EXT_CLK) + } + #[doc = "USART with internal clock"] + #[inline(always)] + pub fn usart_int_clk(self) -> &'a mut W { + self.variant(MODE_A::USART_INT_CLK) + } + #[doc = "SPI in slave operation"] + #[inline(always)] + pub fn spi_slave(self) -> &'a mut W { + self.variant(MODE_A::SPI_SLAVE) + } + #[doc = "SPI in master operation"] + #[inline(always)] + pub fn spi_master(self) -> &'a mut W { + self.variant(MODE_A::SPI_MASTER) + } + #[doc = "I2C slave operation"] + #[inline(always)] + pub fn i2c_slave(self) -> &'a mut W { + self.variant(MODE_A::I2C_SLAVE) + } + #[doc = "I2C master operation"] + #[inline(always)] + pub fn i2c_master(self) -> &'a mut W { + self.variant(MODE_A::I2C_MASTER) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 2)) | ((value as u32 & 0x07) << 2); + self.w + } +} +#[doc = "Field `RUNSTDBY` reader - Run during Standby"] +pub struct RUNSTDBY_R(crate::FieldReader<bool, bool>); +impl RUNSTDBY_R { + pub(crate) fn new(bits: bool) -> Self { + RUNSTDBY_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RUNSTDBY_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RUNSTDBY` writer - Run during Standby"] +pub struct RUNSTDBY_W<'a> { + w: &'a mut W, +} +impl<'a> RUNSTDBY_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); + self.w + } +} +#[doc = "Field `IBON` reader - Immediate Buffer Overflow Notification"] +pub struct IBON_R(crate::FieldReader<bool, bool>); +impl IBON_R { + pub(crate) fn new(bits: bool) -> Self { + IBON_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for IBON_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `IBON` writer - Immediate Buffer Overflow Notification"] +pub struct IBON_W<'a> { + w: &'a mut W, +} +impl<'a> IBON_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); + self.w + } +} +#[doc = "Sample\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SAMPR_A { + #[doc = "0: 16x over-sampling using arithmetic baudrate generation"] + _16X_ARITHMETIC = 0, + #[doc = "1: 16x over-sampling using fractional baudrate generation"] + _16X_FRACTIONAL = 1, + #[doc = "2: 8x over-sampling using arithmetic baudrate generation"] + _8X_ARITHMETIC = 2, + #[doc = "3: 8x over-sampling using fractional baudrate generation"] + _8X_FRACTIONAL = 3, + #[doc = "4: 3x over-sampling using arithmetic baudrate generation"] + _3X_ARITHMETIC = 4, +} +impl From<SAMPR_A> for u8 { + #[inline(always)] + fn from(variant: SAMPR_A) -> Self { + variant as _ + } +} +#[doc = "Field `SAMPR` reader - Sample"] +pub struct SAMPR_R(crate::FieldReader<u8, SAMPR_A>); +impl SAMPR_R { + pub(crate) fn new(bits: u8) -> Self { + SAMPR_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<SAMPR_A> { + match self.bits { + 0 => Some(SAMPR_A::_16X_ARITHMETIC), + 1 => Some(SAMPR_A::_16X_FRACTIONAL), + 2 => Some(SAMPR_A::_8X_ARITHMETIC), + 3 => Some(SAMPR_A::_8X_FRACTIONAL), + 4 => Some(SAMPR_A::_3X_ARITHMETIC), + _ => None, + } + } + #[doc = "Checks if the value of the field is `_16X_ARITHMETIC`"] + #[inline(always)] + pub fn is_16x_arithmetic(&self) -> bool { + **self == SAMPR_A::_16X_ARITHMETIC + } + #[doc = "Checks if the value of the field is `_16X_FRACTIONAL`"] + #[inline(always)] + pub fn is_16x_fractional(&self) -> bool { + **self == SAMPR_A::_16X_FRACTIONAL + } + #[doc = "Checks if the value of the field is `_8X_ARITHMETIC`"] + #[inline(always)] + pub fn is_8x_arithmetic(&self) -> bool { + **self == SAMPR_A::_8X_ARITHMETIC + } + #[doc = "Checks if the value of the field is `_8X_FRACTIONAL`"] + #[inline(always)] + pub fn is_8x_fractional(&self) -> bool { + **self == SAMPR_A::_8X_FRACTIONAL + } + #[doc = "Checks if the value of the field is `_3X_ARITHMETIC`"] + #[inline(always)] + pub fn is_3x_arithmetic(&self) -> bool { + **self == SAMPR_A::_3X_ARITHMETIC + } +} +impl core::ops::Deref for SAMPR_R { + type Target = crate::FieldReader<u8, SAMPR_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SAMPR` writer - Sample"] +pub struct SAMPR_W<'a> { + w: &'a mut W, +} +impl<'a> SAMPR_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SAMPR_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "16x over-sampling using arithmetic baudrate generation"] + #[inline(always)] + pub fn _16x_arithmetic(self) -> &'a mut W { + self.variant(SAMPR_A::_16X_ARITHMETIC) + } + #[doc = "16x over-sampling using fractional baudrate generation"] + #[inline(always)] + pub fn _16x_fractional(self) -> &'a mut W { + self.variant(SAMPR_A::_16X_FRACTIONAL) + } + #[doc = "8x over-sampling using arithmetic baudrate generation"] + #[inline(always)] + pub fn _8x_arithmetic(self) -> &'a mut W { + self.variant(SAMPR_A::_8X_ARITHMETIC) + } + #[doc = "8x over-sampling using fractional baudrate generation"] + #[inline(always)] + pub fn _8x_fractional(self) -> &'a mut W { + self.variant(SAMPR_A::_8X_FRACTIONAL) + } + #[doc = "3x over-sampling using arithmetic baudrate generation"] + #[inline(always)] + pub fn _3x_arithmetic(self) -> &'a mut W { + self.variant(SAMPR_A::_3X_ARITHMETIC) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13); + self.w + } +} +#[doc = "Transmit Data Pinout\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum TXPO_A { + #[doc = "0: SERCOM PAD\\[0\\] +is used for data transmission"] + PAD0 = 0, + #[doc = "1: SERCOM PAD\\[2\\] +is used for data transmission"] + PAD2 = 1, +} +impl From<TXPO_A> for u8 { + #[inline(always)] + fn from(variant: TXPO_A) -> Self { + variant as _ + } +} +#[doc = "Field `TXPO` reader - Transmit Data Pinout"] +pub struct TXPO_R(crate::FieldReader<u8, TXPO_A>); +impl TXPO_R { + pub(crate) fn new(bits: u8) -> Self { + TXPO_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<TXPO_A> { + match self.bits { + 0 => Some(TXPO_A::PAD0), + 1 => Some(TXPO_A::PAD2), + _ => None, + } + } + #[doc = "Checks if the value of the field is `PAD0`"] + #[inline(always)] + pub fn is_pad0(&self) -> bool { + **self == TXPO_A::PAD0 + } + #[doc = "Checks if the value of the field is `PAD2`"] + #[inline(always)] + pub fn is_pad2(&self) -> bool { + **self == TXPO_A::PAD2 + } +} +impl core::ops::Deref for TXPO_R { + type Target = crate::FieldReader<u8, TXPO_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `TXPO` writer - Transmit Data Pinout"] +pub struct TXPO_W<'a> { + w: &'a mut W, +} +impl<'a> TXPO_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: TXPO_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "SERCOM PAD\\[0\\] +is used for data transmission"] + #[inline(always)] + pub fn pad0(self) -> &'a mut W { + self.variant(TXPO_A::PAD0) + } + #[doc = "SERCOM PAD\\[2\\] +is used for data transmission"] + #[inline(always)] + pub fn pad2(self) -> &'a mut W { + self.variant(TXPO_A::PAD2) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); + self.w + } +} +#[doc = "Receive Data Pinout\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum RXPO_A { + #[doc = "0: SERCOM PAD\\[0\\] +is used for data reception"] + PAD0 = 0, + #[doc = "1: SERCOM PAD\\[1\\] +is used for data reception"] + PAD1 = 1, + #[doc = "2: SERCOM PAD\\[2\\] +is used for data reception"] + PAD2 = 2, + #[doc = "3: SERCOM PAD\\[3\\] +is used for data reception"] + PAD3 = 3, +} +impl From<RXPO_A> for u8 { + #[inline(always)] + fn from(variant: RXPO_A) -> Self { + variant as _ + } +} +#[doc = "Field `RXPO` reader - Receive Data Pinout"] +pub struct RXPO_R(crate::FieldReader<u8, RXPO_A>); +impl RXPO_R { + pub(crate) fn new(bits: u8) -> Self { + RXPO_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> RXPO_A { + match self.bits { + 0 => RXPO_A::PAD0, + 1 => RXPO_A::PAD1, + 2 => RXPO_A::PAD2, + 3 => RXPO_A::PAD3, + _ => unreachable!(), + } + } + #[doc = "Checks if the value of the field is `PAD0`"] + #[inline(always)] + pub fn is_pad0(&self) -> bool { + **self == RXPO_A::PAD0 + } + #[doc = "Checks if the value of the field is `PAD1`"] + #[inline(always)] + pub fn is_pad1(&self) -> bool { + **self == RXPO_A::PAD1 + } + #[doc = "Checks if the value of the field is `PAD2`"] + #[inline(always)] + pub fn is_pad2(&self) -> bool { + **self == RXPO_A::PAD2 + } + #[doc = "Checks if the value of the field is `PAD3`"] + #[inline(always)] + pub fn is_pad3(&self) -> bool { + **self == RXPO_A::PAD3 + } +} +impl core::ops::Deref for RXPO_R { + type Target = crate::FieldReader<u8, RXPO_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RXPO` writer - Receive Data Pinout"] +pub struct RXPO_W<'a> { + w: &'a mut W, +} +impl<'a> RXPO_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: RXPO_A) -> &'a mut W { + self.bits(variant.into()) + } + #[doc = "SERCOM PAD\\[0\\] +is used for data reception"] + #[inline(always)] + pub fn pad0(self) -> &'a mut W { + self.variant(RXPO_A::PAD0) + } + #[doc = "SERCOM PAD\\[1\\] +is used for data reception"] + #[inline(always)] + pub fn pad1(self) -> &'a mut W { + self.variant(RXPO_A::PAD1) + } + #[doc = "SERCOM PAD\\[2\\] +is used for data reception"] + #[inline(always)] + pub fn pad2(self) -> &'a mut W { + self.variant(RXPO_A::PAD2) + } + #[doc = "SERCOM PAD\\[3\\] +is used for data reception"] + #[inline(always)] + pub fn pad3(self) -> &'a mut W { + self.variant(RXPO_A::PAD3) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); + self.w + } +} +#[doc = "Field `SAMPA` reader - Sample Adjustment"] +pub struct SAMPA_R(crate::FieldReader<u8, u8>); +impl SAMPA_R { + pub(crate) fn new(bits: u8) -> Self { + SAMPA_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SAMPA_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SAMPA` writer - Sample Adjustment"] +pub struct SAMPA_W<'a> { + w: &'a mut W, +} +impl<'a> SAMPA_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); + self.w + } +} +#[doc = "Frame Format\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum FORM_A { + #[doc = "0: USART frame"] + USART_FRAME_NO_PARITY = 0, + #[doc = "1: USART frame with parity"] + USART_FRAME_WITH_PARITY = 1, + #[doc = "2: LIN Master - Break and sync generation"] + USART_FRAME_LIN_MASTER_MODE = 2, + #[doc = "4: Auto-baud - break detection and auto-baud"] + USART_FRAME_AUTO_BAUD_NO_PARITY = 4, + #[doc = "5: Auto-baud - break detection and auto-baud with parity"] + USART_FRAME_AUTO_BAUD_WITH_PARITY = 5, +} +impl From<FORM_A> for u8 { + #[inline(always)] + fn from(variant: FORM_A) -> Self { + variant as _ + } +} +#[doc = "Field `FORM` reader - Frame Format"] +pub struct FORM_R(crate::FieldReader<u8, FORM_A>); +impl FORM_R { + pub(crate) fn new(bits: u8) -> Self { + FORM_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<FORM_A> { + match self.bits { + 0 => Some(FORM_A::USART_FRAME_NO_PARITY), + 1 => Some(FORM_A::USART_FRAME_WITH_PARITY), + 2 => Some(FORM_A::USART_FRAME_LIN_MASTER_MODE), + 4 => Some(FORM_A::USART_FRAME_AUTO_BAUD_NO_PARITY), + 5 => Some(FORM_A::USART_FRAME_AUTO_BAUD_WITH_PARITY), + _ => None, + } + } + #[doc = "Checks if the value of the field is `USART_FRAME_NO_PARITY`"] + #[inline(always)] + pub fn is_usart_frame_no_parity(&self) -> bool { + **self == FORM_A::USART_FRAME_NO_PARITY + } + #[doc = "Checks if the value of the field is `USART_FRAME_WITH_PARITY`"] + #[inline(always)] + pub fn is_usart_frame_with_parity(&self) -> bool { + **self == FORM_A::USART_FRAME_WITH_PARITY + } + #[doc = "Checks if the value of the field is `USART_FRAME_LIN_MASTER_MODE`"] + #[inline(always)] + pub fn is_usart_frame_lin_master_mode(&self) -> bool { + **self == FORM_A::USART_FRAME_LIN_MASTER_MODE + } + #[doc = "Checks if the value of the field is `USART_FRAME_AUTO_BAUD_NO_PARITY`"] + #[inline(always)] + pub fn is_usart_frame_auto_baud_no_parity(&self) -> bool { + **self == FORM_A::USART_FRAME_AUTO_BAUD_NO_PARITY + } + #[doc = "Checks if the value of the field is `USART_FRAME_AUTO_BAUD_WITH_PARITY`"] + #[inline(always)] + pub fn is_usart_frame_auto_baud_with_parity(&self) -> bool { + **self == FORM_A::USART_FRAME_AUTO_BAUD_WITH_PARITY + } +} +impl core::ops::Deref for FORM_R { + type Target = crate::FieldReader<u8, FORM_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FORM` writer - Frame Format"] +pub struct FORM_W<'a> { + w: &'a mut W, +} +impl<'a> FORM_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: FORM_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "USART frame"] + #[inline(always)] + pub fn usart_frame_no_parity(self) -> &'a mut W { + self.variant(FORM_A::USART_FRAME_NO_PARITY) + } + #[doc = "USART frame with parity"] + #[inline(always)] + pub fn usart_frame_with_parity(self) -> &'a mut W { + self.variant(FORM_A::USART_FRAME_WITH_PARITY) + } + #[doc = "LIN Master - Break and sync generation"] + #[inline(always)] + pub fn usart_frame_lin_master_mode(self) -> &'a mut W { + self.variant(FORM_A::USART_FRAME_LIN_MASTER_MODE) + } + #[doc = "Auto-baud - break detection and auto-baud"] + #[inline(always)] + pub fn usart_frame_auto_baud_no_parity(self) -> &'a mut W { + self.variant(FORM_A::USART_FRAME_AUTO_BAUD_NO_PARITY) + } + #[doc = "Auto-baud - break detection and auto-baud with parity"] + #[inline(always)] + pub fn usart_frame_auto_baud_with_parity(self) -> &'a mut W { + self.variant(FORM_A::USART_FRAME_AUTO_BAUD_WITH_PARITY) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24); + self.w + } +} +#[doc = "Communication Mode\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum CMODE_A { + #[doc = "0: Asynchronous Communication"] + ASYNC = 0, + #[doc = "1: Synchronous Communication"] + SYNC = 1, +} +impl From<CMODE_A> for bool { + #[inline(always)] + fn from(variant: CMODE_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `CMODE` reader - Communication Mode"] +pub struct CMODE_R(crate::FieldReader<bool, CMODE_A>); +impl CMODE_R { + pub(crate) fn new(bits: bool) -> Self { + CMODE_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> CMODE_A { + match self.bits { + false => CMODE_A::ASYNC, + true => CMODE_A::SYNC, + } + } + #[doc = "Checks if the value of the field is `ASYNC`"] + #[inline(always)] + pub fn is_async(&self) -> bool { + **self == CMODE_A::ASYNC + } + #[doc = "Checks if the value of the field is `SYNC`"] + #[inline(always)] + pub fn is_sync(&self) -> bool { + **self == CMODE_A::SYNC + } +} +impl core::ops::Deref for CMODE_R { + type Target = crate::FieldReader<bool, CMODE_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CMODE` writer - Communication Mode"] +pub struct CMODE_W<'a> { + w: &'a mut W, +} +impl<'a> CMODE_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: CMODE_A) -> &'a mut W { + self.bit(variant.into()) + } + #[doc = "Asynchronous Communication"] + #[inline(always)] + pub fn async_(self) -> &'a mut W { + self.variant(CMODE_A::ASYNC) + } + #[doc = "Synchronous Communication"] + #[inline(always)] + pub fn sync(self) -> &'a mut W { + self.variant(CMODE_A::SYNC) + } + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); + self.w + } +} +#[doc = "Clock Polarity\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum CPOL_A { + #[doc = "0: TxD Change:- Rising XCK edge, RxD Sample:- Falling XCK edge"] + IDLE_LOW = 0, + #[doc = "1: TxD Change:- Falling XCK edge, RxD Sample:- Rising XCK edge"] + IDLE_HIGH = 1, +} +impl From<CPOL_A> for bool { + #[inline(always)] + fn from(variant: CPOL_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `CPOL` reader - Clock Polarity"] +pub struct CPOL_R(crate::FieldReader<bool, CPOL_A>); +impl CPOL_R { + pub(crate) fn new(bits: bool) -> Self { + CPOL_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> CPOL_A { + match self.bits { + false => CPOL_A::IDLE_LOW, + true => CPOL_A::IDLE_HIGH, + } + } + #[doc = "Checks if the value of the field is `IDLE_LOW`"] + #[inline(always)] + pub fn is_idle_low(&self) -> bool { + **self == CPOL_A::IDLE_LOW + } + #[doc = "Checks if the value of the field is `IDLE_HIGH`"] + #[inline(always)] + pub fn is_idle_high(&self) -> bool { + **self == CPOL_A::IDLE_HIGH + } +} +impl core::ops::Deref for CPOL_R { + type Target = crate::FieldReader<bool, CPOL_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CPOL` writer - Clock Polarity"] +pub struct CPOL_W<'a> { + w: &'a mut W, +} +impl<'a> CPOL_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: CPOL_A) -> &'a mut W { + self.bit(variant.into()) + } + #[doc = "TxD Change:- Rising XCK edge, RxD Sample:- Falling XCK edge"] + #[inline(always)] + pub fn idle_low(self) -> &'a mut W { + self.variant(CPOL_A::IDLE_LOW) + } + #[doc = "TxD Change:- Falling XCK edge, RxD Sample:- Rising XCK edge"] + #[inline(always)] + pub fn idle_high(self) -> &'a mut W { + self.variant(CPOL_A::IDLE_HIGH) + } + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); + self.w + } +} +#[doc = "Data Order\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum DORD_A { + #[doc = "0: MSB is transmitted first"] + MSB = 0, + #[doc = "1: LSB is transmitted first"] + LSB = 1, +} +impl From<DORD_A> for bool { + #[inline(always)] + fn from(variant: DORD_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `DORD` reader - Data Order"] +pub struct DORD_R(crate::FieldReader<bool, DORD_A>); +impl DORD_R { + pub(crate) fn new(bits: bool) -> Self { + DORD_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> DORD_A { + match self.bits { + false => DORD_A::MSB, + true => DORD_A::LSB, + } + } + #[doc = "Checks if the value of the field is `MSB`"] + #[inline(always)] + pub fn is_msb(&self) -> bool { + **self == DORD_A::MSB + } + #[doc = "Checks if the value of the field is `LSB`"] + #[inline(always)] + pub fn is_lsb(&self) -> bool { + **self == DORD_A::LSB + } +} +impl core::ops::Deref for DORD_R { + type Target = crate::FieldReader<bool, DORD_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DORD` writer - Data Order"] +pub struct DORD_W<'a> { + w: &'a mut W, +} +impl<'a> DORD_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: DORD_A) -> &'a mut W { + self.bit(variant.into()) + } + #[doc = "MSB is transmitted first"] + #[inline(always)] + pub fn msb(self) -> &'a mut W { + self.variant(DORD_A::MSB) + } + #[doc = "LSB is transmitted first"] + #[inline(always)] + pub fn lsb(self) -> &'a mut W { + self.variant(DORD_A::LSB) + } + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); + self.w + } +} +impl R { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Enable"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bits 2:4 - Operating Mode"] + #[inline(always)] + pub fn mode(&self) -> MODE_R { + MODE_R::new(((self.bits >> 2) & 0x07) as u8) + } + #[doc = "Bit 7 - Run during Standby"] + #[inline(always)] + pub fn runstdby(&self) -> RUNSTDBY_R { + RUNSTDBY_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Immediate Buffer Overflow Notification"] + #[inline(always)] + pub fn ibon(&self) -> IBON_R { + IBON_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bits 13:15 - Sample"] + #[inline(always)] + pub fn sampr(&self) -> SAMPR_R { + SAMPR_R::new(((self.bits >> 13) & 0x07) as u8) + } + #[doc = "Bits 16:17 - Transmit Data Pinout"] + #[inline(always)] + pub fn txpo(&self) -> TXPO_R { + TXPO_R::new(((self.bits >> 16) & 0x03) as u8) + } + #[doc = "Bits 20:21 - Receive Data Pinout"] + #[inline(always)] + pub fn rxpo(&self) -> RXPO_R { + RXPO_R::new(((self.bits >> 20) & 0x03) as u8) + } + #[doc = "Bits 22:23 - Sample Adjustment"] + #[inline(always)] + pub fn sampa(&self) -> SAMPA_R { + SAMPA_R::new(((self.bits >> 22) & 0x03) as u8) + } + #[doc = "Bits 24:27 - Frame Format"] + #[inline(always)] + pub fn form(&self) -> FORM_R { + FORM_R::new(((self.bits >> 24) & 0x0f) as u8) + } + #[doc = "Bit 28 - Communication Mode"] + #[inline(always)] + pub fn cmode(&self) -> CMODE_R { + CMODE_R::new(((self.bits >> 28) & 0x01) != 0) + } + #[doc = "Bit 29 - Clock Polarity"] + #[inline(always)] + pub fn cpol(&self) -> CPOL_R { + CPOL_R::new(((self.bits >> 29) & 0x01) != 0) + } + #[doc = "Bit 30 - Data Order"] + #[inline(always)] + pub fn dord(&self) -> DORD_R { + DORD_R::new(((self.bits >> 30) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&mut self) -> SWRST_W { + SWRST_W { w: self } + } + #[doc = "Bit 1 - Enable"] + #[inline(always)] + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W { w: self } + } + #[doc = "Bits 2:4 - Operating Mode"] + #[inline(always)] + pub fn mode(&mut self) -> MODE_W { + MODE_W { w: self } + } + #[doc = "Bit 7 - Run during Standby"] + #[inline(always)] + pub fn runstdby(&mut self) -> RUNSTDBY_W { + RUNSTDBY_W { w: self } + } + #[doc = "Bit 8 - Immediate Buffer Overflow Notification"] + #[inline(always)] + pub fn ibon(&mut self) -> IBON_W { + IBON_W { w: self } + } + #[doc = "Bits 13:15 - Sample"] + #[inline(always)] + pub fn sampr(&mut self) -> SAMPR_W { + SAMPR_W { w: self } + } + #[doc = "Bits 16:17 - Transmit Data Pinout"] + #[inline(always)] + pub fn txpo(&mut self) -> TXPO_W { + TXPO_W { w: self } + } + #[doc = "Bits 20:21 - Receive Data Pinout"] + #[inline(always)] + pub fn rxpo(&mut self) -> RXPO_W { + RXPO_W { w: self } + } + #[doc = "Bits 22:23 - Sample Adjustment"] + #[inline(always)] + pub fn sampa(&mut self) -> SAMPA_W { + SAMPA_W { w: self } + } + #[doc = "Bits 24:27 - Frame Format"] + #[inline(always)] + pub fn form(&mut self) -> FORM_W { + FORM_W { w: self } + } + #[doc = "Bit 28 - Communication Mode"] + #[inline(always)] + pub fn cmode(&mut self) -> CMODE_W { + CMODE_W { w: self } + } + #[doc = "Bit 29 - Clock Polarity"] + #[inline(always)] + pub fn cpol(&mut self) -> CPOL_W { + CPOL_W { w: self } + } + #[doc = "Bit 30 - Data Order"] + #[inline(always)] + pub fn dord(&mut self) -> DORD_W { + DORD_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"] +pub struct CTRLA_SPEC; +impl crate::RegisterSpec for CTRLA_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [ctrla::R](R) reader structure"] +impl crate::Readable for CTRLA_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"] +impl crate::Writable for CTRLA_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CTRLA to value 0"] +impl crate::Resettable for CTRLA_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/ctrlb.rs b/src/sercom0/usart_ext/ctrlb.rs new file mode 100644 index 0000000..7b13e7f --- /dev/null +++ b/src/sercom0/usart_ext/ctrlb.rs @@ -0,0 +1,642 @@ +#[doc = "Register `CTRLB` reader"] +pub struct R(crate::R<CTRLB_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CTRLB_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CTRLB_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CTRLB_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `CTRLB` writer"] +pub struct W(crate::W<CTRLB_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<CTRLB_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<CTRLB_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<CTRLB_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Character Size\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum CHSIZE_A { + #[doc = "0: 8 Bits"] + _8_BIT = 0, + #[doc = "1: 9 Bits"] + _9_BIT = 1, + #[doc = "5: 5 Bits"] + _5_BIT = 5, + #[doc = "6: 6 Bits"] + _6_BIT = 6, + #[doc = "7: 7 Bits"] + _7_BIT = 7, +} +impl From<CHSIZE_A> for u8 { + #[inline(always)] + fn from(variant: CHSIZE_A) -> Self { + variant as _ + } +} +#[doc = "Field `CHSIZE` reader - Character Size"] +pub struct CHSIZE_R(crate::FieldReader<u8, CHSIZE_A>); +impl CHSIZE_R { + pub(crate) fn new(bits: u8) -> Self { + CHSIZE_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<CHSIZE_A> { + match self.bits { + 0 => Some(CHSIZE_A::_8_BIT), + 1 => Some(CHSIZE_A::_9_BIT), + 5 => Some(CHSIZE_A::_5_BIT), + 6 => Some(CHSIZE_A::_6_BIT), + 7 => Some(CHSIZE_A::_7_BIT), + _ => None, + } + } + #[doc = "Checks if the value of the field is `_8_BIT`"] + #[inline(always)] + pub fn is_8_bit(&self) -> bool { + **self == CHSIZE_A::_8_BIT + } + #[doc = "Checks if the value of the field is `_9_BIT`"] + #[inline(always)] + pub fn is_9_bit(&self) -> bool { + **self == CHSIZE_A::_9_BIT + } + #[doc = "Checks if the value of the field is `_5_BIT`"] + #[inline(always)] + pub fn is_5_bit(&self) -> bool { + **self == CHSIZE_A::_5_BIT + } + #[doc = "Checks if the value of the field is `_6_BIT`"] + #[inline(always)] + pub fn is_6_bit(&self) -> bool { + **self == CHSIZE_A::_6_BIT + } + #[doc = "Checks if the value of the field is `_7_BIT`"] + #[inline(always)] + pub fn is_7_bit(&self) -> bool { + **self == CHSIZE_A::_7_BIT + } +} +impl core::ops::Deref for CHSIZE_R { + type Target = crate::FieldReader<u8, CHSIZE_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CHSIZE` writer - Character Size"] +pub struct CHSIZE_W<'a> { + w: &'a mut W, +} +impl<'a> CHSIZE_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: CHSIZE_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "8 Bits"] + #[inline(always)] + pub fn _8_bit(self) -> &'a mut W { + self.variant(CHSIZE_A::_8_BIT) + } + #[doc = "9 Bits"] + #[inline(always)] + pub fn _9_bit(self) -> &'a mut W { + self.variant(CHSIZE_A::_9_BIT) + } + #[doc = "5 Bits"] + #[inline(always)] + pub fn _5_bit(self) -> &'a mut W { + self.variant(CHSIZE_A::_5_BIT) + } + #[doc = "6 Bits"] + #[inline(always)] + pub fn _6_bit(self) -> &'a mut W { + self.variant(CHSIZE_A::_6_BIT) + } + #[doc = "7 Bits"] + #[inline(always)] + pub fn _7_bit(self) -> &'a mut W { + self.variant(CHSIZE_A::_7_BIT) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); + self.w + } +} +#[doc = "Stop Bit Mode\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum SBMODE_A { + #[doc = "0: One Stop Bit"] + _1_BIT = 0, + #[doc = "1: Two Stop Bits"] + _2_BIT = 1, +} +impl From<SBMODE_A> for bool { + #[inline(always)] + fn from(variant: SBMODE_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `SBMODE` reader - Stop Bit Mode"] +pub struct SBMODE_R(crate::FieldReader<bool, SBMODE_A>); +impl SBMODE_R { + pub(crate) fn new(bits: bool) -> Self { + SBMODE_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> SBMODE_A { + match self.bits { + false => SBMODE_A::_1_BIT, + true => SBMODE_A::_2_BIT, + } + } + #[doc = "Checks if the value of the field is `_1_BIT`"] + #[inline(always)] + pub fn is_1_bit(&self) -> bool { + **self == SBMODE_A::_1_BIT + } + #[doc = "Checks if the value of the field is `_2_BIT`"] + #[inline(always)] + pub fn is_2_bit(&self) -> bool { + **self == SBMODE_A::_2_BIT + } +} +impl core::ops::Deref for SBMODE_R { + type Target = crate::FieldReader<bool, SBMODE_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SBMODE` writer - Stop Bit Mode"] +pub struct SBMODE_W<'a> { + w: &'a mut W, +} +impl<'a> SBMODE_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SBMODE_A) -> &'a mut W { + self.bit(variant.into()) + } + #[doc = "One Stop Bit"] + #[inline(always)] + pub fn _1_bit(self) -> &'a mut W { + self.variant(SBMODE_A::_1_BIT) + } + #[doc = "Two Stop Bits"] + #[inline(always)] + pub fn _2_bit(self) -> &'a mut W { + self.variant(SBMODE_A::_2_BIT) + } + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); + self.w + } +} +#[doc = "Field `COLDEN` reader - Collision Detection Enable"] +pub struct COLDEN_R(crate::FieldReader<bool, bool>); +impl COLDEN_R { + pub(crate) fn new(bits: bool) -> Self { + COLDEN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COLDEN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COLDEN` writer - Collision Detection Enable"] +pub struct COLDEN_W<'a> { + w: &'a mut W, +} +impl<'a> COLDEN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); + self.w + } +} +#[doc = "Field `SFDE` reader - Start of Frame Detection Enable"] +pub struct SFDE_R(crate::FieldReader<bool, bool>); +impl SFDE_R { + pub(crate) fn new(bits: bool) -> Self { + SFDE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SFDE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SFDE` writer - Start of Frame Detection Enable"] +pub struct SFDE_W<'a> { + w: &'a mut W, +} +impl<'a> SFDE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); + self.w + } +} +#[doc = "Field `ENC` reader - Encoding Format"] +pub struct ENC_R(crate::FieldReader<bool, bool>); +impl ENC_R { + pub(crate) fn new(bits: bool) -> Self { + ENC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENC_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENC` writer - Encoding Format"] +pub struct ENC_W<'a> { + w: &'a mut W, +} +impl<'a> ENC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); + self.w + } +} +#[doc = "Parity Mode\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum PMODE_A { + #[doc = "0: Even Parity"] + EVEN = 0, + #[doc = "1: Odd Parity"] + ODD = 1, +} +impl From<PMODE_A> for bool { + #[inline(always)] + fn from(variant: PMODE_A) -> Self { + variant as u8 != 0 + } +} +#[doc = "Field `PMODE` reader - Parity Mode"] +pub struct PMODE_R(crate::FieldReader<bool, PMODE_A>); +impl PMODE_R { + pub(crate) fn new(bits: bool) -> Self { + PMODE_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> PMODE_A { + match self.bits { + false => PMODE_A::EVEN, + true => PMODE_A::ODD, + } + } + #[doc = "Checks if the value of the field is `EVEN`"] + #[inline(always)] + pub fn is_even(&self) -> bool { + **self == PMODE_A::EVEN + } + #[doc = "Checks if the value of the field is `ODD`"] + #[inline(always)] + pub fn is_odd(&self) -> bool { + **self == PMODE_A::ODD + } +} +impl core::ops::Deref for PMODE_R { + type Target = crate::FieldReader<bool, PMODE_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PMODE` writer - Parity Mode"] +pub struct PMODE_W<'a> { + w: &'a mut W, +} +impl<'a> PMODE_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: PMODE_A) -> &'a mut W { + self.bit(variant.into()) + } + #[doc = "Even Parity"] + #[inline(always)] + pub fn even(self) -> &'a mut W { + self.variant(PMODE_A::EVEN) + } + #[doc = "Odd Parity"] + #[inline(always)] + pub fn odd(self) -> &'a mut W { + self.variant(PMODE_A::ODD) + } + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); + self.w + } +} +#[doc = "Field `TXEN` reader - Transmitter Enable"] +pub struct TXEN_R(crate::FieldReader<bool, bool>); +impl TXEN_R { + pub(crate) fn new(bits: bool) -> Self { + TXEN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for TXEN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `TXEN` writer - Transmitter Enable"] +pub struct TXEN_W<'a> { + w: &'a mut W, +} +impl<'a> TXEN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); + self.w + } +} +#[doc = "Field `RXEN` reader - Receiver Enable"] +pub struct RXEN_R(crate::FieldReader<bool, bool>); +impl RXEN_R { + pub(crate) fn new(bits: bool) -> Self { + RXEN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RXEN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RXEN` writer - Receiver Enable"] +pub struct RXEN_W<'a> { + w: &'a mut W, +} +impl<'a> RXEN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); + self.w + } +} +#[doc = "Field `LINCMD` reader - LIN Command"] +pub struct LINCMD_R(crate::FieldReader<u8, u8>); +impl LINCMD_R { + pub(crate) fn new(bits: u8) -> Self { + LINCMD_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for LINCMD_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `LINCMD` writer - LIN Command"] +pub struct LINCMD_W<'a> { + w: &'a mut W, +} +impl<'a> LINCMD_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); + self.w + } +} +impl R { + #[doc = "Bits 0:2 - Character Size"] + #[inline(always)] + pub fn chsize(&self) -> CHSIZE_R { + CHSIZE_R::new((self.bits & 0x07) as u8) + } + #[doc = "Bit 6 - Stop Bit Mode"] + #[inline(always)] + pub fn sbmode(&self) -> SBMODE_R { + SBMODE_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 8 - Collision Detection Enable"] + #[inline(always)] + pub fn colden(&self) -> COLDEN_R { + COLDEN_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 9 - Start of Frame Detection Enable"] + #[inline(always)] + pub fn sfde(&self) -> SFDE_R { + SFDE_R::new(((self.bits >> 9) & 0x01) != 0) + } + #[doc = "Bit 10 - Encoding Format"] + #[inline(always)] + pub fn enc(&self) -> ENC_R { + ENC_R::new(((self.bits >> 10) & 0x01) != 0) + } + #[doc = "Bit 13 - Parity Mode"] + #[inline(always)] + pub fn pmode(&self) -> PMODE_R { + PMODE_R::new(((self.bits >> 13) & 0x01) != 0) + } + #[doc = "Bit 16 - Transmitter Enable"] + #[inline(always)] + pub fn txen(&self) -> TXEN_R { + TXEN_R::new(((self.bits >> 16) & 0x01) != 0) + } + #[doc = "Bit 17 - Receiver Enable"] + #[inline(always)] + pub fn rxen(&self) -> RXEN_R { + RXEN_R::new(((self.bits >> 17) & 0x01) != 0) + } + #[doc = "Bits 24:25 - LIN Command"] + #[inline(always)] + pub fn lincmd(&self) -> LINCMD_R { + LINCMD_R::new(((self.bits >> 24) & 0x03) as u8) + } +} +impl W { + #[doc = "Bits 0:2 - Character Size"] + #[inline(always)] + pub fn chsize(&mut self) -> CHSIZE_W { + CHSIZE_W { w: self } + } + #[doc = "Bit 6 - Stop Bit Mode"] + #[inline(always)] + pub fn sbmode(&mut self) -> SBMODE_W { + SBMODE_W { w: self } + } + #[doc = "Bit 8 - Collision Detection Enable"] + #[inline(always)] + pub fn colden(&mut self) -> COLDEN_W { + COLDEN_W { w: self } + } + #[doc = "Bit 9 - Start of Frame Detection Enable"] + #[inline(always)] + pub fn sfde(&mut self) -> SFDE_W { + SFDE_W { w: self } + } + #[doc = "Bit 10 - Encoding Format"] + #[inline(always)] + pub fn enc(&mut self) -> ENC_W { + ENC_W { w: self } + } + #[doc = "Bit 13 - Parity Mode"] + #[inline(always)] + pub fn pmode(&mut self) -> PMODE_W { + PMODE_W { w: self } + } + #[doc = "Bit 16 - Transmitter Enable"] + #[inline(always)] + pub fn txen(&mut self) -> TXEN_W { + TXEN_W { w: self } + } + #[doc = "Bit 17 - Receiver Enable"] + #[inline(always)] + pub fn rxen(&mut self) -> RXEN_W { + RXEN_W { w: self } + } + #[doc = "Bits 24:25 - LIN Command"] + #[inline(always)] + pub fn lincmd(&mut self) -> LINCMD_W { + LINCMD_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"] +pub struct CTRLB_SPEC; +impl crate::RegisterSpec for CTRLB_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [ctrlb::R](R) reader structure"] +impl crate::Readable for CTRLB_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"] +impl crate::Writable for CTRLB_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CTRLB to value 0"] +impl crate::Resettable for CTRLB_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/ctrlc.rs b/src/sercom0/usart_ext/ctrlc.rs new file mode 100644 index 0000000..48bdae7 --- /dev/null +++ b/src/sercom0/usart_ext/ctrlc.rs @@ -0,0 +1,174 @@ +#[doc = "Register `CTRLC` reader"] +pub struct R(crate::R<CTRLC_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CTRLC_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CTRLC_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CTRLC_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `CTRLC` writer"] +pub struct W(crate::W<CTRLC_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<CTRLC_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<CTRLC_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<CTRLC_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `GTIME` reader - RS485 Guard Time"] +pub struct GTIME_R(crate::FieldReader<u8, u8>); +impl GTIME_R { + pub(crate) fn new(bits: u8) -> Self { + GTIME_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for GTIME_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `GTIME` writer - RS485 Guard Time"] +pub struct GTIME_W<'a> { + w: &'a mut W, +} +impl<'a> GTIME_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); + self.w + } +} +#[doc = "Field `BRKLEN` reader - LIN Master Break Length"] +pub struct BRKLEN_R(crate::FieldReader<u8, u8>); +impl BRKLEN_R { + pub(crate) fn new(bits: u8) -> Self { + BRKLEN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for BRKLEN_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `BRKLEN` writer - LIN Master Break Length"] +pub struct BRKLEN_W<'a> { + w: &'a mut W, +} +impl<'a> BRKLEN_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); + self.w + } +} +#[doc = "Field `HDRDLY` reader - LIN Master Header Delay"] +pub struct HDRDLY_R(crate::FieldReader<u8, u8>); +impl HDRDLY_R { + pub(crate) fn new(bits: u8) -> Self { + HDRDLY_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for HDRDLY_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `HDRDLY` writer - LIN Master Header Delay"] +pub struct HDRDLY_W<'a> { + w: &'a mut W, +} +impl<'a> HDRDLY_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); + self.w + } +} +impl R { + #[doc = "Bits 0:2 - RS485 Guard Time"] + #[inline(always)] + pub fn gtime(&self) -> GTIME_R { + GTIME_R::new((self.bits & 0x07) as u8) + } + #[doc = "Bits 8:9 - LIN Master Break Length"] + #[inline(always)] + pub fn brklen(&self) -> BRKLEN_R { + BRKLEN_R::new(((self.bits >> 8) & 0x03) as u8) + } + #[doc = "Bits 10:11 - LIN Master Header Delay"] + #[inline(always)] + pub fn hdrdly(&self) -> HDRDLY_R { + HDRDLY_R::new(((self.bits >> 10) & 0x03) as u8) + } +} +impl W { + #[doc = "Bits 0:2 - RS485 Guard Time"] + #[inline(always)] + pub fn gtime(&mut self) -> GTIME_W { + GTIME_W { w: self } + } + #[doc = "Bits 8:9 - LIN Master Break Length"] + #[inline(always)] + pub fn brklen(&mut self) -> BRKLEN_W { + BRKLEN_W { w: self } + } + #[doc = "Bits 10:11 - LIN Master Header Delay"] + #[inline(always)] + pub fn hdrdly(&mut self) -> HDRDLY_W { + HDRDLY_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Control C\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlc](index.html) module"] +pub struct CTRLC_SPEC; +impl crate::RegisterSpec for CTRLC_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [ctrlc::R](R) reader structure"] +impl crate::Readable for CTRLC_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [ctrlc::W](W) writer structure"] +impl crate::Writable for CTRLC_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CTRLC to value 0"] +impl crate::Resettable for CTRLC_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/data.rs b/src/sercom0/usart_ext/data.rs new file mode 100644 index 0000000..aae74e4 --- /dev/null +++ b/src/sercom0/usart_ext/data.rs @@ -0,0 +1,102 @@ +#[doc = "Register `DATA` reader"] +pub struct R(crate::R<DATA_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<DATA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<DATA_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<DATA_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `DATA` writer"] +pub struct W(crate::W<DATA_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<DATA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<DATA_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<DATA_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `DATA` reader - Data Value"] +pub struct DATA_R(crate::FieldReader<u16, u16>); +impl DATA_R { + pub(crate) fn new(bits: u16) -> Self { + DATA_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DATA_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DATA` writer - Data Value"] +pub struct DATA_W<'a> { + w: &'a mut W, +} +impl<'a> DATA_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01ff) | (value as u16 & 0x01ff); + self.w + } +} +impl R { + #[doc = "Bits 0:8 - Data Value"] + #[inline(always)] + pub fn data(&self) -> DATA_R { + DATA_R::new((self.bits & 0x01ff) as u16) + } +} +impl W { + #[doc = "Bits 0:8 - Data Value"] + #[inline(always)] + pub fn data(&mut self) -> DATA_W { + DATA_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Data\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"] +pub struct DATA_SPEC; +impl crate::RegisterSpec for DATA_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [data::R](R) reader structure"] +impl crate::Readable for DATA_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"] +impl crate::Writable for DATA_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets DATA to value 0"] +impl crate::Resettable for DATA_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/dbgctrl.rs b/src/sercom0/usart_ext/dbgctrl.rs new file mode 100644 index 0000000..9cd2669 --- /dev/null +++ b/src/sercom0/usart_ext/dbgctrl.rs @@ -0,0 +1,112 @@ +#[doc = "Register `DBGCTRL` reader"] +pub struct R(crate::R<DBGCTRL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<DBGCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<DBGCTRL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<DBGCTRL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `DBGCTRL` writer"] +pub struct W(crate::W<DBGCTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<DBGCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<DBGCTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<DBGCTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `DBGSTOP` reader - Debug Mode"] +pub struct DBGSTOP_R(crate::FieldReader<bool, bool>); +impl DBGSTOP_R { + pub(crate) fn new(bits: bool) -> Self { + DBGSTOP_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DBGSTOP_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DBGSTOP` writer - Debug Mode"] +pub struct DBGSTOP_W<'a> { + w: &'a mut W, +} +impl<'a> DBGSTOP_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +impl R { + #[doc = "Bit 0 - Debug Mode"] + #[inline(always)] + pub fn dbgstop(&self) -> DBGSTOP_R { + DBGSTOP_R::new((self.bits & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Debug Mode"] + #[inline(always)] + pub fn dbgstop(&mut self) -> DBGSTOP_W { + DBGSTOP_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Debug Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgctrl](index.html) module"] +pub struct DBGCTRL_SPEC; +impl crate::RegisterSpec for DBGCTRL_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [dbgctrl::R](R) reader structure"] +impl crate::Readable for DBGCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [dbgctrl::W](W) writer structure"] +impl crate::Writable for DBGCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets DBGCTRL to value 0"] +impl crate::Resettable for DBGCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/intenclr.rs b/src/sercom0/usart_ext/intenclr.rs new file mode 100644 index 0000000..b8134ff --- /dev/null +++ b/src/sercom0/usart_ext/intenclr.rs @@ -0,0 +1,388 @@ +#[doc = "Register `INTENCLR` reader"] +pub struct R(crate::R<INTENCLR_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<INTENCLR_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<INTENCLR_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<INTENCLR_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `INTENCLR` writer"] +pub struct W(crate::W<INTENCLR_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<INTENCLR_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<INTENCLR_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<INTENCLR_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `DRE` reader - Data Register Empty Interrupt Disable"] +pub struct DRE_R(crate::FieldReader<bool, bool>); +impl DRE_R { + pub(crate) fn new(bits: bool) -> Self { + DRE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DRE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DRE` writer - Data Register Empty Interrupt Disable"] +pub struct DRE_W<'a> { + w: &'a mut W, +} +impl<'a> DRE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +#[doc = "Field `TXC` reader - Transmit Complete Interrupt Disable"] +pub struct TXC_R(crate::FieldReader<bool, bool>); +impl TXC_R { + pub(crate) fn new(bits: bool) -> Self { + TXC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for TXC_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `TXC` writer - Transmit Complete Interrupt Disable"] +pub struct TXC_W<'a> { + w: &'a mut W, +} +impl<'a> TXC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1); + self.w + } +} +#[doc = "Field `RXC` reader - Receive Complete Interrupt Disable"] +pub struct RXC_R(crate::FieldReader<bool, bool>); +impl RXC_R { + pub(crate) fn new(bits: bool) -> Self { + RXC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RXC_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RXC` writer - Receive Complete Interrupt Disable"] +pub struct RXC_W<'a> { + w: &'a mut W, +} +impl<'a> RXC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2); + self.w + } +} +#[doc = "Field `RXS` reader - Receive Start Interrupt Disable"] +pub struct RXS_R(crate::FieldReader<bool, bool>); +impl RXS_R { + pub(crate) fn new(bits: bool) -> Self { + RXS_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RXS_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RXS` writer - Receive Start Interrupt Disable"] +pub struct RXS_W<'a> { + w: &'a mut W, +} +impl<'a> RXS_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3); + self.w + } +} +#[doc = "Field `CTSIC` reader - Clear To Send Input Change Interrupt Disable"] +pub struct CTSIC_R(crate::FieldReader<bool, bool>); +impl CTSIC_R { + pub(crate) fn new(bits: bool) -> Self { + CTSIC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CTSIC_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CTSIC` writer - Clear To Send Input Change Interrupt Disable"] +pub struct CTSIC_W<'a> { + w: &'a mut W, +} +impl<'a> CTSIC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4); + self.w + } +} +#[doc = "Field `RXBRK` reader - Break Received Interrupt Disable"] +pub struct RXBRK_R(crate::FieldReader<bool, bool>); +impl RXBRK_R { + pub(crate) fn new(bits: bool) -> Self { + RXBRK_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RXBRK_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RXBRK` writer - Break Received Interrupt Disable"] +pub struct RXBRK_W<'a> { + w: &'a mut W, +} +impl<'a> RXBRK_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u8 & 0x01) << 5); + self.w + } +} +#[doc = "Field `ERROR` reader - Combined Error Interrupt Disable"] +pub struct ERROR_R(crate::FieldReader<bool, bool>); +impl ERROR_R { + pub(crate) fn new(bits: bool) -> Self { + ERROR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ERROR_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ERROR` writer - Combined Error Interrupt Disable"] +pub struct ERROR_W<'a> { + w: &'a mut W, +} +impl<'a> ERROR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7); + self.w + } +} +impl R { + #[doc = "Bit 0 - Data Register Empty Interrupt Disable"] + #[inline(always)] + pub fn dre(&self) -> DRE_R { + DRE_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Transmit Complete Interrupt Disable"] + #[inline(always)] + pub fn txc(&self) -> TXC_R { + TXC_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Receive Complete Interrupt Disable"] + #[inline(always)] + pub fn rxc(&self) -> RXC_R { + RXC_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Receive Start Interrupt Disable"] + #[inline(always)] + pub fn rxs(&self) -> RXS_R { + RXS_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Clear To Send Input Change Interrupt Disable"] + #[inline(always)] + pub fn ctsic(&self) -> CTSIC_R { + CTSIC_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Break Received Interrupt Disable"] + #[inline(always)] + pub fn rxbrk(&self) -> RXBRK_R { + RXBRK_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 7 - Combined Error Interrupt Disable"] + #[inline(always)] + pub fn error(&self) -> ERROR_R { + ERROR_R::new(((self.bits >> 7) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Data Register Empty Interrupt Disable"] + #[inline(always)] + pub fn dre(&mut self) -> DRE_W { + DRE_W { w: self } + } + #[doc = "Bit 1 - Transmit Complete Interrupt Disable"] + #[inline(always)] + pub fn txc(&mut self) -> TXC_W { + TXC_W { w: self } + } + #[doc = "Bit 2 - Receive Complete Interrupt Disable"] + #[inline(always)] + pub fn rxc(&mut self) -> RXC_W { + RXC_W { w: self } + } + #[doc = "Bit 3 - Receive Start Interrupt Disable"] + #[inline(always)] + pub fn rxs(&mut self) -> RXS_W { + RXS_W { w: self } + } + #[doc = "Bit 4 - Clear To Send Input Change Interrupt Disable"] + #[inline(always)] + pub fn ctsic(&mut self) -> CTSIC_W { + CTSIC_W { w: self } + } + #[doc = "Bit 5 - Break Received Interrupt Disable"] + #[inline(always)] + pub fn rxbrk(&mut self) -> RXBRK_W { + RXBRK_W { w: self } + } + #[doc = "Bit 7 - Combined Error Interrupt Disable"] + #[inline(always)] + pub fn error(&mut self) -> ERROR_W { + ERROR_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"] +pub struct INTENCLR_SPEC; +impl crate::RegisterSpec for INTENCLR_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [intenclr::R](R) reader structure"] +impl crate::Readable for INTENCLR_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"] +impl crate::Writable for INTENCLR_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTENCLR to value 0"] +impl crate::Resettable for INTENCLR_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/intenset.rs b/src/sercom0/usart_ext/intenset.rs new file mode 100644 index 0000000..c2f4688 --- /dev/null +++ b/src/sercom0/usart_ext/intenset.rs @@ -0,0 +1,388 @@ +#[doc = "Register `INTENSET` reader"] +pub struct R(crate::R<INTENSET_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<INTENSET_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<INTENSET_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<INTENSET_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `INTENSET` writer"] +pub struct W(crate::W<INTENSET_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<INTENSET_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<INTENSET_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<INTENSET_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `DRE` reader - Data Register Empty Interrupt Enable"] +pub struct DRE_R(crate::FieldReader<bool, bool>); +impl DRE_R { + pub(crate) fn new(bits: bool) -> Self { + DRE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DRE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DRE` writer - Data Register Empty Interrupt Enable"] +pub struct DRE_W<'a> { + w: &'a mut W, +} +impl<'a> DRE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +#[doc = "Field `TXC` reader - Transmit Complete Interrupt Enable"] +pub struct TXC_R(crate::FieldReader<bool, bool>); +impl TXC_R { + pub(crate) fn new(bits: bool) -> Self { + TXC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for TXC_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `TXC` writer - Transmit Complete Interrupt Enable"] +pub struct TXC_W<'a> { + w: &'a mut W, +} +impl<'a> TXC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1); + self.w + } +} +#[doc = "Field `RXC` reader - Receive Complete Interrupt Enable"] +pub struct RXC_R(crate::FieldReader<bool, bool>); +impl RXC_R { + pub(crate) fn new(bits: bool) -> Self { + RXC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RXC_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RXC` writer - Receive Complete Interrupt Enable"] +pub struct RXC_W<'a> { + w: &'a mut W, +} +impl<'a> RXC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2); + self.w + } +} +#[doc = "Field `RXS` reader - Receive Start Interrupt Enable"] +pub struct RXS_R(crate::FieldReader<bool, bool>); +impl RXS_R { + pub(crate) fn new(bits: bool) -> Self { + RXS_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RXS_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RXS` writer - Receive Start Interrupt Enable"] +pub struct RXS_W<'a> { + w: &'a mut W, +} +impl<'a> RXS_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3); + self.w + } +} +#[doc = "Field `CTSIC` reader - Clear To Send Input Change Interrupt Enable"] +pub struct CTSIC_R(crate::FieldReader<bool, bool>); +impl CTSIC_R { + pub(crate) fn new(bits: bool) -> Self { + CTSIC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CTSIC_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CTSIC` writer - Clear To Send Input Change Interrupt Enable"] +pub struct CTSIC_W<'a> { + w: &'a mut W, +} +impl<'a> CTSIC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4); + self.w + } +} +#[doc = "Field `RXBRK` reader - Break Received Interrupt Enable"] +pub struct RXBRK_R(crate::FieldReader<bool, bool>); +impl RXBRK_R { + pub(crate) fn new(bits: bool) -> Self { + RXBRK_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RXBRK_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RXBRK` writer - Break Received Interrupt Enable"] +pub struct RXBRK_W<'a> { + w: &'a mut W, +} +impl<'a> RXBRK_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u8 & 0x01) << 5); + self.w + } +} +#[doc = "Field `ERROR` reader - Combined Error Interrupt Enable"] +pub struct ERROR_R(crate::FieldReader<bool, bool>); +impl ERROR_R { + pub(crate) fn new(bits: bool) -> Self { + ERROR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ERROR_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ERROR` writer - Combined Error Interrupt Enable"] +pub struct ERROR_W<'a> { + w: &'a mut W, +} +impl<'a> ERROR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7); + self.w + } +} +impl R { + #[doc = "Bit 0 - Data Register Empty Interrupt Enable"] + #[inline(always)] + pub fn dre(&self) -> DRE_R { + DRE_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Transmit Complete Interrupt Enable"] + #[inline(always)] + pub fn txc(&self) -> TXC_R { + TXC_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Receive Complete Interrupt Enable"] + #[inline(always)] + pub fn rxc(&self) -> RXC_R { + RXC_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Receive Start Interrupt Enable"] + #[inline(always)] + pub fn rxs(&self) -> RXS_R { + RXS_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Clear To Send Input Change Interrupt Enable"] + #[inline(always)] + pub fn ctsic(&self) -> CTSIC_R { + CTSIC_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Break Received Interrupt Enable"] + #[inline(always)] + pub fn rxbrk(&self) -> RXBRK_R { + RXBRK_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 7 - Combined Error Interrupt Enable"] + #[inline(always)] + pub fn error(&self) -> ERROR_R { + ERROR_R::new(((self.bits >> 7) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Data Register Empty Interrupt Enable"] + #[inline(always)] + pub fn dre(&mut self) -> DRE_W { + DRE_W { w: self } + } + #[doc = "Bit 1 - Transmit Complete Interrupt Enable"] + #[inline(always)] + pub fn txc(&mut self) -> TXC_W { + TXC_W { w: self } + } + #[doc = "Bit 2 - Receive Complete Interrupt Enable"] + #[inline(always)] + pub fn rxc(&mut self) -> RXC_W { + RXC_W { w: self } + } + #[doc = "Bit 3 - Receive Start Interrupt Enable"] + #[inline(always)] + pub fn rxs(&mut self) -> RXS_W { + RXS_W { w: self } + } + #[doc = "Bit 4 - Clear To Send Input Change Interrupt Enable"] + #[inline(always)] + pub fn ctsic(&mut self) -> CTSIC_W { + CTSIC_W { w: self } + } + #[doc = "Bit 5 - Break Received Interrupt Enable"] + #[inline(always)] + pub fn rxbrk(&mut self) -> RXBRK_W { + RXBRK_W { w: self } + } + #[doc = "Bit 7 - Combined Error Interrupt Enable"] + #[inline(always)] + pub fn error(&mut self) -> ERROR_W { + ERROR_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"] +pub struct INTENSET_SPEC; +impl crate::RegisterSpec for INTENSET_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [intenset::R](R) reader structure"] +impl crate::Readable for INTENSET_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"] +impl crate::Writable for INTENSET_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTENSET to value 0"] +impl crate::Resettable for INTENSET_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/intflag.rs b/src/sercom0/usart_ext/intflag.rs new file mode 100644 index 0000000..bcab031 --- /dev/null +++ b/src/sercom0/usart_ext/intflag.rs @@ -0,0 +1,388 @@ +#[doc = "Register `INTFLAG` reader"] +pub struct R(crate::R<INTFLAG_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<INTFLAG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<INTFLAG_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<INTFLAG_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `INTFLAG` writer"] +pub struct W(crate::W<INTFLAG_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<INTFLAG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<INTFLAG_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<INTFLAG_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `DRE` reader - Data Register Empty Interrupt"] +pub struct DRE_R(crate::FieldReader<bool, bool>); +impl DRE_R { + pub(crate) fn new(bits: bool) -> Self { + DRE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DRE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DRE` writer - Data Register Empty Interrupt"] +pub struct DRE_W<'a> { + w: &'a mut W, +} +impl<'a> DRE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +#[doc = "Field `TXC` reader - Transmit Complete Interrupt"] +pub struct TXC_R(crate::FieldReader<bool, bool>); +impl TXC_R { + pub(crate) fn new(bits: bool) -> Self { + TXC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for TXC_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `TXC` writer - Transmit Complete Interrupt"] +pub struct TXC_W<'a> { + w: &'a mut W, +} +impl<'a> TXC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1); + self.w + } +} +#[doc = "Field `RXC` reader - Receive Complete Interrupt"] +pub struct RXC_R(crate::FieldReader<bool, bool>); +impl RXC_R { + pub(crate) fn new(bits: bool) -> Self { + RXC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RXC_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RXC` writer - Receive Complete Interrupt"] +pub struct RXC_W<'a> { + w: &'a mut W, +} +impl<'a> RXC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2); + self.w + } +} +#[doc = "Field `RXS` reader - Receive Start Interrupt"] +pub struct RXS_R(crate::FieldReader<bool, bool>); +impl RXS_R { + pub(crate) fn new(bits: bool) -> Self { + RXS_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RXS_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RXS` writer - Receive Start Interrupt"] +pub struct RXS_W<'a> { + w: &'a mut W, +} +impl<'a> RXS_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3); + self.w + } +} +#[doc = "Field `CTSIC` reader - Clear To Send Input Change Interrupt"] +pub struct CTSIC_R(crate::FieldReader<bool, bool>); +impl CTSIC_R { + pub(crate) fn new(bits: bool) -> Self { + CTSIC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CTSIC_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CTSIC` writer - Clear To Send Input Change Interrupt"] +pub struct CTSIC_W<'a> { + w: &'a mut W, +} +impl<'a> CTSIC_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4); + self.w + } +} +#[doc = "Field `RXBRK` reader - Break Received Interrupt"] +pub struct RXBRK_R(crate::FieldReader<bool, bool>); +impl RXBRK_R { + pub(crate) fn new(bits: bool) -> Self { + RXBRK_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RXBRK_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RXBRK` writer - Break Received Interrupt"] +pub struct RXBRK_W<'a> { + w: &'a mut W, +} +impl<'a> RXBRK_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u8 & 0x01) << 5); + self.w + } +} +#[doc = "Field `ERROR` reader - Combined Error Interrupt"] +pub struct ERROR_R(crate::FieldReader<bool, bool>); +impl ERROR_R { + pub(crate) fn new(bits: bool) -> Self { + ERROR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ERROR_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ERROR` writer - Combined Error Interrupt"] +pub struct ERROR_W<'a> { + w: &'a mut W, +} +impl<'a> ERROR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7); + self.w + } +} +impl R { + #[doc = "Bit 0 - Data Register Empty Interrupt"] + #[inline(always)] + pub fn dre(&self) -> DRE_R { + DRE_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Transmit Complete Interrupt"] + #[inline(always)] + pub fn txc(&self) -> TXC_R { + TXC_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Receive Complete Interrupt"] + #[inline(always)] + pub fn rxc(&self) -> RXC_R { + RXC_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Receive Start Interrupt"] + #[inline(always)] + pub fn rxs(&self) -> RXS_R { + RXS_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Clear To Send Input Change Interrupt"] + #[inline(always)] + pub fn ctsic(&self) -> CTSIC_R { + CTSIC_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Break Received Interrupt"] + #[inline(always)] + pub fn rxbrk(&self) -> RXBRK_R { + RXBRK_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 7 - Combined Error Interrupt"] + #[inline(always)] + pub fn error(&self) -> ERROR_R { + ERROR_R::new(((self.bits >> 7) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Data Register Empty Interrupt"] + #[inline(always)] + pub fn dre(&mut self) -> DRE_W { + DRE_W { w: self } + } + #[doc = "Bit 1 - Transmit Complete Interrupt"] + #[inline(always)] + pub fn txc(&mut self) -> TXC_W { + TXC_W { w: self } + } + #[doc = "Bit 2 - Receive Complete Interrupt"] + #[inline(always)] + pub fn rxc(&mut self) -> RXC_W { + RXC_W { w: self } + } + #[doc = "Bit 3 - Receive Start Interrupt"] + #[inline(always)] + pub fn rxs(&mut self) -> RXS_W { + RXS_W { w: self } + } + #[doc = "Bit 4 - Clear To Send Input Change Interrupt"] + #[inline(always)] + pub fn ctsic(&mut self) -> CTSIC_W { + CTSIC_W { w: self } + } + #[doc = "Bit 5 - Break Received Interrupt"] + #[inline(always)] + pub fn rxbrk(&mut self) -> RXBRK_W { + RXBRK_W { w: self } + } + #[doc = "Bit 7 - Combined Error Interrupt"] + #[inline(always)] + pub fn error(&mut self) -> ERROR_W { + ERROR_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"] +pub struct INTFLAG_SPEC; +impl crate::RegisterSpec for INTFLAG_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [intflag::R](R) reader structure"] +impl crate::Readable for INTFLAG_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"] +impl crate::Writable for INTFLAG_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTFLAG to value 0"] +impl crate::Resettable for INTFLAG_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/rxpl.rs b/src/sercom0/usart_ext/rxpl.rs new file mode 100644 index 0000000..13a2c17 --- /dev/null +++ b/src/sercom0/usart_ext/rxpl.rs @@ -0,0 +1,102 @@ +#[doc = "Register `RXPL` reader"] +pub struct R(crate::R<RXPL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<RXPL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<RXPL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<RXPL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `RXPL` writer"] +pub struct W(crate::W<RXPL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<RXPL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<RXPL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<RXPL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `RXPL` reader - Receive Pulse Length"] +pub struct RXPL_R(crate::FieldReader<u8, u8>); +impl RXPL_R { + pub(crate) fn new(bits: u8) -> Self { + RXPL_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RXPL_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RXPL` writer - Receive Pulse Length"] +pub struct RXPL_W<'a> { + w: &'a mut W, +} +impl<'a> RXPL_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0xff) | (value as u8 & 0xff); + self.w + } +} +impl R { + #[doc = "Bits 0:7 - Receive Pulse Length"] + #[inline(always)] + pub fn rxpl(&self) -> RXPL_R { + RXPL_R::new((self.bits & 0xff) as u8) + } +} +impl W { + #[doc = "Bits 0:7 - Receive Pulse Length"] + #[inline(always)] + pub fn rxpl(&mut self) -> RXPL_W { + RXPL_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Receive Pulse Length\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxpl](index.html) module"] +pub struct RXPL_SPEC; +impl crate::RegisterSpec for RXPL_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [rxpl::R](R) reader structure"] +impl crate::Readable for RXPL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [rxpl::W](W) writer structure"] +impl crate::Writable for RXPL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets RXPL to value 0"] +impl crate::Resettable for RXPL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/status.rs b/src/sercom0/usart_ext/status.rs new file mode 100644 index 0000000..6ea75a6 --- /dev/null +++ b/src/sercom0/usart_ext/status.rs @@ -0,0 +1,388 @@ +#[doc = "Register `STATUS` reader"] +pub struct R(crate::R<STATUS_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<STATUS_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<STATUS_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<STATUS_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `STATUS` writer"] +pub struct W(crate::W<STATUS_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<STATUS_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<STATUS_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<STATUS_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `PERR` reader - Parity Error"] +pub struct PERR_R(crate::FieldReader<bool, bool>); +impl PERR_R { + pub(crate) fn new(bits: bool) -> Self { + PERR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for PERR_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PERR` writer - Parity Error"] +pub struct PERR_W<'a> { + w: &'a mut W, +} +impl<'a> PERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `FERR` reader - Frame Error"] +pub struct FERR_R(crate::FieldReader<bool, bool>); +impl FERR_R { + pub(crate) fn new(bits: bool) -> Self { + FERR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FERR_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FERR` writer - Frame Error"] +pub struct FERR_W<'a> { + w: &'a mut W, +} +impl<'a> FERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Field `BUFOVF` reader - Buffer Overflow"] +pub struct BUFOVF_R(crate::FieldReader<bool, bool>); +impl BUFOVF_R { + pub(crate) fn new(bits: bool) -> Self { + BUFOVF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for BUFOVF_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `BUFOVF` writer - Buffer Overflow"] +pub struct BUFOVF_W<'a> { + w: &'a mut W, +} +impl<'a> BUFOVF_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2); + self.w + } +} +#[doc = "Field `CTS` reader - Clear To Send"] +pub struct CTS_R(crate::FieldReader<bool, bool>); +impl CTS_R { + pub(crate) fn new(bits: bool) -> Self { + CTS_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CTS_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CTS` writer - Clear To Send"] +pub struct CTS_W<'a> { + w: &'a mut W, +} +impl<'a> CTS_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3); + self.w + } +} +#[doc = "Field `ISF` reader - Inconsistent Sync Field"] +pub struct ISF_R(crate::FieldReader<bool, bool>); +impl ISF_R { + pub(crate) fn new(bits: bool) -> Self { + ISF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ISF_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ISF` writer - Inconsistent Sync Field"] +pub struct ISF_W<'a> { + w: &'a mut W, +} +impl<'a> ISF_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u16 & 0x01) << 4); + self.w + } +} +#[doc = "Field `COLL` reader - Collision Detected"] +pub struct COLL_R(crate::FieldReader<bool, bool>); +impl COLL_R { + pub(crate) fn new(bits: bool) -> Self { + COLL_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for COLL_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `COLL` writer - Collision Detected"] +pub struct COLL_W<'a> { + w: &'a mut W, +} +impl<'a> COLL_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5); + self.w + } +} +#[doc = "Field `TXE` reader - Transmitter Empty"] +pub struct TXE_R(crate::FieldReader<bool, bool>); +impl TXE_R { + pub(crate) fn new(bits: bool) -> Self { + TXE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for TXE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `TXE` writer - Transmitter Empty"] +pub struct TXE_W<'a> { + w: &'a mut W, +} +impl<'a> TXE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6); + self.w + } +} +impl R { + #[doc = "Bit 0 - Parity Error"] + #[inline(always)] + pub fn perr(&self) -> PERR_R { + PERR_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Frame Error"] + #[inline(always)] + pub fn ferr(&self) -> FERR_R { + FERR_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Buffer Overflow"] + #[inline(always)] + pub fn bufovf(&self) -> BUFOVF_R { + BUFOVF_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Clear To Send"] + #[inline(always)] + pub fn cts(&self) -> CTS_R { + CTS_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Inconsistent Sync Field"] + #[inline(always)] + pub fn isf(&self) -> ISF_R { + ISF_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Collision Detected"] + #[inline(always)] + pub fn coll(&self) -> COLL_R { + COLL_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Transmitter Empty"] + #[inline(always)] + pub fn txe(&self) -> TXE_R { + TXE_R::new(((self.bits >> 6) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Parity Error"] + #[inline(always)] + pub fn perr(&mut self) -> PERR_W { + PERR_W { w: self } + } + #[doc = "Bit 1 - Frame Error"] + #[inline(always)] + pub fn ferr(&mut self) -> FERR_W { + FERR_W { w: self } + } + #[doc = "Bit 2 - Buffer Overflow"] + #[inline(always)] + pub fn bufovf(&mut self) -> BUFOVF_W { + BUFOVF_W { w: self } + } + #[doc = "Bit 3 - Clear To Send"] + #[inline(always)] + pub fn cts(&mut self) -> CTS_W { + CTS_W { w: self } + } + #[doc = "Bit 4 - Inconsistent Sync Field"] + #[inline(always)] + pub fn isf(&mut self) -> ISF_W { + ISF_W { w: self } + } + #[doc = "Bit 5 - Collision Detected"] + #[inline(always)] + pub fn coll(&mut self) -> COLL_W { + COLL_W { w: self } + } + #[doc = "Bit 6 - Transmitter Empty"] + #[inline(always)] + pub fn txe(&mut self) -> TXE_W { + TXE_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "USART_EXT Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"] +pub struct STATUS_SPEC; +impl crate::RegisterSpec for STATUS_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [status::R](R) reader structure"] +impl crate::Readable for STATUS_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"] +impl crate::Writable for STATUS_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets STATUS to value 0"] +impl crate::Resettable for STATUS_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/sercom0/usart_ext/syncbusy.rs b/src/sercom0/usart_ext/syncbusy.rs new file mode 100644 index 0000000..44dea6f --- /dev/null +++ b/src/sercom0/usart_ext/syncbusy.rs @@ -0,0 +1,90 @@ +#[doc = "Register `SYNCBUSY` reader"] +pub struct R(crate::R<SYNCBUSY_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<SYNCBUSY_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<SYNCBUSY_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `SWRST` reader - Software Reset Synchronization Busy"] +pub struct SWRST_R(crate::FieldReader<bool, bool>); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENABLE` reader - SERCOM Enable Synchronization Busy"] +pub struct ENABLE_R(crate::FieldReader<bool, bool>); +impl ENABLE_R { + pub(crate) fn new(bits: bool) -> Self { + ENABLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENABLE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CTRLB` reader - CTRLB Synchronization Busy"] +pub struct CTRLB_R(crate::FieldReader<bool, bool>); +impl CTRLB_R { + pub(crate) fn new(bits: bool) -> Self { + CTRLB_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CTRLB_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bit 0 - Software Reset Synchronization Busy"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - SERCOM Enable Synchronization Busy"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - CTRLB Synchronization Busy"] + #[inline(always)] + pub fn ctrlb(&self) -> CTRLB_R { + CTRLB_R::new(((self.bits >> 2) & 0x01) != 0) + } +} +#[doc = "USART_EXT Synchronization Busy\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] +pub struct SYNCBUSY_SPEC; +impl crate::RegisterSpec for SYNCBUSY_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] +impl crate::Readable for SYNCBUSY_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets SYNCBUSY to value 0"] +impl crate::Resettable for SYNCBUSY_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} |