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-rw-r--r--src/wdt/clear.rs85
-rw-r--r--src/wdt/config.rs496
-rw-r--r--src/wdt/ctrla.rs204
-rw-r--r--src/wdt/ewctrl.rs281
-rw-r--r--src/wdt/intenclr.rs112
-rw-r--r--src/wdt/intenset.rs112
-rw-r--r--src/wdt/intflag.rs112
-rw-r--r--src/wdt/syncbusy.rs109
8 files changed, 1511 insertions, 0 deletions
diff --git a/src/wdt/clear.rs b/src/wdt/clear.rs
new file mode 100644
index 0000000..1d041fc
--- /dev/null
+++ b/src/wdt/clear.rs
@@ -0,0 +1,85 @@
+#[doc = "Register `CLEAR` writer"]
+pub struct W(crate::W<CLEAR_SPEC>);
+impl core::ops::Deref for W {
+ type Target = crate::W<CLEAR_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl core::ops::DerefMut for W {
+ #[inline(always)]
+ fn deref_mut(&mut self) -> &mut Self::Target {
+ &mut self.0
+ }
+}
+impl From<crate::W<CLEAR_SPEC>> for W {
+ #[inline(always)]
+ fn from(writer: crate::W<CLEAR_SPEC>) -> Self {
+ W(writer)
+ }
+}
+#[doc = "Watchdog Clear\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum CLEAR_AW {
+ #[doc = "165: Clear Key"]
+ KEY = 165,
+}
+impl From<CLEAR_AW> for u8 {
+ #[inline(always)]
+ fn from(variant: CLEAR_AW) -> Self {
+ variant as _
+ }
+}
+#[doc = "Field `CLEAR` writer - Watchdog Clear"]
+pub struct CLEAR_W<'a> {
+ w: &'a mut W,
+}
+impl<'a> CLEAR_W<'a> {
+ #[doc = r"Writes `variant` to the field"]
+ #[inline(always)]
+ pub fn variant(self, variant: CLEAR_AW) -> &'a mut W {
+ unsafe { self.bits(variant.into()) }
+ }
+ #[doc = "Clear Key"]
+ #[inline(always)]
+ pub fn key(self) -> &'a mut W {
+ self.variant(CLEAR_AW::KEY)
+ }
+ #[doc = r"Writes raw bits to the field"]
+ #[inline(always)]
+ pub unsafe fn bits(self, value: u8) -> &'a mut W {
+ self.w.bits = (self.w.bits & !0xff) | (value as u8 & 0xff);
+ self.w
+ }
+}
+impl W {
+ #[doc = "Bits 0:7 - Watchdog Clear"]
+ #[inline(always)]
+ pub fn clear(&mut self) -> CLEAR_W {
+ CLEAR_W { w: self }
+ }
+ #[doc = "Writes raw bits to the register."]
+ #[inline(always)]
+ pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+ self.0.bits(bits);
+ self
+ }
+}
+#[doc = "Clear\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clear](index.html) module"]
+pub struct CLEAR_SPEC;
+impl crate::RegisterSpec for CLEAR_SPEC {
+ type Ux = u8;
+}
+#[doc = "`write(|w| ..)` method takes [clear::W](W) writer structure"]
+impl crate::Writable for CLEAR_SPEC {
+ type Writer = W;
+}
+#[doc = "`reset()` method sets CLEAR to value 0"]
+impl crate::Resettable for CLEAR_SPEC {
+ #[inline(always)]
+ fn reset_value() -> Self::Ux {
+ 0
+ }
+}
diff --git a/src/wdt/config.rs b/src/wdt/config.rs
new file mode 100644
index 0000000..0b58504
--- /dev/null
+++ b/src/wdt/config.rs
@@ -0,0 +1,496 @@
+#[doc = "Register `CONFIG` reader"]
+pub struct R(crate::R<CONFIG_SPEC>);
+impl core::ops::Deref for R {
+ type Target = crate::R<CONFIG_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl From<crate::R<CONFIG_SPEC>> for R {
+ #[inline(always)]
+ fn from(reader: crate::R<CONFIG_SPEC>) -> Self {
+ R(reader)
+ }
+}
+#[doc = "Register `CONFIG` writer"]
+pub struct W(crate::W<CONFIG_SPEC>);
+impl core::ops::Deref for W {
+ type Target = crate::W<CONFIG_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl core::ops::DerefMut for W {
+ #[inline(always)]
+ fn deref_mut(&mut self) -> &mut Self::Target {
+ &mut self.0
+ }
+}
+impl From<crate::W<CONFIG_SPEC>> for W {
+ #[inline(always)]
+ fn from(writer: crate::W<CONFIG_SPEC>) -> Self {
+ W(writer)
+ }
+}
+#[doc = "Time-Out Period\n\nValue on reset: 11"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum PER_A {
+ #[doc = "0: 8 clock cycles"]
+ CYC8 = 0,
+ #[doc = "1: 16 clock cycles"]
+ CYC16 = 1,
+ #[doc = "2: 32 clock cycles"]
+ CYC32 = 2,
+ #[doc = "3: 64 clock cycles"]
+ CYC64 = 3,
+ #[doc = "4: 128 clock cycles"]
+ CYC128 = 4,
+ #[doc = "5: 256 clock cycles"]
+ CYC256 = 5,
+ #[doc = "6: 512 clock cycles"]
+ CYC512 = 6,
+ #[doc = "7: 1024 clock cycles"]
+ CYC1024 = 7,
+ #[doc = "8: 2048 clock cycles"]
+ CYC2048 = 8,
+ #[doc = "9: 4096 clock cycles"]
+ CYC4096 = 9,
+ #[doc = "10: 8192 clock cycles"]
+ CYC8192 = 10,
+ #[doc = "11: 16384 clock cycles"]
+ CYC16384 = 11,
+}
+impl From<PER_A> for u8 {
+ #[inline(always)]
+ fn from(variant: PER_A) -> Self {
+ variant as _
+ }
+}
+#[doc = "Field `PER` reader - Time-Out Period"]
+pub struct PER_R(crate::FieldReader<u8, PER_A>);
+impl PER_R {
+ pub(crate) fn new(bits: u8) -> Self {
+ PER_R(crate::FieldReader::new(bits))
+ }
+ #[doc = r"Get enumerated values variant"]
+ #[inline(always)]
+ pub fn variant(&self) -> Option<PER_A> {
+ match self.bits {
+ 0 => Some(PER_A::CYC8),
+ 1 => Some(PER_A::CYC16),
+ 2 => Some(PER_A::CYC32),
+ 3 => Some(PER_A::CYC64),
+ 4 => Some(PER_A::CYC128),
+ 5 => Some(PER_A::CYC256),
+ 6 => Some(PER_A::CYC512),
+ 7 => Some(PER_A::CYC1024),
+ 8 => Some(PER_A::CYC2048),
+ 9 => Some(PER_A::CYC4096),
+ 10 => Some(PER_A::CYC8192),
+ 11 => Some(PER_A::CYC16384),
+ _ => None,
+ }
+ }
+ #[doc = "Checks if the value of the field is `CYC8`"]
+ #[inline(always)]
+ pub fn is_cyc8(&self) -> bool {
+ **self == PER_A::CYC8
+ }
+ #[doc = "Checks if the value of the field is `CYC16`"]
+ #[inline(always)]
+ pub fn is_cyc16(&self) -> bool {
+ **self == PER_A::CYC16
+ }
+ #[doc = "Checks if the value of the field is `CYC32`"]
+ #[inline(always)]
+ pub fn is_cyc32(&self) -> bool {
+ **self == PER_A::CYC32
+ }
+ #[doc = "Checks if the value of the field is `CYC64`"]
+ #[inline(always)]
+ pub fn is_cyc64(&self) -> bool {
+ **self == PER_A::CYC64
+ }
+ #[doc = "Checks if the value of the field is `CYC128`"]
+ #[inline(always)]
+ pub fn is_cyc128(&self) -> bool {
+ **self == PER_A::CYC128
+ }
+ #[doc = "Checks if the value of the field is `CYC256`"]
+ #[inline(always)]
+ pub fn is_cyc256(&self) -> bool {
+ **self == PER_A::CYC256
+ }
+ #[doc = "Checks if the value of the field is `CYC512`"]
+ #[inline(always)]
+ pub fn is_cyc512(&self) -> bool {
+ **self == PER_A::CYC512
+ }
+ #[doc = "Checks if the value of the field is `CYC1024`"]
+ #[inline(always)]
+ pub fn is_cyc1024(&self) -> bool {
+ **self == PER_A::CYC1024
+ }
+ #[doc = "Checks if the value of the field is `CYC2048`"]
+ #[inline(always)]
+ pub fn is_cyc2048(&self) -> bool {
+ **self == PER_A::CYC2048
+ }
+ #[doc = "Checks if the value of the field is `CYC4096`"]
+ #[inline(always)]
+ pub fn is_cyc4096(&self) -> bool {
+ **self == PER_A::CYC4096
+ }
+ #[doc = "Checks if the value of the field is `CYC8192`"]
+ #[inline(always)]
+ pub fn is_cyc8192(&self) -> bool {
+ **self == PER_A::CYC8192
+ }
+ #[doc = "Checks if the value of the field is `CYC16384`"]
+ #[inline(always)]
+ pub fn is_cyc16384(&self) -> bool {
+ **self == PER_A::CYC16384
+ }
+}
+impl core::ops::Deref for PER_R {
+ type Target = crate::FieldReader<u8, PER_A>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `PER` writer - Time-Out Period"]
+pub struct PER_W<'a> {
+ w: &'a mut W,
+}
+impl<'a> PER_W<'a> {
+ #[doc = r"Writes `variant` to the field"]
+ #[inline(always)]
+ pub fn variant(self, variant: PER_A) -> &'a mut W {
+ unsafe { self.bits(variant.into()) }
+ }
+ #[doc = "8 clock cycles"]
+ #[inline(always)]
+ pub fn cyc8(self) -> &'a mut W {
+ self.variant(PER_A::CYC8)
+ }
+ #[doc = "16 clock cycles"]
+ #[inline(always)]
+ pub fn cyc16(self) -> &'a mut W {
+ self.variant(PER_A::CYC16)
+ }
+ #[doc = "32 clock cycles"]
+ #[inline(always)]
+ pub fn cyc32(self) -> &'a mut W {
+ self.variant(PER_A::CYC32)
+ }
+ #[doc = "64 clock cycles"]
+ #[inline(always)]
+ pub fn cyc64(self) -> &'a mut W {
+ self.variant(PER_A::CYC64)
+ }
+ #[doc = "128 clock cycles"]
+ #[inline(always)]
+ pub fn cyc128(self) -> &'a mut W {
+ self.variant(PER_A::CYC128)
+ }
+ #[doc = "256 clock cycles"]
+ #[inline(always)]
+ pub fn cyc256(self) -> &'a mut W {
+ self.variant(PER_A::CYC256)
+ }
+ #[doc = "512 clock cycles"]
+ #[inline(always)]
+ pub fn cyc512(self) -> &'a mut W {
+ self.variant(PER_A::CYC512)
+ }
+ #[doc = "1024 clock cycles"]
+ #[inline(always)]
+ pub fn cyc1024(self) -> &'a mut W {
+ self.variant(PER_A::CYC1024)
+ }
+ #[doc = "2048 clock cycles"]
+ #[inline(always)]
+ pub fn cyc2048(self) -> &'a mut W {
+ self.variant(PER_A::CYC2048)
+ }
+ #[doc = "4096 clock cycles"]
+ #[inline(always)]
+ pub fn cyc4096(self) -> &'a mut W {
+ self.variant(PER_A::CYC4096)
+ }
+ #[doc = "8192 clock cycles"]
+ #[inline(always)]
+ pub fn cyc8192(self) -> &'a mut W {
+ self.variant(PER_A::CYC8192)
+ }
+ #[doc = "16384 clock cycles"]
+ #[inline(always)]
+ pub fn cyc16384(self) -> &'a mut W {
+ self.variant(PER_A::CYC16384)
+ }
+ #[doc = r"Writes raw bits to the field"]
+ #[inline(always)]
+ pub unsafe fn bits(self, value: u8) -> &'a mut W {
+ self.w.bits = (self.w.bits & !0x0f) | (value as u8 & 0x0f);
+ self.w
+ }
+}
+#[doc = "Window Mode Time-Out Period\n\nValue on reset: 11"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum WINDOW_A {
+ #[doc = "0: 8 clock cycles"]
+ CYC8 = 0,
+ #[doc = "1: 16 clock cycles"]
+ CYC16 = 1,
+ #[doc = "2: 32 clock cycles"]
+ CYC32 = 2,
+ #[doc = "3: 64 clock cycles"]
+ CYC64 = 3,
+ #[doc = "4: 128 clock cycles"]
+ CYC128 = 4,
+ #[doc = "5: 256 clock cycles"]
+ CYC256 = 5,
+ #[doc = "6: 512 clock cycles"]
+ CYC512 = 6,
+ #[doc = "7: 1024 clock cycles"]
+ CYC1024 = 7,
+ #[doc = "8: 2048 clock cycles"]
+ CYC2048 = 8,
+ #[doc = "9: 4096 clock cycles"]
+ CYC4096 = 9,
+ #[doc = "10: 8192 clock cycles"]
+ CYC8192 = 10,
+ #[doc = "11: 16384 clock cycles"]
+ CYC16384 = 11,
+}
+impl From<WINDOW_A> for u8 {
+ #[inline(always)]
+ fn from(variant: WINDOW_A) -> Self {
+ variant as _
+ }
+}
+#[doc = "Field `WINDOW` reader - Window Mode Time-Out Period"]
+pub struct WINDOW_R(crate::FieldReader<u8, WINDOW_A>);
+impl WINDOW_R {
+ pub(crate) fn new(bits: u8) -> Self {
+ WINDOW_R(crate::FieldReader::new(bits))
+ }
+ #[doc = r"Get enumerated values variant"]
+ #[inline(always)]
+ pub fn variant(&self) -> Option<WINDOW_A> {
+ match self.bits {
+ 0 => Some(WINDOW_A::CYC8),
+ 1 => Some(WINDOW_A::CYC16),
+ 2 => Some(WINDOW_A::CYC32),
+ 3 => Some(WINDOW_A::CYC64),
+ 4 => Some(WINDOW_A::CYC128),
+ 5 => Some(WINDOW_A::CYC256),
+ 6 => Some(WINDOW_A::CYC512),
+ 7 => Some(WINDOW_A::CYC1024),
+ 8 => Some(WINDOW_A::CYC2048),
+ 9 => Some(WINDOW_A::CYC4096),
+ 10 => Some(WINDOW_A::CYC8192),
+ 11 => Some(WINDOW_A::CYC16384),
+ _ => None,
+ }
+ }
+ #[doc = "Checks if the value of the field is `CYC8`"]
+ #[inline(always)]
+ pub fn is_cyc8(&self) -> bool {
+ **self == WINDOW_A::CYC8
+ }
+ #[doc = "Checks if the value of the field is `CYC16`"]
+ #[inline(always)]
+ pub fn is_cyc16(&self) -> bool {
+ **self == WINDOW_A::CYC16
+ }
+ #[doc = "Checks if the value of the field is `CYC32`"]
+ #[inline(always)]
+ pub fn is_cyc32(&self) -> bool {
+ **self == WINDOW_A::CYC32
+ }
+ #[doc = "Checks if the value of the field is `CYC64`"]
+ #[inline(always)]
+ pub fn is_cyc64(&self) -> bool {
+ **self == WINDOW_A::CYC64
+ }
+ #[doc = "Checks if the value of the field is `CYC128`"]
+ #[inline(always)]
+ pub fn is_cyc128(&self) -> bool {
+ **self == WINDOW_A::CYC128
+ }
+ #[doc = "Checks if the value of the field is `CYC256`"]
+ #[inline(always)]
+ pub fn is_cyc256(&self) -> bool {
+ **self == WINDOW_A::CYC256
+ }
+ #[doc = "Checks if the value of the field is `CYC512`"]
+ #[inline(always)]
+ pub fn is_cyc512(&self) -> bool {
+ **self == WINDOW_A::CYC512
+ }
+ #[doc = "Checks if the value of the field is `CYC1024`"]
+ #[inline(always)]
+ pub fn is_cyc1024(&self) -> bool {
+ **self == WINDOW_A::CYC1024
+ }
+ #[doc = "Checks if the value of the field is `CYC2048`"]
+ #[inline(always)]
+ pub fn is_cyc2048(&self) -> bool {
+ **self == WINDOW_A::CYC2048
+ }
+ #[doc = "Checks if the value of the field is `CYC4096`"]
+ #[inline(always)]
+ pub fn is_cyc4096(&self) -> bool {
+ **self == WINDOW_A::CYC4096
+ }
+ #[doc = "Checks if the value of the field is `CYC8192`"]
+ #[inline(always)]
+ pub fn is_cyc8192(&self) -> bool {
+ **self == WINDOW_A::CYC8192
+ }
+ #[doc = "Checks if the value of the field is `CYC16384`"]
+ #[inline(always)]
+ pub fn is_cyc16384(&self) -> bool {
+ **self == WINDOW_A::CYC16384
+ }
+}
+impl core::ops::Deref for WINDOW_R {
+ type Target = crate::FieldReader<u8, WINDOW_A>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `WINDOW` writer - Window Mode Time-Out Period"]
+pub struct WINDOW_W<'a> {
+ w: &'a mut W,
+}
+impl<'a> WINDOW_W<'a> {
+ #[doc = r"Writes `variant` to the field"]
+ #[inline(always)]
+ pub fn variant(self, variant: WINDOW_A) -> &'a mut W {
+ unsafe { self.bits(variant.into()) }
+ }
+ #[doc = "8 clock cycles"]
+ #[inline(always)]
+ pub fn cyc8(self) -> &'a mut W {
+ self.variant(WINDOW_A::CYC8)
+ }
+ #[doc = "16 clock cycles"]
+ #[inline(always)]
+ pub fn cyc16(self) -> &'a mut W {
+ self.variant(WINDOW_A::CYC16)
+ }
+ #[doc = "32 clock cycles"]
+ #[inline(always)]
+ pub fn cyc32(self) -> &'a mut W {
+ self.variant(WINDOW_A::CYC32)
+ }
+ #[doc = "64 clock cycles"]
+ #[inline(always)]
+ pub fn cyc64(self) -> &'a mut W {
+ self.variant(WINDOW_A::CYC64)
+ }
+ #[doc = "128 clock cycles"]
+ #[inline(always)]
+ pub fn cyc128(self) -> &'a mut W {
+ self.variant(WINDOW_A::CYC128)
+ }
+ #[doc = "256 clock cycles"]
+ #[inline(always)]
+ pub fn cyc256(self) -> &'a mut W {
+ self.variant(WINDOW_A::CYC256)
+ }
+ #[doc = "512 clock cycles"]
+ #[inline(always)]
+ pub fn cyc512(self) -> &'a mut W {
+ self.variant(WINDOW_A::CYC512)
+ }
+ #[doc = "1024 clock cycles"]
+ #[inline(always)]
+ pub fn cyc1024(self) -> &'a mut W {
+ self.variant(WINDOW_A::CYC1024)
+ }
+ #[doc = "2048 clock cycles"]
+ #[inline(always)]
+ pub fn cyc2048(self) -> &'a mut W {
+ self.variant(WINDOW_A::CYC2048)
+ }
+ #[doc = "4096 clock cycles"]
+ #[inline(always)]
+ pub fn cyc4096(self) -> &'a mut W {
+ self.variant(WINDOW_A::CYC4096)
+ }
+ #[doc = "8192 clock cycles"]
+ #[inline(always)]
+ pub fn cyc8192(self) -> &'a mut W {
+ self.variant(WINDOW_A::CYC8192)
+ }
+ #[doc = "16384 clock cycles"]
+ #[inline(always)]
+ pub fn cyc16384(self) -> &'a mut W {
+ self.variant(WINDOW_A::CYC16384)
+ }
+ #[doc = r"Writes raw bits to the field"]
+ #[inline(always)]
+ pub unsafe fn bits(self, value: u8) -> &'a mut W {
+ self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u8 & 0x0f) << 4);
+ self.w
+ }
+}
+impl R {
+ #[doc = "Bits 0:3 - Time-Out Period"]
+ #[inline(always)]
+ pub fn per(&self) -> PER_R {
+ PER_R::new((self.bits & 0x0f) as u8)
+ }
+ #[doc = "Bits 4:7 - Window Mode Time-Out Period"]
+ #[inline(always)]
+ pub fn window(&self) -> WINDOW_R {
+ WINDOW_R::new(((self.bits >> 4) & 0x0f) as u8)
+ }
+}
+impl W {
+ #[doc = "Bits 0:3 - Time-Out Period"]
+ #[inline(always)]
+ pub fn per(&mut self) -> PER_W {
+ PER_W { w: self }
+ }
+ #[doc = "Bits 4:7 - Window Mode Time-Out Period"]
+ #[inline(always)]
+ pub fn window(&mut self) -> WINDOW_W {
+ WINDOW_W { w: self }
+ }
+ #[doc = "Writes raw bits to the register."]
+ #[inline(always)]
+ pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+ self.0.bits(bits);
+ self
+ }
+}
+#[doc = "Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [config](index.html) module"]
+pub struct CONFIG_SPEC;
+impl crate::RegisterSpec for CONFIG_SPEC {
+ type Ux = u8;
+}
+#[doc = "`read()` method returns [config::R](R) reader structure"]
+impl crate::Readable for CONFIG_SPEC {
+ type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [config::W](W) writer structure"]
+impl crate::Writable for CONFIG_SPEC {
+ type Writer = W;
+}
+#[doc = "`reset()` method sets CONFIG to value 0xbb"]
+impl crate::Resettable for CONFIG_SPEC {
+ #[inline(always)]
+ fn reset_value() -> Self::Ux {
+ 0xbb
+ }
+}
diff --git a/src/wdt/ctrla.rs b/src/wdt/ctrla.rs
new file mode 100644
index 0000000..a3c9346
--- /dev/null
+++ b/src/wdt/ctrla.rs
@@ -0,0 +1,204 @@
+#[doc = "Register `CTRLA` reader"]
+pub struct R(crate::R<CTRLA_SPEC>);
+impl core::ops::Deref for R {
+ type Target = crate::R<CTRLA_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl From<crate::R<CTRLA_SPEC>> for R {
+ #[inline(always)]
+ fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
+ R(reader)
+ }
+}
+#[doc = "Register `CTRLA` writer"]
+pub struct W(crate::W<CTRLA_SPEC>);
+impl core::ops::Deref for W {
+ type Target = crate::W<CTRLA_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl core::ops::DerefMut for W {
+ #[inline(always)]
+ fn deref_mut(&mut self) -> &mut Self::Target {
+ &mut self.0
+ }
+}
+impl From<crate::W<CTRLA_SPEC>> for W {
+ #[inline(always)]
+ fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
+ W(writer)
+ }
+}
+#[doc = "Field `ENABLE` reader - Enable"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+ pub(crate) fn new(bits: bool) -> Self {
+ ENABLE_R(crate::FieldReader::new(bits))
+ }
+}
+impl core::ops::Deref for ENABLE_R {
+ type Target = crate::FieldReader<bool, bool>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `ENABLE` writer - Enable"]
+pub struct ENABLE_W<'a> {
+ w: &'a mut W,
+}
+impl<'a> ENABLE_W<'a> {
+ #[doc = r"Sets the field bit"]
+ #[inline(always)]
+ pub fn set_bit(self) -> &'a mut W {
+ self.bit(true)
+ }
+ #[doc = r"Clears the field bit"]
+ #[inline(always)]
+ pub fn clear_bit(self) -> &'a mut W {
+ self.bit(false)
+ }
+ #[doc = r"Writes raw bits to the field"]
+ #[inline(always)]
+ pub fn bit(self, value: bool) -> &'a mut W {
+ self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
+ self.w
+ }
+}
+#[doc = "Field `WEN` reader - Watchdog Timer Window Mode Enable"]
+pub struct WEN_R(crate::FieldReader<bool, bool>);
+impl WEN_R {
+ pub(crate) fn new(bits: bool) -> Self {
+ WEN_R(crate::FieldReader::new(bits))
+ }
+}
+impl core::ops::Deref for WEN_R {
+ type Target = crate::FieldReader<bool, bool>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `WEN` writer - Watchdog Timer Window Mode Enable"]
+pub struct WEN_W<'a> {
+ w: &'a mut W,
+}
+impl<'a> WEN_W<'a> {
+ #[doc = r"Sets the field bit"]
+ #[inline(always)]
+ pub fn set_bit(self) -> &'a mut W {
+ self.bit(true)
+ }
+ #[doc = r"Clears the field bit"]
+ #[inline(always)]
+ pub fn clear_bit(self) -> &'a mut W {
+ self.bit(false)
+ }
+ #[doc = r"Writes raw bits to the field"]
+ #[inline(always)]
+ pub fn bit(self, value: bool) -> &'a mut W {
+ self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
+ self.w
+ }
+}
+#[doc = "Field `ALWAYSON` reader - Always-On"]
+pub struct ALWAYSON_R(crate::FieldReader<bool, bool>);
+impl ALWAYSON_R {
+ pub(crate) fn new(bits: bool) -> Self {
+ ALWAYSON_R(crate::FieldReader::new(bits))
+ }
+}
+impl core::ops::Deref for ALWAYSON_R {
+ type Target = crate::FieldReader<bool, bool>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `ALWAYSON` writer - Always-On"]
+pub struct ALWAYSON_W<'a> {
+ w: &'a mut W,
+}
+impl<'a> ALWAYSON_W<'a> {
+ #[doc = r"Sets the field bit"]
+ #[inline(always)]
+ pub fn set_bit(self) -> &'a mut W {
+ self.bit(true)
+ }
+ #[doc = r"Clears the field bit"]
+ #[inline(always)]
+ pub fn clear_bit(self) -> &'a mut W {
+ self.bit(false)
+ }
+ #[doc = r"Writes raw bits to the field"]
+ #[inline(always)]
+ pub fn bit(self, value: bool) -> &'a mut W {
+ self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7);
+ self.w
+ }
+}
+impl R {
+ #[doc = "Bit 1 - Enable"]
+ #[inline(always)]
+ pub fn enable(&self) -> ENABLE_R {
+ ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+ }
+ #[doc = "Bit 2 - Watchdog Timer Window Mode Enable"]
+ #[inline(always)]
+ pub fn wen(&self) -> WEN_R {
+ WEN_R::new(((self.bits >> 2) & 0x01) != 0)
+ }
+ #[doc = "Bit 7 - Always-On"]
+ #[inline(always)]
+ pub fn alwayson(&self) -> ALWAYSON_R {
+ ALWAYSON_R::new(((self.bits >> 7) & 0x01) != 0)
+ }
+}
+impl W {
+ #[doc = "Bit 1 - Enable"]
+ #[inline(always)]
+ pub fn enable(&mut self) -> ENABLE_W {
+ ENABLE_W { w: self }
+ }
+ #[doc = "Bit 2 - Watchdog Timer Window Mode Enable"]
+ #[inline(always)]
+ pub fn wen(&mut self) -> WEN_W {
+ WEN_W { w: self }
+ }
+ #[doc = "Bit 7 - Always-On"]
+ #[inline(always)]
+ pub fn alwayson(&mut self) -> ALWAYSON_W {
+ ALWAYSON_W { w: self }
+ }
+ #[doc = "Writes raw bits to the register."]
+ #[inline(always)]
+ pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+ self.0.bits(bits);
+ self
+ }
+}
+#[doc = "Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
+pub struct CTRLA_SPEC;
+impl crate::RegisterSpec for CTRLA_SPEC {
+ type Ux = u8;
+}
+#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
+impl crate::Readable for CTRLA_SPEC {
+ type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
+impl crate::Writable for CTRLA_SPEC {
+ type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLA to value 0"]
+impl crate::Resettable for CTRLA_SPEC {
+ #[inline(always)]
+ fn reset_value() -> Self::Ux {
+ 0
+ }
+}
diff --git a/src/wdt/ewctrl.rs b/src/wdt/ewctrl.rs
new file mode 100644
index 0000000..a84faa8
--- /dev/null
+++ b/src/wdt/ewctrl.rs
@@ -0,0 +1,281 @@
+#[doc = "Register `EWCTRL` reader"]
+pub struct R(crate::R<EWCTRL_SPEC>);
+impl core::ops::Deref for R {
+ type Target = crate::R<EWCTRL_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl From<crate::R<EWCTRL_SPEC>> for R {
+ #[inline(always)]
+ fn from(reader: crate::R<EWCTRL_SPEC>) -> Self {
+ R(reader)
+ }
+}
+#[doc = "Register `EWCTRL` writer"]
+pub struct W(crate::W<EWCTRL_SPEC>);
+impl core::ops::Deref for W {
+ type Target = crate::W<EWCTRL_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl core::ops::DerefMut for W {
+ #[inline(always)]
+ fn deref_mut(&mut self) -> &mut Self::Target {
+ &mut self.0
+ }
+}
+impl From<crate::W<EWCTRL_SPEC>> for W {
+ #[inline(always)]
+ fn from(writer: crate::W<EWCTRL_SPEC>) -> Self {
+ W(writer)
+ }
+}
+#[doc = "Early Warning Interrupt Time Offset\n\nValue on reset: 11"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum EWOFFSET_A {
+ #[doc = "0: 8 clock cycles"]
+ CYC8 = 0,
+ #[doc = "1: 16 clock cycles"]
+ CYC16 = 1,
+ #[doc = "2: 32 clock cycles"]
+ CYC32 = 2,
+ #[doc = "3: 64 clock cycles"]
+ CYC64 = 3,
+ #[doc = "4: 128 clock cycles"]
+ CYC128 = 4,
+ #[doc = "5: 256 clock cycles"]
+ CYC256 = 5,
+ #[doc = "6: 512 clock cycles"]
+ CYC512 = 6,
+ #[doc = "7: 1024 clock cycles"]
+ CYC1024 = 7,
+ #[doc = "8: 2048 clock cycles"]
+ CYC2048 = 8,
+ #[doc = "9: 4096 clock cycles"]
+ CYC4096 = 9,
+ #[doc = "10: 8192 clock cycles"]
+ CYC8192 = 10,
+ #[doc = "11: 16384 clock cycles"]
+ CYC16384 = 11,
+}
+impl From<EWOFFSET_A> for u8 {
+ #[inline(always)]
+ fn from(variant: EWOFFSET_A) -> Self {
+ variant as _
+ }
+}
+#[doc = "Field `EWOFFSET` reader - Early Warning Interrupt Time Offset"]
+pub struct EWOFFSET_R(crate::FieldReader<u8, EWOFFSET_A>);
+impl EWOFFSET_R {
+ pub(crate) fn new(bits: u8) -> Self {
+ EWOFFSET_R(crate::FieldReader::new(bits))
+ }
+ #[doc = r"Get enumerated values variant"]
+ #[inline(always)]
+ pub fn variant(&self) -> Option<EWOFFSET_A> {
+ match self.bits {
+ 0 => Some(EWOFFSET_A::CYC8),
+ 1 => Some(EWOFFSET_A::CYC16),
+ 2 => Some(EWOFFSET_A::CYC32),
+ 3 => Some(EWOFFSET_A::CYC64),
+ 4 => Some(EWOFFSET_A::CYC128),
+ 5 => Some(EWOFFSET_A::CYC256),
+ 6 => Some(EWOFFSET_A::CYC512),
+ 7 => Some(EWOFFSET_A::CYC1024),
+ 8 => Some(EWOFFSET_A::CYC2048),
+ 9 => Some(EWOFFSET_A::CYC4096),
+ 10 => Some(EWOFFSET_A::CYC8192),
+ 11 => Some(EWOFFSET_A::CYC16384),
+ _ => None,
+ }
+ }
+ #[doc = "Checks if the value of the field is `CYC8`"]
+ #[inline(always)]
+ pub fn is_cyc8(&self) -> bool {
+ **self == EWOFFSET_A::CYC8
+ }
+ #[doc = "Checks if the value of the field is `CYC16`"]
+ #[inline(always)]
+ pub fn is_cyc16(&self) -> bool {
+ **self == EWOFFSET_A::CYC16
+ }
+ #[doc = "Checks if the value of the field is `CYC32`"]
+ #[inline(always)]
+ pub fn is_cyc32(&self) -> bool {
+ **self == EWOFFSET_A::CYC32
+ }
+ #[doc = "Checks if the value of the field is `CYC64`"]
+ #[inline(always)]
+ pub fn is_cyc64(&self) -> bool {
+ **self == EWOFFSET_A::CYC64
+ }
+ #[doc = "Checks if the value of the field is `CYC128`"]
+ #[inline(always)]
+ pub fn is_cyc128(&self) -> bool {
+ **self == EWOFFSET_A::CYC128
+ }
+ #[doc = "Checks if the value of the field is `CYC256`"]
+ #[inline(always)]
+ pub fn is_cyc256(&self) -> bool {
+ **self == EWOFFSET_A::CYC256
+ }
+ #[doc = "Checks if the value of the field is `CYC512`"]
+ #[inline(always)]
+ pub fn is_cyc512(&self) -> bool {
+ **self == EWOFFSET_A::CYC512
+ }
+ #[doc = "Checks if the value of the field is `CYC1024`"]
+ #[inline(always)]
+ pub fn is_cyc1024(&self) -> bool {
+ **self == EWOFFSET_A::CYC1024
+ }
+ #[doc = "Checks if the value of the field is `CYC2048`"]
+ #[inline(always)]
+ pub fn is_cyc2048(&self) -> bool {
+ **self == EWOFFSET_A::CYC2048
+ }
+ #[doc = "Checks if the value of the field is `CYC4096`"]
+ #[inline(always)]
+ pub fn is_cyc4096(&self) -> bool {
+ **self == EWOFFSET_A::CYC4096
+ }
+ #[doc = "Checks if the value of the field is `CYC8192`"]
+ #[inline(always)]
+ pub fn is_cyc8192(&self) -> bool {
+ **self == EWOFFSET_A::CYC8192
+ }
+ #[doc = "Checks if the value of the field is `CYC16384`"]
+ #[inline(always)]
+ pub fn is_cyc16384(&self) -> bool {
+ **self == EWOFFSET_A::CYC16384
+ }
+}
+impl core::ops::Deref for EWOFFSET_R {
+ type Target = crate::FieldReader<u8, EWOFFSET_A>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `EWOFFSET` writer - Early Warning Interrupt Time Offset"]
+pub struct EWOFFSET_W<'a> {
+ w: &'a mut W,
+}
+impl<'a> EWOFFSET_W<'a> {
+ #[doc = r"Writes `variant` to the field"]
+ #[inline(always)]
+ pub fn variant(self, variant: EWOFFSET_A) -> &'a mut W {
+ unsafe { self.bits(variant.into()) }
+ }
+ #[doc = "8 clock cycles"]
+ #[inline(always)]
+ pub fn cyc8(self) -> &'a mut W {
+ self.variant(EWOFFSET_A::CYC8)
+ }
+ #[doc = "16 clock cycles"]
+ #[inline(always)]
+ pub fn cyc16(self) -> &'a mut W {
+ self.variant(EWOFFSET_A::CYC16)
+ }
+ #[doc = "32 clock cycles"]
+ #[inline(always)]
+ pub fn cyc32(self) -> &'a mut W {
+ self.variant(EWOFFSET_A::CYC32)
+ }
+ #[doc = "64 clock cycles"]
+ #[inline(always)]
+ pub fn cyc64(self) -> &'a mut W {
+ self.variant(EWOFFSET_A::CYC64)
+ }
+ #[doc = "128 clock cycles"]
+ #[inline(always)]
+ pub fn cyc128(self) -> &'a mut W {
+ self.variant(EWOFFSET_A::CYC128)
+ }
+ #[doc = "256 clock cycles"]
+ #[inline(always)]
+ pub fn cyc256(self) -> &'a mut W {
+ self.variant(EWOFFSET_A::CYC256)
+ }
+ #[doc = "512 clock cycles"]
+ #[inline(always)]
+ pub fn cyc512(self) -> &'a mut W {
+ self.variant(EWOFFSET_A::CYC512)
+ }
+ #[doc = "1024 clock cycles"]
+ #[inline(always)]
+ pub fn cyc1024(self) -> &'a mut W {
+ self.variant(EWOFFSET_A::CYC1024)
+ }
+ #[doc = "2048 clock cycles"]
+ #[inline(always)]
+ pub fn cyc2048(self) -> &'a mut W {
+ self.variant(EWOFFSET_A::CYC2048)
+ }
+ #[doc = "4096 clock cycles"]
+ #[inline(always)]
+ pub fn cyc4096(self) -> &'a mut W {
+ self.variant(EWOFFSET_A::CYC4096)
+ }
+ #[doc = "8192 clock cycles"]
+ #[inline(always)]
+ pub fn cyc8192(self) -> &'a mut W {
+ self.variant(EWOFFSET_A::CYC8192)
+ }
+ #[doc = "16384 clock cycles"]
+ #[inline(always)]
+ pub fn cyc16384(self) -> &'a mut W {
+ self.variant(EWOFFSET_A::CYC16384)
+ }
+ #[doc = r"Writes raw bits to the field"]
+ #[inline(always)]
+ pub unsafe fn bits(self, value: u8) -> &'a mut W {
+ self.w.bits = (self.w.bits & !0x0f) | (value as u8 & 0x0f);
+ self.w
+ }
+}
+impl R {
+ #[doc = "Bits 0:3 - Early Warning Interrupt Time Offset"]
+ #[inline(always)]
+ pub fn ewoffset(&self) -> EWOFFSET_R {
+ EWOFFSET_R::new((self.bits & 0x0f) as u8)
+ }
+}
+impl W {
+ #[doc = "Bits 0:3 - Early Warning Interrupt Time Offset"]
+ #[inline(always)]
+ pub fn ewoffset(&mut self) -> EWOFFSET_W {
+ EWOFFSET_W { w: self }
+ }
+ #[doc = "Writes raw bits to the register."]
+ #[inline(always)]
+ pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+ self.0.bits(bits);
+ self
+ }
+}
+#[doc = "Early Warning Interrupt Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ewctrl](index.html) module"]
+pub struct EWCTRL_SPEC;
+impl crate::RegisterSpec for EWCTRL_SPEC {
+ type Ux = u8;
+}
+#[doc = "`read()` method returns [ewctrl::R](R) reader structure"]
+impl crate::Readable for EWCTRL_SPEC {
+ type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ewctrl::W](W) writer structure"]
+impl crate::Writable for EWCTRL_SPEC {
+ type Writer = W;
+}
+#[doc = "`reset()` method sets EWCTRL to value 0x0b"]
+impl crate::Resettable for EWCTRL_SPEC {
+ #[inline(always)]
+ fn reset_value() -> Self::Ux {
+ 0x0b
+ }
+}
diff --git a/src/wdt/intenclr.rs b/src/wdt/intenclr.rs
new file mode 100644
index 0000000..e83b636
--- /dev/null
+++ b/src/wdt/intenclr.rs
@@ -0,0 +1,112 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+ type Target = crate::R<INTENCLR_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+ #[inline(always)]
+ fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+ R(reader)
+ }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+ type Target = crate::W<INTENCLR_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl core::ops::DerefMut for W {
+ #[inline(always)]
+ fn deref_mut(&mut self) -> &mut Self::Target {
+ &mut self.0
+ }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+ #[inline(always)]
+ fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+ W(writer)
+ }
+}
+#[doc = "Field `EW` reader - Early Warning Interrupt Enable"]
+pub struct EW_R(crate::FieldReader<bool, bool>);
+impl EW_R {
+ pub(crate) fn new(bits: bool) -> Self {
+ EW_R(crate::FieldReader::new(bits))
+ }
+}
+impl core::ops::Deref for EW_R {
+ type Target = crate::FieldReader<bool, bool>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `EW` writer - Early Warning Interrupt Enable"]
+pub struct EW_W<'a> {
+ w: &'a mut W,
+}
+impl<'a> EW_W<'a> {
+ #[doc = r"Sets the field bit"]
+ #[inline(always)]
+ pub fn set_bit(self) -> &'a mut W {
+ self.bit(true)
+ }
+ #[doc = r"Clears the field bit"]
+ #[inline(always)]
+ pub fn clear_bit(self) -> &'a mut W {
+ self.bit(false)
+ }
+ #[doc = r"Writes raw bits to the field"]
+ #[inline(always)]
+ pub fn bit(self, value: bool) -> &'a mut W {
+ self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+ self.w
+ }
+}
+impl R {
+ #[doc = "Bit 0 - Early Warning Interrupt Enable"]
+ #[inline(always)]
+ pub fn ew(&self) -> EW_R {
+ EW_R::new((self.bits & 0x01) != 0)
+ }
+}
+impl W {
+ #[doc = "Bit 0 - Early Warning Interrupt Enable"]
+ #[inline(always)]
+ pub fn ew(&mut self) -> EW_W {
+ EW_W { w: self }
+ }
+ #[doc = "Writes raw bits to the register."]
+ #[inline(always)]
+ pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+ self.0.bits(bits);
+ self
+ }
+}
+#[doc = "Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+ type Ux = u8;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+ type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+ type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+ #[inline(always)]
+ fn reset_value() -> Self::Ux {
+ 0
+ }
+}
diff --git a/src/wdt/intenset.rs b/src/wdt/intenset.rs
new file mode 100644
index 0000000..a52f8e7
--- /dev/null
+++ b/src/wdt/intenset.rs
@@ -0,0 +1,112 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+ type Target = crate::R<INTENSET_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+ #[inline(always)]
+ fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+ R(reader)
+ }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+ type Target = crate::W<INTENSET_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl core::ops::DerefMut for W {
+ #[inline(always)]
+ fn deref_mut(&mut self) -> &mut Self::Target {
+ &mut self.0
+ }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+ #[inline(always)]
+ fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+ W(writer)
+ }
+}
+#[doc = "Field `EW` reader - Early Warning Interrupt Enable"]
+pub struct EW_R(crate::FieldReader<bool, bool>);
+impl EW_R {
+ pub(crate) fn new(bits: bool) -> Self {
+ EW_R(crate::FieldReader::new(bits))
+ }
+}
+impl core::ops::Deref for EW_R {
+ type Target = crate::FieldReader<bool, bool>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `EW` writer - Early Warning Interrupt Enable"]
+pub struct EW_W<'a> {
+ w: &'a mut W,
+}
+impl<'a> EW_W<'a> {
+ #[doc = r"Sets the field bit"]
+ #[inline(always)]
+ pub fn set_bit(self) -> &'a mut W {
+ self.bit(true)
+ }
+ #[doc = r"Clears the field bit"]
+ #[inline(always)]
+ pub fn clear_bit(self) -> &'a mut W {
+ self.bit(false)
+ }
+ #[doc = r"Writes raw bits to the field"]
+ #[inline(always)]
+ pub fn bit(self, value: bool) -> &'a mut W {
+ self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+ self.w
+ }
+}
+impl R {
+ #[doc = "Bit 0 - Early Warning Interrupt Enable"]
+ #[inline(always)]
+ pub fn ew(&self) -> EW_R {
+ EW_R::new((self.bits & 0x01) != 0)
+ }
+}
+impl W {
+ #[doc = "Bit 0 - Early Warning Interrupt Enable"]
+ #[inline(always)]
+ pub fn ew(&mut self) -> EW_W {
+ EW_W { w: self }
+ }
+ #[doc = "Writes raw bits to the register."]
+ #[inline(always)]
+ pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+ self.0.bits(bits);
+ self
+ }
+}
+#[doc = "Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+ type Ux = u8;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+ type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+ type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+ #[inline(always)]
+ fn reset_value() -> Self::Ux {
+ 0
+ }
+}
diff --git a/src/wdt/intflag.rs b/src/wdt/intflag.rs
new file mode 100644
index 0000000..35706a5
--- /dev/null
+++ b/src/wdt/intflag.rs
@@ -0,0 +1,112 @@
+#[doc = "Register `INTFLAG` reader"]
+pub struct R(crate::R<INTFLAG_SPEC>);
+impl core::ops::Deref for R {
+ type Target = crate::R<INTFLAG_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl From<crate::R<INTFLAG_SPEC>> for R {
+ #[inline(always)]
+ fn from(reader: crate::R<INTFLAG_SPEC>) -> Self {
+ R(reader)
+ }
+}
+#[doc = "Register `INTFLAG` writer"]
+pub struct W(crate::W<INTFLAG_SPEC>);
+impl core::ops::Deref for W {
+ type Target = crate::W<INTFLAG_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl core::ops::DerefMut for W {
+ #[inline(always)]
+ fn deref_mut(&mut self) -> &mut Self::Target {
+ &mut self.0
+ }
+}
+impl From<crate::W<INTFLAG_SPEC>> for W {
+ #[inline(always)]
+ fn from(writer: crate::W<INTFLAG_SPEC>) -> Self {
+ W(writer)
+ }
+}
+#[doc = "Field `EW` reader - Early Warning"]
+pub struct EW_R(crate::FieldReader<bool, bool>);
+impl EW_R {
+ pub(crate) fn new(bits: bool) -> Self {
+ EW_R(crate::FieldReader::new(bits))
+ }
+}
+impl core::ops::Deref for EW_R {
+ type Target = crate::FieldReader<bool, bool>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `EW` writer - Early Warning"]
+pub struct EW_W<'a> {
+ w: &'a mut W,
+}
+impl<'a> EW_W<'a> {
+ #[doc = r"Sets the field bit"]
+ #[inline(always)]
+ pub fn set_bit(self) -> &'a mut W {
+ self.bit(true)
+ }
+ #[doc = r"Clears the field bit"]
+ #[inline(always)]
+ pub fn clear_bit(self) -> &'a mut W {
+ self.bit(false)
+ }
+ #[doc = r"Writes raw bits to the field"]
+ #[inline(always)]
+ pub fn bit(self, value: bool) -> &'a mut W {
+ self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
+ self.w
+ }
+}
+impl R {
+ #[doc = "Bit 0 - Early Warning"]
+ #[inline(always)]
+ pub fn ew(&self) -> EW_R {
+ EW_R::new((self.bits & 0x01) != 0)
+ }
+}
+impl W {
+ #[doc = "Bit 0 - Early Warning"]
+ #[inline(always)]
+ pub fn ew(&mut self) -> EW_W {
+ EW_W { w: self }
+ }
+ #[doc = "Writes raw bits to the register."]
+ #[inline(always)]
+ pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+ self.0.bits(bits);
+ self
+ }
+}
+#[doc = "Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"]
+pub struct INTFLAG_SPEC;
+impl crate::RegisterSpec for INTFLAG_SPEC {
+ type Ux = u8;
+}
+#[doc = "`read()` method returns [intflag::R](R) reader structure"]
+impl crate::Readable for INTFLAG_SPEC {
+ type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"]
+impl crate::Writable for INTFLAG_SPEC {
+ type Writer = W;
+}
+#[doc = "`reset()` method sets INTFLAG to value 0"]
+impl crate::Resettable for INTFLAG_SPEC {
+ #[inline(always)]
+ fn reset_value() -> Self::Ux {
+ 0
+ }
+}
diff --git a/src/wdt/syncbusy.rs b/src/wdt/syncbusy.rs
new file mode 100644
index 0000000..c2affbb
--- /dev/null
+++ b/src/wdt/syncbusy.rs
@@ -0,0 +1,109 @@
+#[doc = "Register `SYNCBUSY` reader"]
+pub struct R(crate::R<SYNCBUSY_SPEC>);
+impl core::ops::Deref for R {
+ type Target = crate::R<SYNCBUSY_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl From<crate::R<SYNCBUSY_SPEC>> for R {
+ #[inline(always)]
+ fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self {
+ R(reader)
+ }
+}
+#[doc = "Field `ENABLE` reader - Enable Busy"]
+pub struct ENABLE_R(crate::FieldReader<bool, bool>);
+impl ENABLE_R {
+ pub(crate) fn new(bits: bool) -> Self {
+ ENABLE_R(crate::FieldReader::new(bits))
+ }
+}
+impl core::ops::Deref for ENABLE_R {
+ type Target = crate::FieldReader<bool, bool>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `WEN` reader - Window Enable Busy"]
+pub struct WEN_R(crate::FieldReader<bool, bool>);
+impl WEN_R {
+ pub(crate) fn new(bits: bool) -> Self {
+ WEN_R(crate::FieldReader::new(bits))
+ }
+}
+impl core::ops::Deref for WEN_R {
+ type Target = crate::FieldReader<bool, bool>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `ALWAYSON` reader - Always-On Busy"]
+pub struct ALWAYSON_R(crate::FieldReader<bool, bool>);
+impl ALWAYSON_R {
+ pub(crate) fn new(bits: bool) -> Self {
+ ALWAYSON_R(crate::FieldReader::new(bits))
+ }
+}
+impl core::ops::Deref for ALWAYSON_R {
+ type Target = crate::FieldReader<bool, bool>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `CLEAR` reader - Clear Busy"]
+pub struct CLEAR_R(crate::FieldReader<bool, bool>);
+impl CLEAR_R {
+ pub(crate) fn new(bits: bool) -> Self {
+ CLEAR_R(crate::FieldReader::new(bits))
+ }
+}
+impl core::ops::Deref for CLEAR_R {
+ type Target = crate::FieldReader<bool, bool>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl R {
+ #[doc = "Bit 1 - Enable Busy"]
+ #[inline(always)]
+ pub fn enable(&self) -> ENABLE_R {
+ ENABLE_R::new(((self.bits >> 1) & 0x01) != 0)
+ }
+ #[doc = "Bit 2 - Window Enable Busy"]
+ #[inline(always)]
+ pub fn wen(&self) -> WEN_R {
+ WEN_R::new(((self.bits >> 2) & 0x01) != 0)
+ }
+ #[doc = "Bit 3 - Always-On Busy"]
+ #[inline(always)]
+ pub fn alwayson(&self) -> ALWAYSON_R {
+ ALWAYSON_R::new(((self.bits >> 3) & 0x01) != 0)
+ }
+ #[doc = "Bit 4 - Clear Busy"]
+ #[inline(always)]
+ pub fn clear(&self) -> CLEAR_R {
+ CLEAR_R::new(((self.bits >> 4) & 0x01) != 0)
+ }
+}
+#[doc = "Synchronization Busy\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"]
+pub struct SYNCBUSY_SPEC;
+impl crate::RegisterSpec for SYNCBUSY_SPEC {
+ type Ux = u32;
+}
+#[doc = "`read()` method returns [syncbusy::R](R) reader structure"]
+impl crate::Readable for SYNCBUSY_SPEC {
+ type Reader = R;
+}
+#[doc = "`reset()` method sets SYNCBUSY to value 0"]
+impl crate::Resettable for SYNCBUSY_SPEC {
+ #[inline(always)]
+ fn reset_value() -> Self::Ux {
+ 0
+ }
+}
generated by cgit v1.2.3-70-g09d2 (git 2.51.1) at 2025-12-06 06:54:58 +0000