Initial commit

1 files changed, 174 insertions, 0 deletions

diff --git a/src/sercom0/usart_int/ctrlc.rs b/src/sercom0/usart_int/ctrlc.rs
new file mode 100644
index 0000000..99619e1
--- /dev/null
+++ b/src/sercom0/usart_int/ctrlc.rs
@@ -0,0 +1,174 @@
+#[doc = "Register `CTRLC` reader"]
+pub struct R(crate::R<CTRLC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTRLC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTRLC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTRLC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTRLC` writer"]
+pub struct W(crate::W<CTRLC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTRLC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTRLC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTRLC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `GTIME` reader - RS485 Guard Time"]
+pub struct GTIME_R(crate::FieldReader<u8, u8>);
+impl GTIME_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        GTIME_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for GTIME_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `GTIME` writer - RS485 Guard Time"]
+pub struct GTIME_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> GTIME_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07);
+        self.w
+    }
+}
+#[doc = "Field `BRKLEN` reader - LIN Master Break Length"]
+pub struct BRKLEN_R(crate::FieldReader<u8, u8>);
+impl BRKLEN_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        BRKLEN_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for BRKLEN_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `BRKLEN` writer - LIN Master Break Length"]
+pub struct BRKLEN_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> BRKLEN_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8);
+        self.w
+    }
+}
+#[doc = "Field `HDRDLY` reader - LIN Master Header Delay"]
+pub struct HDRDLY_R(crate::FieldReader<u8, u8>);
+impl HDRDLY_R {
+    pub(crate) fn new(bits: u8) -> Self {
+        HDRDLY_R(crate::FieldReader::new(bits))
+    }
+}
+impl core::ops::Deref for HDRDLY_R {
+    type Target = crate::FieldReader<u8, u8>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+#[doc = "Field `HDRDLY` writer - LIN Master Header Delay"]
+pub struct HDRDLY_W<'a> {
+    w: &'a mut W,
+}
+impl<'a> HDRDLY_W<'a> {
+    #[doc = r"Writes raw bits to the field"]
+    #[inline(always)]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10);
+        self.w
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - RS485 Guard Time"]
+    #[inline(always)]
+    pub fn gtime(&self) -> GTIME_R {
+        GTIME_R::new((self.bits & 0x07) as u8)
+    }
+    #[doc = "Bits 8:9 - LIN Master Break Length"]
+    #[inline(always)]
+    pub fn brklen(&self) -> BRKLEN_R {
+        BRKLEN_R::new(((self.bits >> 8) & 0x03) as u8)
+    }
+    #[doc = "Bits 10:11 - LIN Master Header Delay"]
+    #[inline(always)]
+    pub fn hdrdly(&self) -> HDRDLY_R {
+        HDRDLY_R::new(((self.bits >> 10) & 0x03) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - RS485 Guard Time"]
+    #[inline(always)]
+    pub fn gtime(&mut self) -> GTIME_W {
+        GTIME_W { w: self }
+    }
+    #[doc = "Bits 8:9 - LIN Master Break Length"]
+    #[inline(always)]
+    pub fn brklen(&mut self) -> BRKLEN_W {
+        BRKLEN_W { w: self }
+    }
+    #[doc = "Bits 10:11 - LIN Master Header Delay"]
+    #[inline(always)]
+    pub fn hdrdly(&mut self) -> HDRDLY_W {
+        HDRDLY_W { w: self }
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "USART_INT Control C\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlc](index.html) module"]
+pub struct CTRLC_SPEC;
+impl crate::RegisterSpec for CTRLC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctrlc::R](R) reader structure"]
+impl crate::Readable for CTRLC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrlc::W](W) writer structure"]
+impl crate::Writable for CTRLC_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLC to value 0"]
+impl crate::Resettable for CTRLC_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}