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-rw-r--r--src/adc0/ctrlb.rs229
1 files changed, 229 insertions, 0 deletions
diff --git a/src/adc0/ctrlb.rs b/src/adc0/ctrlb.rs
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+++ b/src/adc0/ctrlb.rs
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+#[doc = "Register `CTRLB` reader"]
+pub struct R(crate::R<CTRLB_SPEC>);
+impl core::ops::Deref for R {
+ type Target = crate::R<CTRLB_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl From<crate::R<CTRLB_SPEC>> for R {
+ #[inline(always)]
+ fn from(reader: crate::R<CTRLB_SPEC>) -> Self {
+ R(reader)
+ }
+}
+#[doc = "Register `CTRLB` writer"]
+pub struct W(crate::W<CTRLB_SPEC>);
+impl core::ops::Deref for W {
+ type Target = crate::W<CTRLB_SPEC>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+impl core::ops::DerefMut for W {
+ #[inline(always)]
+ fn deref_mut(&mut self) -> &mut Self::Target {
+ &mut self.0
+ }
+}
+impl From<crate::W<CTRLB_SPEC>> for W {
+ #[inline(always)]
+ fn from(writer: crate::W<CTRLB_SPEC>) -> Self {
+ W(writer)
+ }
+}
+#[doc = "Prescaler Configuration\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum PRESCALER_A {
+ #[doc = "0: Peripheral clock divided by 2"]
+ DIV2 = 0,
+ #[doc = "1: Peripheral clock divided by 4"]
+ DIV4 = 1,
+ #[doc = "2: Peripheral clock divided by 8"]
+ DIV8 = 2,
+ #[doc = "3: Peripheral clock divided by 16"]
+ DIV16 = 3,
+ #[doc = "4: Peripheral clock divided by 32"]
+ DIV32 = 4,
+ #[doc = "5: Peripheral clock divided by 64"]
+ DIV64 = 5,
+ #[doc = "6: Peripheral clock divided by 128"]
+ DIV128 = 6,
+ #[doc = "7: Peripheral clock divided by 256"]
+ DIV256 = 7,
+}
+impl From<PRESCALER_A> for u8 {
+ #[inline(always)]
+ fn from(variant: PRESCALER_A) -> Self {
+ variant as _
+ }
+}
+#[doc = "Field `PRESCALER` reader - Prescaler Configuration"]
+pub struct PRESCALER_R(crate::FieldReader<u8, PRESCALER_A>);
+impl PRESCALER_R {
+ pub(crate) fn new(bits: u8) -> Self {
+ PRESCALER_R(crate::FieldReader::new(bits))
+ }
+ #[doc = r"Get enumerated values variant"]
+ #[inline(always)]
+ pub fn variant(&self) -> PRESCALER_A {
+ match self.bits {
+ 0 => PRESCALER_A::DIV2,
+ 1 => PRESCALER_A::DIV4,
+ 2 => PRESCALER_A::DIV8,
+ 3 => PRESCALER_A::DIV16,
+ 4 => PRESCALER_A::DIV32,
+ 5 => PRESCALER_A::DIV64,
+ 6 => PRESCALER_A::DIV128,
+ 7 => PRESCALER_A::DIV256,
+ _ => unreachable!(),
+ }
+ }
+ #[doc = "Checks if the value of the field is `DIV2`"]
+ #[inline(always)]
+ pub fn is_div2(&self) -> bool {
+ **self == PRESCALER_A::DIV2
+ }
+ #[doc = "Checks if the value of the field is `DIV4`"]
+ #[inline(always)]
+ pub fn is_div4(&self) -> bool {
+ **self == PRESCALER_A::DIV4
+ }
+ #[doc = "Checks if the value of the field is `DIV8`"]
+ #[inline(always)]
+ pub fn is_div8(&self) -> bool {
+ **self == PRESCALER_A::DIV8
+ }
+ #[doc = "Checks if the value of the field is `DIV16`"]
+ #[inline(always)]
+ pub fn is_div16(&self) -> bool {
+ **self == PRESCALER_A::DIV16
+ }
+ #[doc = "Checks if the value of the field is `DIV32`"]
+ #[inline(always)]
+ pub fn is_div32(&self) -> bool {
+ **self == PRESCALER_A::DIV32
+ }
+ #[doc = "Checks if the value of the field is `DIV64`"]
+ #[inline(always)]
+ pub fn is_div64(&self) -> bool {
+ **self == PRESCALER_A::DIV64
+ }
+ #[doc = "Checks if the value of the field is `DIV128`"]
+ #[inline(always)]
+ pub fn is_div128(&self) -> bool {
+ **self == PRESCALER_A::DIV128
+ }
+ #[doc = "Checks if the value of the field is `DIV256`"]
+ #[inline(always)]
+ pub fn is_div256(&self) -> bool {
+ **self == PRESCALER_A::DIV256
+ }
+}
+impl core::ops::Deref for PRESCALER_R {
+ type Target = crate::FieldReader<u8, PRESCALER_A>;
+ #[inline(always)]
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+#[doc = "Field `PRESCALER` writer - Prescaler Configuration"]
+pub struct PRESCALER_W<'a> {
+ w: &'a mut W,
+}
+impl<'a> PRESCALER_W<'a> {
+ #[doc = r"Writes `variant` to the field"]
+ #[inline(always)]
+ pub fn variant(self, variant: PRESCALER_A) -> &'a mut W {
+ self.bits(variant.into())
+ }
+ #[doc = "Peripheral clock divided by 2"]
+ #[inline(always)]
+ pub fn div2(self) -> &'a mut W {
+ self.variant(PRESCALER_A::DIV2)
+ }
+ #[doc = "Peripheral clock divided by 4"]
+ #[inline(always)]
+ pub fn div4(self) -> &'a mut W {
+ self.variant(PRESCALER_A::DIV4)
+ }
+ #[doc = "Peripheral clock divided by 8"]
+ #[inline(always)]
+ pub fn div8(self) -> &'a mut W {
+ self.variant(PRESCALER_A::DIV8)
+ }
+ #[doc = "Peripheral clock divided by 16"]
+ #[inline(always)]
+ pub fn div16(self) -> &'a mut W {
+ self.variant(PRESCALER_A::DIV16)
+ }
+ #[doc = "Peripheral clock divided by 32"]
+ #[inline(always)]
+ pub fn div32(self) -> &'a mut W {
+ self.variant(PRESCALER_A::DIV32)
+ }
+ #[doc = "Peripheral clock divided by 64"]
+ #[inline(always)]
+ pub fn div64(self) -> &'a mut W {
+ self.variant(PRESCALER_A::DIV64)
+ }
+ #[doc = "Peripheral clock divided by 128"]
+ #[inline(always)]
+ pub fn div128(self) -> &'a mut W {
+ self.variant(PRESCALER_A::DIV128)
+ }
+ #[doc = "Peripheral clock divided by 256"]
+ #[inline(always)]
+ pub fn div256(self) -> &'a mut W {
+ self.variant(PRESCALER_A::DIV256)
+ }
+ #[doc = r"Writes raw bits to the field"]
+ #[inline(always)]
+ pub fn bits(self, value: u8) -> &'a mut W {
+ self.w.bits = (self.w.bits & !0x07) | (value as u8 & 0x07);
+ self.w
+ }
+}
+impl R {
+ #[doc = "Bits 0:2 - Prescaler Configuration"]
+ #[inline(always)]
+ pub fn prescaler(&self) -> PRESCALER_R {
+ PRESCALER_R::new((self.bits & 0x07) as u8)
+ }
+}
+impl W {
+ #[doc = "Bits 0:2 - Prescaler Configuration"]
+ #[inline(always)]
+ pub fn prescaler(&mut self) -> PRESCALER_W {
+ PRESCALER_W { w: self }
+ }
+ #[doc = "Writes raw bits to the register."]
+ #[inline(always)]
+ pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
+ self.0.bits(bits);
+ self
+ }
+}
+#[doc = "Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"]
+pub struct CTRLB_SPEC;
+impl crate::RegisterSpec for CTRLB_SPEC {
+ type Ux = u8;
+}
+#[doc = "`read()` method returns [ctrlb::R](R) reader structure"]
+impl crate::Readable for CTRLB_SPEC {
+ type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"]
+impl crate::Writable for CTRLB_SPEC {
+ type Writer = W;
+}
+#[doc = "`reset()` method sets CTRLB to value 0"]
+impl crate::Resettable for CTRLB_SPEC {
+ #[inline(always)]
+ fn reset_value() -> Self::Ux {
+ 0
+ }
+}