diff options
Diffstat (limited to 'src/adc0')
| -rw-r--r-- | src/adc0/avgctrl.rs | 304 | ||||
| -rw-r--r-- | src/adc0/calib.rs | 138 | ||||
| -rw-r--r-- | src/adc0/ctrla.rs | 296 | ||||
| -rw-r--r-- | src/adc0/ctrlb.rs | 229 | ||||
| -rw-r--r-- | src/adc0/ctrlc.rs | 616 | ||||
| -rw-r--r-- | src/adc0/dbgctrl.rs | 112 | ||||
| -rw-r--r-- | src/adc0/evctrl.rs | 342 | ||||
| -rw-r--r-- | src/adc0/gaincorr.rs | 102 | ||||
| -rw-r--r-- | src/adc0/inputctrl.rs | 496 | ||||
| -rw-r--r-- | src/adc0/intenclr.rs | 204 | ||||
| -rw-r--r-- | src/adc0/intenset.rs | 204 | ||||
| -rw-r--r-- | src/adc0/intflag.rs | 204 | ||||
| -rw-r--r-- | src/adc0/offsetcorr.rs | 102 | ||||
| -rw-r--r-- | src/adc0/refctrl.rs | 249 | ||||
| -rw-r--r-- | src/adc0/result.rs | 52 | ||||
| -rw-r--r-- | src/adc0/sampctrl.rs | 148 | ||||
| -rw-r--r-- | src/adc0/seqctrl.rs | 102 | ||||
| -rw-r--r-- | src/adc0/seqstatus.rs | 71 | ||||
| -rw-r--r-- | src/adc0/swtrig.rs | 158 | ||||
| -rw-r--r-- | src/adc0/syncbusy.rs | 242 | ||||
| -rw-r--r-- | src/adc0/winlt.rs | 102 | ||||
| -rw-r--r-- | src/adc0/winut.rs | 102 |
22 files changed, 4575 insertions, 0 deletions
diff --git a/src/adc0/avgctrl.rs b/src/adc0/avgctrl.rs new file mode 100644 index 0000000..e79c1a3 --- /dev/null +++ b/src/adc0/avgctrl.rs @@ -0,0 +1,304 @@ +#[doc = "Register `AVGCTRL` reader"] +pub struct R(crate::R<AVGCTRL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<AVGCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<AVGCTRL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<AVGCTRL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `AVGCTRL` writer"] +pub struct W(crate::W<AVGCTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<AVGCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<AVGCTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<AVGCTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Number of Samples to be Collected\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum SAMPLENUM_A { + #[doc = "0: 1 sample"] + _1 = 0, + #[doc = "1: 2 samples"] + _2 = 1, + #[doc = "2: 4 samples"] + _4 = 2, + #[doc = "3: 8 samples"] + _8 = 3, + #[doc = "4: 16 samples"] + _16 = 4, + #[doc = "5: 32 samples"] + _32 = 5, + #[doc = "6: 64 samples"] + _64 = 6, + #[doc = "7: 128 samples"] + _128 = 7, + #[doc = "8: 256 samples"] + _256 = 8, + #[doc = "9: 512 samples"] + _512 = 9, + #[doc = "10: 1024 samples"] + _1024 = 10, +} +impl From<SAMPLENUM_A> for u8 { + #[inline(always)] + fn from(variant: SAMPLENUM_A) -> Self { + variant as _ + } +} +#[doc = "Field `SAMPLENUM` reader - Number of Samples to be Collected"] +pub struct SAMPLENUM_R(crate::FieldReader<u8, SAMPLENUM_A>); +impl SAMPLENUM_R { + pub(crate) fn new(bits: u8) -> Self { + SAMPLENUM_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<SAMPLENUM_A> { + match self.bits { + 0 => Some(SAMPLENUM_A::_1), + 1 => Some(SAMPLENUM_A::_2), + 2 => Some(SAMPLENUM_A::_4), + 3 => Some(SAMPLENUM_A::_8), + 4 => Some(SAMPLENUM_A::_16), + 5 => Some(SAMPLENUM_A::_32), + 6 => Some(SAMPLENUM_A::_64), + 7 => Some(SAMPLENUM_A::_128), + 8 => Some(SAMPLENUM_A::_256), + 9 => Some(SAMPLENUM_A::_512), + 10 => Some(SAMPLENUM_A::_1024), + _ => None, + } + } + #[doc = "Checks if the value of the field is `_1`"] + #[inline(always)] + pub fn is_1(&self) -> bool { + **self == SAMPLENUM_A::_1 + } + #[doc = "Checks if the value of the field is `_2`"] + #[inline(always)] + pub fn is_2(&self) -> bool { + **self == SAMPLENUM_A::_2 + } + #[doc = "Checks if the value of the field is `_4`"] + #[inline(always)] + pub fn is_4(&self) -> bool { + **self == SAMPLENUM_A::_4 + } + #[doc = "Checks if the value of the field is `_8`"] + #[inline(always)] + pub fn is_8(&self) -> bool { + **self == SAMPLENUM_A::_8 + } + #[doc = "Checks if the value of the field is `_16`"] + #[inline(always)] + pub fn is_16(&self) -> bool { + **self == SAMPLENUM_A::_16 + } + #[doc = "Checks if the value of the field is `_32`"] + #[inline(always)] + pub fn is_32(&self) -> bool { + **self == SAMPLENUM_A::_32 + } + #[doc = "Checks if the value of the field is `_64`"] + #[inline(always)] + pub fn is_64(&self) -> bool { + **self == SAMPLENUM_A::_64 + } + #[doc = "Checks if the value of the field is `_128`"] + #[inline(always)] + pub fn is_128(&self) -> bool { + **self == SAMPLENUM_A::_128 + } + #[doc = "Checks if the value of the field is `_256`"] + #[inline(always)] + pub fn is_256(&self) -> bool { + **self == SAMPLENUM_A::_256 + } + #[doc = "Checks if the value of the field is `_512`"] + #[inline(always)] + pub fn is_512(&self) -> bool { + **self == SAMPLENUM_A::_512 + } + #[doc = "Checks if the value of the field is `_1024`"] + #[inline(always)] + pub fn is_1024(&self) -> bool { + **self == SAMPLENUM_A::_1024 + } +} +impl core::ops::Deref for SAMPLENUM_R { + type Target = crate::FieldReader<u8, SAMPLENUM_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SAMPLENUM` writer - Number of Samples to be Collected"] +pub struct SAMPLENUM_W<'a> { + w: &'a mut W, +} +impl<'a> SAMPLENUM_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: SAMPLENUM_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "1 sample"] + #[inline(always)] + pub fn _1(self) -> &'a mut W { + self.variant(SAMPLENUM_A::_1) + } + #[doc = "2 samples"] + #[inline(always)] + pub fn _2(self) -> &'a mut W { + self.variant(SAMPLENUM_A::_2) + } + #[doc = "4 samples"] + #[inline(always)] + pub fn _4(self) -> &'a mut W { + self.variant(SAMPLENUM_A::_4) + } + #[doc = "8 samples"] + #[inline(always)] + pub fn _8(self) -> &'a mut W { + self.variant(SAMPLENUM_A::_8) + } + #[doc = "16 samples"] + #[inline(always)] + pub fn _16(self) -> &'a mut W { + self.variant(SAMPLENUM_A::_16) + } + #[doc = "32 samples"] + #[inline(always)] + pub fn _32(self) -> &'a mut W { + self.variant(SAMPLENUM_A::_32) + } + #[doc = "64 samples"] + #[inline(always)] + pub fn _64(self) -> &'a mut W { + self.variant(SAMPLENUM_A::_64) + } + #[doc = "128 samples"] + #[inline(always)] + pub fn _128(self) -> &'a mut W { + self.variant(SAMPLENUM_A::_128) + } + #[doc = "256 samples"] + #[inline(always)] + pub fn _256(self) -> &'a mut W { + self.variant(SAMPLENUM_A::_256) + } + #[doc = "512 samples"] + #[inline(always)] + pub fn _512(self) -> &'a mut W { + self.variant(SAMPLENUM_A::_512) + } + #[doc = "1024 samples"] + #[inline(always)] + pub fn _1024(self) -> &'a mut W { + self.variant(SAMPLENUM_A::_1024) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x0f) | (value as u8 & 0x0f); + self.w + } +} +#[doc = "Field `ADJRES` reader - Adjusting Result / Division Coefficient"] +pub struct ADJRES_R(crate::FieldReader<u8, u8>); +impl ADJRES_R { + pub(crate) fn new(bits: u8) -> Self { + ADJRES_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ADJRES_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ADJRES` writer - Adjusting Result / Division Coefficient"] +pub struct ADJRES_W<'a> { + w: &'a mut W, +} +impl<'a> ADJRES_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u8 & 0x07) << 4); + self.w + } +} +impl R { + #[doc = "Bits 0:3 - Number of Samples to be Collected"] + #[inline(always)] + pub fn samplenum(&self) -> SAMPLENUM_R { + SAMPLENUM_R::new((self.bits & 0x0f) as u8) + } + #[doc = "Bits 4:6 - Adjusting Result / Division Coefficient"] + #[inline(always)] + pub fn adjres(&self) -> ADJRES_R { + ADJRES_R::new(((self.bits >> 4) & 0x07) as u8) + } +} +impl W { + #[doc = "Bits 0:3 - Number of Samples to be Collected"] + #[inline(always)] + pub fn samplenum(&mut self) -> SAMPLENUM_W { + SAMPLENUM_W { w: self } + } + #[doc = "Bits 4:6 - Adjusting Result / Division Coefficient"] + #[inline(always)] + pub fn adjres(&mut self) -> ADJRES_W { + ADJRES_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Average Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [avgctrl](index.html) module"] +pub struct AVGCTRL_SPEC; +impl crate::RegisterSpec for AVGCTRL_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [avgctrl::R](R) reader structure"] +impl crate::Readable for AVGCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [avgctrl::W](W) writer structure"] +impl crate::Writable for AVGCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets AVGCTRL to value 0"] +impl crate::Resettable for AVGCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/calib.rs b/src/adc0/calib.rs new file mode 100644 index 0000000..fa227ed --- /dev/null +++ b/src/adc0/calib.rs @@ -0,0 +1,138 @@ +#[doc = "Register `CALIB` reader"] +pub struct R(crate::R<CALIB_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CALIB_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CALIB_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CALIB_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `CALIB` writer"] +pub struct W(crate::W<CALIB_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<CALIB_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<CALIB_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<CALIB_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `BIASCOMP` reader - Bias Comparator Scaling"] +pub struct BIASCOMP_R(crate::FieldReader<u8, u8>); +impl BIASCOMP_R { + pub(crate) fn new(bits: u8) -> Self { + BIASCOMP_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for BIASCOMP_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `BIASCOMP` writer - Bias Comparator Scaling"] +pub struct BIASCOMP_W<'a> { + w: &'a mut W, +} +impl<'a> BIASCOMP_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x07) | (value as u16 & 0x07); + self.w + } +} +#[doc = "Field `BIASREFBUF` reader - Bias Reference Buffer Scaling"] +pub struct BIASREFBUF_R(crate::FieldReader<u8, u8>); +impl BIASREFBUF_R { + pub(crate) fn new(bits: u8) -> Self { + BIASREFBUF_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for BIASREFBUF_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `BIASREFBUF` writer - Bias Reference Buffer Scaling"] +pub struct BIASREFBUF_W<'a> { + w: &'a mut W, +} +impl<'a> BIASREFBUF_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 8)) | ((value as u16 & 0x07) << 8); + self.w + } +} +impl R { + #[doc = "Bits 0:2 - Bias Comparator Scaling"] + #[inline(always)] + pub fn biascomp(&self) -> BIASCOMP_R { + BIASCOMP_R::new((self.bits & 0x07) as u8) + } + #[doc = "Bits 8:10 - Bias Reference Buffer Scaling"] + #[inline(always)] + pub fn biasrefbuf(&self) -> BIASREFBUF_R { + BIASREFBUF_R::new(((self.bits >> 8) & 0x07) as u8) + } +} +impl W { + #[doc = "Bits 0:2 - Bias Comparator Scaling"] + #[inline(always)] + pub fn biascomp(&mut self) -> BIASCOMP_W { + BIASCOMP_W { w: self } + } + #[doc = "Bits 8:10 - Bias Reference Buffer Scaling"] + #[inline(always)] + pub fn biasrefbuf(&mut self) -> BIASREFBUF_W { + BIASREFBUF_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Calibration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [calib](index.html) module"] +pub struct CALIB_SPEC; +impl crate::RegisterSpec for CALIB_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [calib::R](R) reader structure"] +impl crate::Readable for CALIB_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [calib::W](W) writer structure"] +impl crate::Writable for CALIB_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CALIB to value 0"] +impl crate::Resettable for CALIB_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/ctrla.rs b/src/adc0/ctrla.rs new file mode 100644 index 0000000..142c5d0 --- /dev/null +++ b/src/adc0/ctrla.rs @@ -0,0 +1,296 @@ +#[doc = "Register `CTRLA` reader"] +pub struct R(crate::R<CTRLA_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CTRLA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CTRLA_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CTRLA_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `CTRLA` writer"] +pub struct W(crate::W<CTRLA_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<CTRLA_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<CTRLA_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<CTRLA_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `SWRST` reader - Software Reset"] +pub struct SWRST_R(crate::FieldReader<bool, bool>); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SWRST` writer - Software Reset"] +pub struct SWRST_W<'a> { + w: &'a mut W, +} +impl<'a> SWRST_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +#[doc = "Field `ENABLE` reader - Enable"] +pub struct ENABLE_R(crate::FieldReader<bool, bool>); +impl ENABLE_R { + pub(crate) fn new(bits: bool) -> Self { + ENABLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENABLE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENABLE` writer - Enable"] +pub struct ENABLE_W<'a> { + w: &'a mut W, +} +impl<'a> ENABLE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1); + self.w + } +} +#[doc = "Field `SLAVEEN` reader - Slave Enable"] +pub struct SLAVEEN_R(crate::FieldReader<bool, bool>); +impl SLAVEEN_R { + pub(crate) fn new(bits: bool) -> Self { + SLAVEEN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SLAVEEN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SLAVEEN` writer - Slave Enable"] +pub struct SLAVEEN_W<'a> { + w: &'a mut W, +} +impl<'a> SLAVEEN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u8 & 0x01) << 5); + self.w + } +} +#[doc = "Field `RUNSTDBY` reader - Run During Standby"] +pub struct RUNSTDBY_R(crate::FieldReader<bool, bool>); +impl RUNSTDBY_R { + pub(crate) fn new(bits: bool) -> Self { + RUNSTDBY_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RUNSTDBY_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RUNSTDBY` writer - Run During Standby"] +pub struct RUNSTDBY_W<'a> { + w: &'a mut W, +} +impl<'a> RUNSTDBY_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u8 & 0x01) << 6); + self.w + } +} +#[doc = "Field `ONDEMAND` reader - On Demand Control"] +pub struct ONDEMAND_R(crate::FieldReader<bool, bool>); +impl ONDEMAND_R { + pub(crate) fn new(bits: bool) -> Self { + ONDEMAND_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ONDEMAND_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ONDEMAND` writer - On Demand Control"] +pub struct ONDEMAND_W<'a> { + w: &'a mut W, +} +impl<'a> ONDEMAND_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7); + self.w + } +} +impl R { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Enable"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 5 - Slave Enable"] + #[inline(always)] + pub fn slaveen(&self) -> SLAVEEN_R { + SLAVEEN_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Run During Standby"] + #[inline(always)] + pub fn runstdby(&self) -> RUNSTDBY_R { + RUNSTDBY_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - On Demand Control"] + #[inline(always)] + pub fn ondemand(&self) -> ONDEMAND_R { + ONDEMAND_R::new(((self.bits >> 7) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Software Reset"] + #[inline(always)] + pub fn swrst(&mut self) -> SWRST_W { + SWRST_W { w: self } + } + #[doc = "Bit 1 - Enable"] + #[inline(always)] + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W { w: self } + } + #[doc = "Bit 5 - Slave Enable"] + #[inline(always)] + pub fn slaveen(&mut self) -> SLAVEEN_W { + SLAVEEN_W { w: self } + } + #[doc = "Bit 6 - Run During Standby"] + #[inline(always)] + pub fn runstdby(&mut self) -> RUNSTDBY_W { + RUNSTDBY_W { w: self } + } + #[doc = "Bit 7 - On Demand Control"] + #[inline(always)] + pub fn ondemand(&mut self) -> ONDEMAND_W { + ONDEMAND_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"] +pub struct CTRLA_SPEC; +impl crate::RegisterSpec for CTRLA_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [ctrla::R](R) reader structure"] +impl crate::Readable for CTRLA_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"] +impl crate::Writable for CTRLA_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CTRLA to value 0"] +impl crate::Resettable for CTRLA_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/ctrlb.rs b/src/adc0/ctrlb.rs new file mode 100644 index 0000000..1fbc306 --- /dev/null +++ b/src/adc0/ctrlb.rs @@ -0,0 +1,229 @@ +#[doc = "Register `CTRLB` reader"] +pub struct R(crate::R<CTRLB_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CTRLB_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CTRLB_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CTRLB_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `CTRLB` writer"] +pub struct W(crate::W<CTRLB_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<CTRLB_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<CTRLB_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<CTRLB_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Prescaler Configuration\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum PRESCALER_A { + #[doc = "0: Peripheral clock divided by 2"] + DIV2 = 0, + #[doc = "1: Peripheral clock divided by 4"] + DIV4 = 1, + #[doc = "2: Peripheral clock divided by 8"] + DIV8 = 2, + #[doc = "3: Peripheral clock divided by 16"] + DIV16 = 3, + #[doc = "4: Peripheral clock divided by 32"] + DIV32 = 4, + #[doc = "5: Peripheral clock divided by 64"] + DIV64 = 5, + #[doc = "6: Peripheral clock divided by 128"] + DIV128 = 6, + #[doc = "7: Peripheral clock divided by 256"] + DIV256 = 7, +} +impl From<PRESCALER_A> for u8 { + #[inline(always)] + fn from(variant: PRESCALER_A) -> Self { + variant as _ + } +} +#[doc = "Field `PRESCALER` reader - Prescaler Configuration"] +pub struct PRESCALER_R(crate::FieldReader<u8, PRESCALER_A>); +impl PRESCALER_R { + pub(crate) fn new(bits: u8) -> Self { + PRESCALER_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> PRESCALER_A { + match self.bits { + 0 => PRESCALER_A::DIV2, + 1 => PRESCALER_A::DIV4, + 2 => PRESCALER_A::DIV8, + 3 => PRESCALER_A::DIV16, + 4 => PRESCALER_A::DIV32, + 5 => PRESCALER_A::DIV64, + 6 => PRESCALER_A::DIV128, + 7 => PRESCALER_A::DIV256, + _ => unreachable!(), + } + } + #[doc = "Checks if the value of the field is `DIV2`"] + #[inline(always)] + pub fn is_div2(&self) -> bool { + **self == PRESCALER_A::DIV2 + } + #[doc = "Checks if the value of the field is `DIV4`"] + #[inline(always)] + pub fn is_div4(&self) -> bool { + **self == PRESCALER_A::DIV4 + } + #[doc = "Checks if the value of the field is `DIV8`"] + #[inline(always)] + pub fn is_div8(&self) -> bool { + **self == PRESCALER_A::DIV8 + } + #[doc = "Checks if the value of the field is `DIV16`"] + #[inline(always)] + pub fn is_div16(&self) -> bool { + **self == PRESCALER_A::DIV16 + } + #[doc = "Checks if the value of the field is `DIV32`"] + #[inline(always)] + pub fn is_div32(&self) -> bool { + **self == PRESCALER_A::DIV32 + } + #[doc = "Checks if the value of the field is `DIV64`"] + #[inline(always)] + pub fn is_div64(&self) -> bool { + **self == PRESCALER_A::DIV64 + } + #[doc = "Checks if the value of the field is `DIV128`"] + #[inline(always)] + pub fn is_div128(&self) -> bool { + **self == PRESCALER_A::DIV128 + } + #[doc = "Checks if the value of the field is `DIV256`"] + #[inline(always)] + pub fn is_div256(&self) -> bool { + **self == PRESCALER_A::DIV256 + } +} +impl core::ops::Deref for PRESCALER_R { + type Target = crate::FieldReader<u8, PRESCALER_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `PRESCALER` writer - Prescaler Configuration"] +pub struct PRESCALER_W<'a> { + w: &'a mut W, +} +impl<'a> PRESCALER_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: PRESCALER_A) -> &'a mut W { + self.bits(variant.into()) + } + #[doc = "Peripheral clock divided by 2"] + #[inline(always)] + pub fn div2(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV2) + } + #[doc = "Peripheral clock divided by 4"] + #[inline(always)] + pub fn div4(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV4) + } + #[doc = "Peripheral clock divided by 8"] + #[inline(always)] + pub fn div8(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV8) + } + #[doc = "Peripheral clock divided by 16"] + #[inline(always)] + pub fn div16(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV16) + } + #[doc = "Peripheral clock divided by 32"] + #[inline(always)] + pub fn div32(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV32) + } + #[doc = "Peripheral clock divided by 64"] + #[inline(always)] + pub fn div64(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV64) + } + #[doc = "Peripheral clock divided by 128"] + #[inline(always)] + pub fn div128(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV128) + } + #[doc = "Peripheral clock divided by 256"] + #[inline(always)] + pub fn div256(self) -> &'a mut W { + self.variant(PRESCALER_A::DIV256) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x07) | (value as u8 & 0x07); + self.w + } +} +impl R { + #[doc = "Bits 0:2 - Prescaler Configuration"] + #[inline(always)] + pub fn prescaler(&self) -> PRESCALER_R { + PRESCALER_R::new((self.bits & 0x07) as u8) + } +} +impl W { + #[doc = "Bits 0:2 - Prescaler Configuration"] + #[inline(always)] + pub fn prescaler(&mut self) -> PRESCALER_W { + PRESCALER_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"] +pub struct CTRLB_SPEC; +impl crate::RegisterSpec for CTRLB_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [ctrlb::R](R) reader structure"] +impl crate::Readable for CTRLB_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"] +impl crate::Writable for CTRLB_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CTRLB to value 0"] +impl crate::Resettable for CTRLB_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/ctrlc.rs b/src/adc0/ctrlc.rs new file mode 100644 index 0000000..a053076 --- /dev/null +++ b/src/adc0/ctrlc.rs @@ -0,0 +1,616 @@ +#[doc = "Register `CTRLC` reader"] +pub struct R(crate::R<CTRLC_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<CTRLC_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<CTRLC_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<CTRLC_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `CTRLC` writer"] +pub struct W(crate::W<CTRLC_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<CTRLC_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<CTRLC_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<CTRLC_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `DIFFMODE` reader - Differential Mode"] +pub struct DIFFMODE_R(crate::FieldReader<bool, bool>); +impl DIFFMODE_R { + pub(crate) fn new(bits: bool) -> Self { + DIFFMODE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DIFFMODE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DIFFMODE` writer - Differential Mode"] +pub struct DIFFMODE_W<'a> { + w: &'a mut W, +} +impl<'a> DIFFMODE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); + self.w + } +} +#[doc = "Field `LEFTADJ` reader - Left-Adjusted Result"] +pub struct LEFTADJ_R(crate::FieldReader<bool, bool>); +impl LEFTADJ_R { + pub(crate) fn new(bits: bool) -> Self { + LEFTADJ_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for LEFTADJ_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `LEFTADJ` writer - Left-Adjusted Result"] +pub struct LEFTADJ_W<'a> { + w: &'a mut W, +} +impl<'a> LEFTADJ_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); + self.w + } +} +#[doc = "Field `FREERUN` reader - Free Running Mode"] +pub struct FREERUN_R(crate::FieldReader<bool, bool>); +impl FREERUN_R { + pub(crate) fn new(bits: bool) -> Self { + FREERUN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FREERUN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FREERUN` writer - Free Running Mode"] +pub struct FREERUN_W<'a> { + w: &'a mut W, +} +impl<'a> FREERUN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2); + self.w + } +} +#[doc = "Field `CORREN` reader - Digital Correction Logic Enable"] +pub struct CORREN_R(crate::FieldReader<bool, bool>); +impl CORREN_R { + pub(crate) fn new(bits: bool) -> Self { + CORREN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CORREN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CORREN` writer - Digital Correction Logic Enable"] +pub struct CORREN_W<'a> { + w: &'a mut W, +} +impl<'a> CORREN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3); + self.w + } +} +#[doc = "Conversion Result Resolution\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum RESSEL_A { + #[doc = "0: 12-bit"] + _12BIT = 0, + #[doc = "1: 16-bit averaging mode"] + _16BIT = 1, + #[doc = "2: 10-bit"] + _10BIT = 2, + #[doc = "3: 8-bit"] + _8BIT = 3, +} +impl From<RESSEL_A> for u8 { + #[inline(always)] + fn from(variant: RESSEL_A) -> Self { + variant as _ + } +} +#[doc = "Field `RESSEL` reader - Conversion Result Resolution"] +pub struct RESSEL_R(crate::FieldReader<u8, RESSEL_A>); +impl RESSEL_R { + pub(crate) fn new(bits: u8) -> Self { + RESSEL_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> RESSEL_A { + match self.bits { + 0 => RESSEL_A::_12BIT, + 1 => RESSEL_A::_16BIT, + 2 => RESSEL_A::_10BIT, + 3 => RESSEL_A::_8BIT, + _ => unreachable!(), + } + } + #[doc = "Checks if the value of the field is `_12BIT`"] + #[inline(always)] + pub fn is_12bit(&self) -> bool { + **self == RESSEL_A::_12BIT + } + #[doc = "Checks if the value of the field is `_16BIT`"] + #[inline(always)] + pub fn is_16bit(&self) -> bool { + **self == RESSEL_A::_16BIT + } + #[doc = "Checks if the value of the field is `_10BIT`"] + #[inline(always)] + pub fn is_10bit(&self) -> bool { + **self == RESSEL_A::_10BIT + } + #[doc = "Checks if the value of the field is `_8BIT`"] + #[inline(always)] + pub fn is_8bit(&self) -> bool { + **self == RESSEL_A::_8BIT + } +} +impl core::ops::Deref for RESSEL_R { + type Target = crate::FieldReader<u8, RESSEL_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RESSEL` writer - Conversion Result Resolution"] +pub struct RESSEL_W<'a> { + w: &'a mut W, +} +impl<'a> RESSEL_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: RESSEL_A) -> &'a mut W { + self.bits(variant.into()) + } + #[doc = "12-bit"] + #[inline(always)] + pub fn _12bit(self) -> &'a mut W { + self.variant(RESSEL_A::_12BIT) + } + #[doc = "16-bit averaging mode"] + #[inline(always)] + pub fn _16bit(self) -> &'a mut W { + self.variant(RESSEL_A::_16BIT) + } + #[doc = "10-bit"] + #[inline(always)] + pub fn _10bit(self) -> &'a mut W { + self.variant(RESSEL_A::_10BIT) + } + #[doc = "8-bit"] + #[inline(always)] + pub fn _8bit(self) -> &'a mut W { + self.variant(RESSEL_A::_8BIT) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u16 & 0x03) << 4); + self.w + } +} +#[doc = "Field `R2R` reader - Rail-to-Rail mode enable"] +pub struct R2R_R(crate::FieldReader<bool, bool>); +impl R2R_R { + pub(crate) fn new(bits: bool) -> Self { + R2R_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for R2R_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `R2R` writer - Rail-to-Rail mode enable"] +pub struct R2R_W<'a> { + w: &'a mut W, +} +impl<'a> R2R_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); + self.w + } +} +#[doc = "Window Monitor Mode\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum WINMODE_A { + #[doc = "0: No window mode (default)"] + DISABLE = 0, + #[doc = "1: RESULT > WINLT"] + MODE1 = 1, + #[doc = "2: RESULT < WINUT"] + MODE2 = 2, + #[doc = "3: WINLT < RESULT < WINUT"] + MODE3 = 3, + #[doc = "4: !(WINLT < RESULT < WINUT)"] + MODE4 = 4, +} +impl From<WINMODE_A> for u8 { + #[inline(always)] + fn from(variant: WINMODE_A) -> Self { + variant as _ + } +} +#[doc = "Field `WINMODE` reader - Window Monitor Mode"] +pub struct WINMODE_R(crate::FieldReader<u8, WINMODE_A>); +impl WINMODE_R { + pub(crate) fn new(bits: u8) -> Self { + WINMODE_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<WINMODE_A> { + match self.bits { + 0 => Some(WINMODE_A::DISABLE), + 1 => Some(WINMODE_A::MODE1), + 2 => Some(WINMODE_A::MODE2), + 3 => Some(WINMODE_A::MODE3), + 4 => Some(WINMODE_A::MODE4), + _ => None, + } + } + #[doc = "Checks if the value of the field is `DISABLE`"] + #[inline(always)] + pub fn is_disable(&self) -> bool { + **self == WINMODE_A::DISABLE + } + #[doc = "Checks if the value of the field is `MODE1`"] + #[inline(always)] + pub fn is_mode1(&self) -> bool { + **self == WINMODE_A::MODE1 + } + #[doc = "Checks if the value of the field is `MODE2`"] + #[inline(always)] + pub fn is_mode2(&self) -> bool { + **self == WINMODE_A::MODE2 + } + #[doc = "Checks if the value of the field is `MODE3`"] + #[inline(always)] + pub fn is_mode3(&self) -> bool { + **self == WINMODE_A::MODE3 + } + #[doc = "Checks if the value of the field is `MODE4`"] + #[inline(always)] + pub fn is_mode4(&self) -> bool { + **self == WINMODE_A::MODE4 + } +} +impl core::ops::Deref for WINMODE_R { + type Target = crate::FieldReader<u8, WINMODE_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `WINMODE` writer - Window Monitor Mode"] +pub struct WINMODE_W<'a> { + w: &'a mut W, +} +impl<'a> WINMODE_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: WINMODE_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "No window mode (default)"] + #[inline(always)] + pub fn disable(self) -> &'a mut W { + self.variant(WINMODE_A::DISABLE) + } + #[doc = "RESULT > WINLT"] + #[inline(always)] + pub fn mode1(self) -> &'a mut W { + self.variant(WINMODE_A::MODE1) + } + #[doc = "RESULT < WINUT"] + #[inline(always)] + pub fn mode2(self) -> &'a mut W { + self.variant(WINMODE_A::MODE2) + } + #[doc = "WINLT < RESULT < WINUT"] + #[inline(always)] + pub fn mode3(self) -> &'a mut W { + self.variant(WINMODE_A::MODE3) + } + #[doc = "!(WINLT < RESULT < WINUT)"] + #[inline(always)] + pub fn mode4(self) -> &'a mut W { + self.variant(WINMODE_A::MODE4) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 8)) | ((value as u16 & 0x07) << 8); + self.w + } +} +#[doc = "Dual Mode Trigger Selection\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum DUALSEL_A { + #[doc = "0: Start event or software trigger will start a conversion on both ADCs"] + BOTH = 0, + #[doc = "1: START event or software trigger will alternatingly start a conversion on ADC0 and ADC1"] + INTERLEAVE = 1, +} +impl From<DUALSEL_A> for u8 { + #[inline(always)] + fn from(variant: DUALSEL_A) -> Self { + variant as _ + } +} +#[doc = "Field `DUALSEL` reader - Dual Mode Trigger Selection"] +pub struct DUALSEL_R(crate::FieldReader<u8, DUALSEL_A>); +impl DUALSEL_R { + pub(crate) fn new(bits: u8) -> Self { + DUALSEL_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<DUALSEL_A> { + match self.bits { + 0 => Some(DUALSEL_A::BOTH), + 1 => Some(DUALSEL_A::INTERLEAVE), + _ => None, + } + } + #[doc = "Checks if the value of the field is `BOTH`"] + #[inline(always)] + pub fn is_both(&self) -> bool { + **self == DUALSEL_A::BOTH + } + #[doc = "Checks if the value of the field is `INTERLEAVE`"] + #[inline(always)] + pub fn is_interleave(&self) -> bool { + **self == DUALSEL_A::INTERLEAVE + } +} +impl core::ops::Deref for DUALSEL_R { + type Target = crate::FieldReader<u8, DUALSEL_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DUALSEL` writer - Dual Mode Trigger Selection"] +pub struct DUALSEL_W<'a> { + w: &'a mut W, +} +impl<'a> DUALSEL_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: DUALSEL_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "Start event or software trigger will start a conversion on both ADCs"] + #[inline(always)] + pub fn both(self) -> &'a mut W { + self.variant(DUALSEL_A::BOTH) + } + #[doc = "START event or software trigger will alternatingly start a conversion on ADC0 and ADC1"] + #[inline(always)] + pub fn interleave(self) -> &'a mut W { + self.variant(DUALSEL_A::INTERLEAVE) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u16 & 0x03) << 12); + self.w + } +} +impl R { + #[doc = "Bit 0 - Differential Mode"] + #[inline(always)] + pub fn diffmode(&self) -> DIFFMODE_R { + DIFFMODE_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Left-Adjusted Result"] + #[inline(always)] + pub fn leftadj(&self) -> LEFTADJ_R { + LEFTADJ_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Free Running Mode"] + #[inline(always)] + pub fn freerun(&self) -> FREERUN_R { + FREERUN_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Digital Correction Logic Enable"] + #[inline(always)] + pub fn corren(&self) -> CORREN_R { + CORREN_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bits 4:5 - Conversion Result Resolution"] + #[inline(always)] + pub fn ressel(&self) -> RESSEL_R { + RESSEL_R::new(((self.bits >> 4) & 0x03) as u8) + } + #[doc = "Bit 7 - Rail-to-Rail mode enable"] + #[inline(always)] + pub fn r2r(&self) -> R2R_R { + R2R_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bits 8:10 - Window Monitor Mode"] + #[inline(always)] + pub fn winmode(&self) -> WINMODE_R { + WINMODE_R::new(((self.bits >> 8) & 0x07) as u8) + } + #[doc = "Bits 12:13 - Dual Mode Trigger Selection"] + #[inline(always)] + pub fn dualsel(&self) -> DUALSEL_R { + DUALSEL_R::new(((self.bits >> 12) & 0x03) as u8) + } +} +impl W { + #[doc = "Bit 0 - Differential Mode"] + #[inline(always)] + pub fn diffmode(&mut self) -> DIFFMODE_W { + DIFFMODE_W { w: self } + } + #[doc = "Bit 1 - Left-Adjusted Result"] + #[inline(always)] + pub fn leftadj(&mut self) -> LEFTADJ_W { + LEFTADJ_W { w: self } + } + #[doc = "Bit 2 - Free Running Mode"] + #[inline(always)] + pub fn freerun(&mut self) -> FREERUN_W { + FREERUN_W { w: self } + } + #[doc = "Bit 3 - Digital Correction Logic Enable"] + #[inline(always)] + pub fn corren(&mut self) -> CORREN_W { + CORREN_W { w: self } + } + #[doc = "Bits 4:5 - Conversion Result Resolution"] + #[inline(always)] + pub fn ressel(&mut self) -> RESSEL_W { + RESSEL_W { w: self } + } + #[doc = "Bit 7 - Rail-to-Rail mode enable"] + #[inline(always)] + pub fn r2r(&mut self) -> R2R_W { + R2R_W { w: self } + } + #[doc = "Bits 8:10 - Window Monitor Mode"] + #[inline(always)] + pub fn winmode(&mut self) -> WINMODE_W { + WINMODE_W { w: self } + } + #[doc = "Bits 12:13 - Dual Mode Trigger Selection"] + #[inline(always)] + pub fn dualsel(&mut self) -> DUALSEL_W { + DUALSEL_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Control C\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlc](index.html) module"] +pub struct CTRLC_SPEC; +impl crate::RegisterSpec for CTRLC_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [ctrlc::R](R) reader structure"] +impl crate::Readable for CTRLC_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [ctrlc::W](W) writer structure"] +impl crate::Writable for CTRLC_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets CTRLC to value 0"] +impl crate::Resettable for CTRLC_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/dbgctrl.rs b/src/adc0/dbgctrl.rs new file mode 100644 index 0000000..8befebc --- /dev/null +++ b/src/adc0/dbgctrl.rs @@ -0,0 +1,112 @@ +#[doc = "Register `DBGCTRL` reader"] +pub struct R(crate::R<DBGCTRL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<DBGCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<DBGCTRL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<DBGCTRL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `DBGCTRL` writer"] +pub struct W(crate::W<DBGCTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<DBGCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<DBGCTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<DBGCTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `DBGRUN` reader - Debug Run"] +pub struct DBGRUN_R(crate::FieldReader<bool, bool>); +impl DBGRUN_R { + pub(crate) fn new(bits: bool) -> Self { + DBGRUN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for DBGRUN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `DBGRUN` writer - Debug Run"] +pub struct DBGRUN_W<'a> { + w: &'a mut W, +} +impl<'a> DBGRUN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +impl R { + #[doc = "Bit 0 - Debug Run"] + #[inline(always)] + pub fn dbgrun(&self) -> DBGRUN_R { + DBGRUN_R::new((self.bits & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Debug Run"] + #[inline(always)] + pub fn dbgrun(&mut self) -> DBGRUN_W { + DBGRUN_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Debug Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgctrl](index.html) module"] +pub struct DBGCTRL_SPEC; +impl crate::RegisterSpec for DBGCTRL_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [dbgctrl::R](R) reader structure"] +impl crate::Readable for DBGCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [dbgctrl::W](W) writer structure"] +impl crate::Writable for DBGCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets DBGCTRL to value 0"] +impl crate::Resettable for DBGCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/evctrl.rs b/src/adc0/evctrl.rs new file mode 100644 index 0000000..77c860d --- /dev/null +++ b/src/adc0/evctrl.rs @@ -0,0 +1,342 @@ +#[doc = "Register `EVCTRL` reader"] +pub struct R(crate::R<EVCTRL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<EVCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<EVCTRL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<EVCTRL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `EVCTRL` writer"] +pub struct W(crate::W<EVCTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<EVCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<EVCTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<EVCTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `FLUSHEI` reader - Flush Event Input Enable"] +pub struct FLUSHEI_R(crate::FieldReader<bool, bool>); +impl FLUSHEI_R { + pub(crate) fn new(bits: bool) -> Self { + FLUSHEI_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FLUSHEI_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FLUSHEI` writer - Flush Event Input Enable"] +pub struct FLUSHEI_W<'a> { + w: &'a mut W, +} +impl<'a> FLUSHEI_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +#[doc = "Field `STARTEI` reader - Start Conversion Event Input Enable"] +pub struct STARTEI_R(crate::FieldReader<bool, bool>); +impl STARTEI_R { + pub(crate) fn new(bits: bool) -> Self { + STARTEI_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for STARTEI_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `STARTEI` writer - Start Conversion Event Input Enable"] +pub struct STARTEI_W<'a> { + w: &'a mut W, +} +impl<'a> STARTEI_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1); + self.w + } +} +#[doc = "Field `FLUSHINV` reader - Flush Event Invert Enable"] +pub struct FLUSHINV_R(crate::FieldReader<bool, bool>); +impl FLUSHINV_R { + pub(crate) fn new(bits: bool) -> Self { + FLUSHINV_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FLUSHINV_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FLUSHINV` writer - Flush Event Invert Enable"] +pub struct FLUSHINV_W<'a> { + w: &'a mut W, +} +impl<'a> FLUSHINV_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2); + self.w + } +} +#[doc = "Field `STARTINV` reader - Start Event Invert Enable"] +pub struct STARTINV_R(crate::FieldReader<bool, bool>); +impl STARTINV_R { + pub(crate) fn new(bits: bool) -> Self { + STARTINV_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for STARTINV_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `STARTINV` writer - Start Event Invert Enable"] +pub struct STARTINV_W<'a> { + w: &'a mut W, +} +impl<'a> STARTINV_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3); + self.w + } +} +#[doc = "Field `RESRDYEO` reader - Result Ready Event Out"] +pub struct RESRDYEO_R(crate::FieldReader<bool, bool>); +impl RESRDYEO_R { + pub(crate) fn new(bits: bool) -> Self { + RESRDYEO_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RESRDYEO_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RESRDYEO` writer - Result Ready Event Out"] +pub struct RESRDYEO_W<'a> { + w: &'a mut W, +} +impl<'a> RESRDYEO_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4); + self.w + } +} +#[doc = "Field `WINMONEO` reader - Window Monitor Event Out"] +pub struct WINMONEO_R(crate::FieldReader<bool, bool>); +impl WINMONEO_R { + pub(crate) fn new(bits: bool) -> Self { + WINMONEO_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for WINMONEO_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `WINMONEO` writer - Window Monitor Event Out"] +pub struct WINMONEO_W<'a> { + w: &'a mut W, +} +impl<'a> WINMONEO_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u8 & 0x01) << 5); + self.w + } +} +impl R { + #[doc = "Bit 0 - Flush Event Input Enable"] + #[inline(always)] + pub fn flushei(&self) -> FLUSHEI_R { + FLUSHEI_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Start Conversion Event Input Enable"] + #[inline(always)] + pub fn startei(&self) -> STARTEI_R { + STARTEI_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Flush Event Invert Enable"] + #[inline(always)] + pub fn flushinv(&self) -> FLUSHINV_R { + FLUSHINV_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Start Event Invert Enable"] + #[inline(always)] + pub fn startinv(&self) -> STARTINV_R { + STARTINV_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Result Ready Event Out"] + #[inline(always)] + pub fn resrdyeo(&self) -> RESRDYEO_R { + RESRDYEO_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Window Monitor Event Out"] + #[inline(always)] + pub fn winmoneo(&self) -> WINMONEO_R { + WINMONEO_R::new(((self.bits >> 5) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Flush Event Input Enable"] + #[inline(always)] + pub fn flushei(&mut self) -> FLUSHEI_W { + FLUSHEI_W { w: self } + } + #[doc = "Bit 1 - Start Conversion Event Input Enable"] + #[inline(always)] + pub fn startei(&mut self) -> STARTEI_W { + STARTEI_W { w: self } + } + #[doc = "Bit 2 - Flush Event Invert Enable"] + #[inline(always)] + pub fn flushinv(&mut self) -> FLUSHINV_W { + FLUSHINV_W { w: self } + } + #[doc = "Bit 3 - Start Event Invert Enable"] + #[inline(always)] + pub fn startinv(&mut self) -> STARTINV_W { + STARTINV_W { w: self } + } + #[doc = "Bit 4 - Result Ready Event Out"] + #[inline(always)] + pub fn resrdyeo(&mut self) -> RESRDYEO_W { + RESRDYEO_W { w: self } + } + #[doc = "Bit 5 - Window Monitor Event Out"] + #[inline(always)] + pub fn winmoneo(&mut self) -> WINMONEO_W { + WINMONEO_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Event Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [evctrl](index.html) module"] +pub struct EVCTRL_SPEC; +impl crate::RegisterSpec for EVCTRL_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [evctrl::R](R) reader structure"] +impl crate::Readable for EVCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [evctrl::W](W) writer structure"] +impl crate::Writable for EVCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets EVCTRL to value 0"] +impl crate::Resettable for EVCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/gaincorr.rs b/src/adc0/gaincorr.rs new file mode 100644 index 0000000..dd2626e --- /dev/null +++ b/src/adc0/gaincorr.rs @@ -0,0 +1,102 @@ +#[doc = "Register `GAINCORR` reader"] +pub struct R(crate::R<GAINCORR_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<GAINCORR_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<GAINCORR_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<GAINCORR_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `GAINCORR` writer"] +pub struct W(crate::W<GAINCORR_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<GAINCORR_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<GAINCORR_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<GAINCORR_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `GAINCORR` reader - Gain Correction Value"] +pub struct GAINCORR_R(crate::FieldReader<u16, u16>); +impl GAINCORR_R { + pub(crate) fn new(bits: u16) -> Self { + GAINCORR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for GAINCORR_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `GAINCORR` writer - Gain Correction Value"] +pub struct GAINCORR_W<'a> { + w: &'a mut W, +} +impl<'a> GAINCORR_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0x0fff) | (value as u16 & 0x0fff); + self.w + } +} +impl R { + #[doc = "Bits 0:11 - Gain Correction Value"] + #[inline(always)] + pub fn gaincorr(&self) -> GAINCORR_R { + GAINCORR_R::new((self.bits & 0x0fff) as u16) + } +} +impl W { + #[doc = "Bits 0:11 - Gain Correction Value"] + #[inline(always)] + pub fn gaincorr(&mut self) -> GAINCORR_W { + GAINCORR_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Gain Correction\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gaincorr](index.html) module"] +pub struct GAINCORR_SPEC; +impl crate::RegisterSpec for GAINCORR_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [gaincorr::R](R) reader structure"] +impl crate::Readable for GAINCORR_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [gaincorr::W](W) writer structure"] +impl crate::Writable for GAINCORR_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets GAINCORR to value 0"] +impl crate::Resettable for GAINCORR_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/inputctrl.rs b/src/adc0/inputctrl.rs new file mode 100644 index 0000000..e3fc7b6 --- /dev/null +++ b/src/adc0/inputctrl.rs @@ -0,0 +1,496 @@ +#[doc = "Register `INPUTCTRL` reader"] +pub struct R(crate::R<INPUTCTRL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<INPUTCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<INPUTCTRL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<INPUTCTRL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `INPUTCTRL` writer"] +pub struct W(crate::W<INPUTCTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<INPUTCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<INPUTCTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<INPUTCTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Positive Mux Input Selection\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum MUXPOS_A { + #[doc = "0: ADC AIN0 Pin"] + AIN0 = 0, + #[doc = "1: ADC AIN1 Pin"] + AIN1 = 1, + #[doc = "2: ADC AIN2 Pin"] + AIN2 = 2, + #[doc = "3: ADC AIN3 Pin"] + AIN3 = 3, + #[doc = "4: ADC AIN4 Pin"] + AIN4 = 4, + #[doc = "5: ADC AIN5 Pin"] + AIN5 = 5, + #[doc = "6: ADC AIN6 Pin"] + AIN6 = 6, + #[doc = "7: ADC AIN7 Pin"] + AIN7 = 7, + #[doc = "8: ADC AIN8 Pin"] + AIN8 = 8, + #[doc = "9: ADC AIN9 Pin"] + AIN9 = 9, + #[doc = "10: ADC AIN10 Pin"] + AIN10 = 10, + #[doc = "11: ADC AIN11 Pin"] + AIN11 = 11, + #[doc = "24: Temperature Sensor"] + TEMP = 24, + #[doc = "25: Bandgap Voltage"] + BANDGAP = 25, + #[doc = "26: 1/4 Scaled Core Supply"] + SCALEDCOREVCC = 26, + #[doc = "27: 1/4 Scaled I/O Supply"] + SCALEDIOVCC = 27, + #[doc = "28: DAC Output"] + DAC = 28, +} +impl From<MUXPOS_A> for u8 { + #[inline(always)] + fn from(variant: MUXPOS_A) -> Self { + variant as _ + } +} +#[doc = "Field `MUXPOS` reader - Positive Mux Input Selection"] +pub struct MUXPOS_R(crate::FieldReader<u8, MUXPOS_A>); +impl MUXPOS_R { + pub(crate) fn new(bits: u8) -> Self { + MUXPOS_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<MUXPOS_A> { + match self.bits { + 0 => Some(MUXPOS_A::AIN0), + 1 => Some(MUXPOS_A::AIN1), + 2 => Some(MUXPOS_A::AIN2), + 3 => Some(MUXPOS_A::AIN3), + 4 => Some(MUXPOS_A::AIN4), + 5 => Some(MUXPOS_A::AIN5), + 6 => Some(MUXPOS_A::AIN6), + 7 => Some(MUXPOS_A::AIN7), + 8 => Some(MUXPOS_A::AIN8), + 9 => Some(MUXPOS_A::AIN9), + 10 => Some(MUXPOS_A::AIN10), + 11 => Some(MUXPOS_A::AIN11), + 24 => Some(MUXPOS_A::TEMP), + 25 => Some(MUXPOS_A::BANDGAP), + 26 => Some(MUXPOS_A::SCALEDCOREVCC), + 27 => Some(MUXPOS_A::SCALEDIOVCC), + 28 => Some(MUXPOS_A::DAC), + _ => None, + } + } + #[doc = "Checks if the value of the field is `AIN0`"] + #[inline(always)] + pub fn is_ain0(&self) -> bool { + **self == MUXPOS_A::AIN0 + } + #[doc = "Checks if the value of the field is `AIN1`"] + #[inline(always)] + pub fn is_ain1(&self) -> bool { + **self == MUXPOS_A::AIN1 + } + #[doc = "Checks if the value of the field is `AIN2`"] + #[inline(always)] + pub fn is_ain2(&self) -> bool { + **self == MUXPOS_A::AIN2 + } + #[doc = "Checks if the value of the field is `AIN3`"] + #[inline(always)] + pub fn is_ain3(&self) -> bool { + **self == MUXPOS_A::AIN3 + } + #[doc = "Checks if the value of the field is `AIN4`"] + #[inline(always)] + pub fn is_ain4(&self) -> bool { + **self == MUXPOS_A::AIN4 + } + #[doc = "Checks if the value of the field is `AIN5`"] + #[inline(always)] + pub fn is_ain5(&self) -> bool { + **self == MUXPOS_A::AIN5 + } + #[doc = "Checks if the value of the field is `AIN6`"] + #[inline(always)] + pub fn is_ain6(&self) -> bool { + **self == MUXPOS_A::AIN6 + } + #[doc = "Checks if the value of the field is `AIN7`"] + #[inline(always)] + pub fn is_ain7(&self) -> bool { + **self == MUXPOS_A::AIN7 + } + #[doc = "Checks if the value of the field is `AIN8`"] + #[inline(always)] + pub fn is_ain8(&self) -> bool { + **self == MUXPOS_A::AIN8 + } + #[doc = "Checks if the value of the field is `AIN9`"] + #[inline(always)] + pub fn is_ain9(&self) -> bool { + **self == MUXPOS_A::AIN9 + } + #[doc = "Checks if the value of the field is `AIN10`"] + #[inline(always)] + pub fn is_ain10(&self) -> bool { + **self == MUXPOS_A::AIN10 + } + #[doc = "Checks if the value of the field is `AIN11`"] + #[inline(always)] + pub fn is_ain11(&self) -> bool { + **self == MUXPOS_A::AIN11 + } + #[doc = "Checks if the value of the field is `TEMP`"] + #[inline(always)] + pub fn is_temp(&self) -> bool { + **self == MUXPOS_A::TEMP + } + #[doc = "Checks if the value of the field is `BANDGAP`"] + #[inline(always)] + pub fn is_bandgap(&self) -> bool { + **self == MUXPOS_A::BANDGAP + } + #[doc = "Checks if the value of the field is `SCALEDCOREVCC`"] + #[inline(always)] + pub fn is_scaledcorevcc(&self) -> bool { + **self == MUXPOS_A::SCALEDCOREVCC + } + #[doc = "Checks if the value of the field is `SCALEDIOVCC`"] + #[inline(always)] + pub fn is_scalediovcc(&self) -> bool { + **self == MUXPOS_A::SCALEDIOVCC + } + #[doc = "Checks if the value of the field is `DAC`"] + #[inline(always)] + pub fn is_dac(&self) -> bool { + **self == MUXPOS_A::DAC + } +} +impl core::ops::Deref for MUXPOS_R { + type Target = crate::FieldReader<u8, MUXPOS_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MUXPOS` writer - Positive Mux Input Selection"] +pub struct MUXPOS_W<'a> { + w: &'a mut W, +} +impl<'a> MUXPOS_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: MUXPOS_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "ADC AIN0 Pin"] + #[inline(always)] + pub fn ain0(self) -> &'a mut W { + self.variant(MUXPOS_A::AIN0) + } + #[doc = "ADC AIN1 Pin"] + #[inline(always)] + pub fn ain1(self) -> &'a mut W { + self.variant(MUXPOS_A::AIN1) + } + #[doc = "ADC AIN2 Pin"] + #[inline(always)] + pub fn ain2(self) -> &'a mut W { + self.variant(MUXPOS_A::AIN2) + } + #[doc = "ADC AIN3 Pin"] + #[inline(always)] + pub fn ain3(self) -> &'a mut W { + self.variant(MUXPOS_A::AIN3) + } + #[doc = "ADC AIN4 Pin"] + #[inline(always)] + pub fn ain4(self) -> &'a mut W { + self.variant(MUXPOS_A::AIN4) + } + #[doc = "ADC AIN5 Pin"] + #[inline(always)] + pub fn ain5(self) -> &'a mut W { + self.variant(MUXPOS_A::AIN5) + } + #[doc = "ADC AIN6 Pin"] + #[inline(always)] + pub fn ain6(self) -> &'a mut W { + self.variant(MUXPOS_A::AIN6) + } + #[doc = "ADC AIN7 Pin"] + #[inline(always)] + pub fn ain7(self) -> &'a mut W { + self.variant(MUXPOS_A::AIN7) + } + #[doc = "ADC AIN8 Pin"] + #[inline(always)] + pub fn ain8(self) -> &'a mut W { + self.variant(MUXPOS_A::AIN8) + } + #[doc = "ADC AIN9 Pin"] + #[inline(always)] + pub fn ain9(self) -> &'a mut W { + self.variant(MUXPOS_A::AIN9) + } + #[doc = "ADC AIN10 Pin"] + #[inline(always)] + pub fn ain10(self) -> &'a mut W { + self.variant(MUXPOS_A::AIN10) + } + #[doc = "ADC AIN11 Pin"] + #[inline(always)] + pub fn ain11(self) -> &'a mut W { + self.variant(MUXPOS_A::AIN11) + } + #[doc = "Temperature Sensor"] + #[inline(always)] + pub fn temp(self) -> &'a mut W { + self.variant(MUXPOS_A::TEMP) + } + #[doc = "Bandgap Voltage"] + #[inline(always)] + pub fn bandgap(self) -> &'a mut W { + self.variant(MUXPOS_A::BANDGAP) + } + #[doc = "1/4 Scaled Core Supply"] + #[inline(always)] + pub fn scaledcorevcc(self) -> &'a mut W { + self.variant(MUXPOS_A::SCALEDCOREVCC) + } + #[doc = "1/4 Scaled I/O Supply"] + #[inline(always)] + pub fn scalediovcc(self) -> &'a mut W { + self.variant(MUXPOS_A::SCALEDIOVCC) + } + #[doc = "DAC Output"] + #[inline(always)] + pub fn dac(self) -> &'a mut W { + self.variant(MUXPOS_A::DAC) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x1f) | (value as u16 & 0x1f); + self.w + } +} +#[doc = "Negative Mux Input Selection\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum MUXNEG_A { + #[doc = "0: ADC AIN0 Pin"] + AIN0 = 0, + #[doc = "1: ADC AIN1 Pin"] + AIN1 = 1, + #[doc = "2: ADC AIN2 Pin"] + AIN2 = 2, + #[doc = "3: ADC AIN3 Pin"] + AIN3 = 3, + #[doc = "4: ADC AIN4 Pin"] + AIN4 = 4, + #[doc = "5: ADC AIN5 Pin"] + AIN5 = 5, + #[doc = "24: Internal Ground"] + GND = 24, +} +impl From<MUXNEG_A> for u8 { + #[inline(always)] + fn from(variant: MUXNEG_A) -> Self { + variant as _ + } +} +#[doc = "Field `MUXNEG` reader - Negative Mux Input Selection"] +pub struct MUXNEG_R(crate::FieldReader<u8, MUXNEG_A>); +impl MUXNEG_R { + pub(crate) fn new(bits: u8) -> Self { + MUXNEG_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<MUXNEG_A> { + match self.bits { + 0 => Some(MUXNEG_A::AIN0), + 1 => Some(MUXNEG_A::AIN1), + 2 => Some(MUXNEG_A::AIN2), + 3 => Some(MUXNEG_A::AIN3), + 4 => Some(MUXNEG_A::AIN4), + 5 => Some(MUXNEG_A::AIN5), + 24 => Some(MUXNEG_A::GND), + _ => None, + } + } + #[doc = "Checks if the value of the field is `AIN0`"] + #[inline(always)] + pub fn is_ain0(&self) -> bool { + **self == MUXNEG_A::AIN0 + } + #[doc = "Checks if the value of the field is `AIN1`"] + #[inline(always)] + pub fn is_ain1(&self) -> bool { + **self == MUXNEG_A::AIN1 + } + #[doc = "Checks if the value of the field is `AIN2`"] + #[inline(always)] + pub fn is_ain2(&self) -> bool { + **self == MUXNEG_A::AIN2 + } + #[doc = "Checks if the value of the field is `AIN3`"] + #[inline(always)] + pub fn is_ain3(&self) -> bool { + **self == MUXNEG_A::AIN3 + } + #[doc = "Checks if the value of the field is `AIN4`"] + #[inline(always)] + pub fn is_ain4(&self) -> bool { + **self == MUXNEG_A::AIN4 + } + #[doc = "Checks if the value of the field is `AIN5`"] + #[inline(always)] + pub fn is_ain5(&self) -> bool { + **self == MUXNEG_A::AIN5 + } + #[doc = "Checks if the value of the field is `GND`"] + #[inline(always)] + pub fn is_gnd(&self) -> bool { + **self == MUXNEG_A::GND + } +} +impl core::ops::Deref for MUXNEG_R { + type Target = crate::FieldReader<u8, MUXNEG_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `MUXNEG` writer - Negative Mux Input Selection"] +pub struct MUXNEG_W<'a> { + w: &'a mut W, +} +impl<'a> MUXNEG_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: MUXNEG_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "ADC AIN0 Pin"] + #[inline(always)] + pub fn ain0(self) -> &'a mut W { + self.variant(MUXNEG_A::AIN0) + } + #[doc = "ADC AIN1 Pin"] + #[inline(always)] + pub fn ain1(self) -> &'a mut W { + self.variant(MUXNEG_A::AIN1) + } + #[doc = "ADC AIN2 Pin"] + #[inline(always)] + pub fn ain2(self) -> &'a mut W { + self.variant(MUXNEG_A::AIN2) + } + #[doc = "ADC AIN3 Pin"] + #[inline(always)] + pub fn ain3(self) -> &'a mut W { + self.variant(MUXNEG_A::AIN3) + } + #[doc = "ADC AIN4 Pin"] + #[inline(always)] + pub fn ain4(self) -> &'a mut W { + self.variant(MUXNEG_A::AIN4) + } + #[doc = "ADC AIN5 Pin"] + #[inline(always)] + pub fn ain5(self) -> &'a mut W { + self.variant(MUXNEG_A::AIN5) + } + #[doc = "Internal Ground"] + #[inline(always)] + pub fn gnd(self) -> &'a mut W { + self.variant(MUXNEG_A::GND) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x1f << 8)) | ((value as u16 & 0x1f) << 8); + self.w + } +} +impl R { + #[doc = "Bits 0:4 - Positive Mux Input Selection"] + #[inline(always)] + pub fn muxpos(&self) -> MUXPOS_R { + MUXPOS_R::new((self.bits & 0x1f) as u8) + } + #[doc = "Bits 8:12 - Negative Mux Input Selection"] + #[inline(always)] + pub fn muxneg(&self) -> MUXNEG_R { + MUXNEG_R::new(((self.bits >> 8) & 0x1f) as u8) + } +} +impl W { + #[doc = "Bits 0:4 - Positive Mux Input Selection"] + #[inline(always)] + pub fn muxpos(&mut self) -> MUXPOS_W { + MUXPOS_W { w: self } + } + #[doc = "Bits 8:12 - Negative Mux Input Selection"] + #[inline(always)] + pub fn muxneg(&mut self) -> MUXNEG_W { + MUXNEG_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Input Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inputctrl](index.html) module"] +pub struct INPUTCTRL_SPEC; +impl crate::RegisterSpec for INPUTCTRL_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [inputctrl::R](R) reader structure"] +impl crate::Readable for INPUTCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [inputctrl::W](W) writer structure"] +impl crate::Writable for INPUTCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INPUTCTRL to value 0"] +impl crate::Resettable for INPUTCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/intenclr.rs b/src/adc0/intenclr.rs new file mode 100644 index 0000000..382d37e --- /dev/null +++ b/src/adc0/intenclr.rs @@ -0,0 +1,204 @@ +#[doc = "Register `INTENCLR` reader"] +pub struct R(crate::R<INTENCLR_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<INTENCLR_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<INTENCLR_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<INTENCLR_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `INTENCLR` writer"] +pub struct W(crate::W<INTENCLR_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<INTENCLR_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<INTENCLR_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<INTENCLR_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `RESRDY` reader - Result Ready Interrupt Disable"] +pub struct RESRDY_R(crate::FieldReader<bool, bool>); +impl RESRDY_R { + pub(crate) fn new(bits: bool) -> Self { + RESRDY_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RESRDY_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RESRDY` writer - Result Ready Interrupt Disable"] +pub struct RESRDY_W<'a> { + w: &'a mut W, +} +impl<'a> RESRDY_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +#[doc = "Field `OVERRUN` reader - Overrun Interrupt Disable"] +pub struct OVERRUN_R(crate::FieldReader<bool, bool>); +impl OVERRUN_R { + pub(crate) fn new(bits: bool) -> Self { + OVERRUN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVERRUN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVERRUN` writer - Overrun Interrupt Disable"] +pub struct OVERRUN_W<'a> { + w: &'a mut W, +} +impl<'a> OVERRUN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1); + self.w + } +} +#[doc = "Field `WINMON` reader - Window Monitor Interrupt Disable"] +pub struct WINMON_R(crate::FieldReader<bool, bool>); +impl WINMON_R { + pub(crate) fn new(bits: bool) -> Self { + WINMON_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for WINMON_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `WINMON` writer - Window Monitor Interrupt Disable"] +pub struct WINMON_W<'a> { + w: &'a mut W, +} +impl<'a> WINMON_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2); + self.w + } +} +impl R { + #[doc = "Bit 0 - Result Ready Interrupt Disable"] + #[inline(always)] + pub fn resrdy(&self) -> RESRDY_R { + RESRDY_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Overrun Interrupt Disable"] + #[inline(always)] + pub fn overrun(&self) -> OVERRUN_R { + OVERRUN_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Window Monitor Interrupt Disable"] + #[inline(always)] + pub fn winmon(&self) -> WINMON_R { + WINMON_R::new(((self.bits >> 2) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Result Ready Interrupt Disable"] + #[inline(always)] + pub fn resrdy(&mut self) -> RESRDY_W { + RESRDY_W { w: self } + } + #[doc = "Bit 1 - Overrun Interrupt Disable"] + #[inline(always)] + pub fn overrun(&mut self) -> OVERRUN_W { + OVERRUN_W { w: self } + } + #[doc = "Bit 2 - Window Monitor Interrupt Disable"] + #[inline(always)] + pub fn winmon(&mut self) -> WINMON_W { + WINMON_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"] +pub struct INTENCLR_SPEC; +impl crate::RegisterSpec for INTENCLR_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [intenclr::R](R) reader structure"] +impl crate::Readable for INTENCLR_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"] +impl crate::Writable for INTENCLR_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTENCLR to value 0"] +impl crate::Resettable for INTENCLR_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/intenset.rs b/src/adc0/intenset.rs new file mode 100644 index 0000000..89e77ef --- /dev/null +++ b/src/adc0/intenset.rs @@ -0,0 +1,204 @@ +#[doc = "Register `INTENSET` reader"] +pub struct R(crate::R<INTENSET_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<INTENSET_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<INTENSET_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<INTENSET_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `INTENSET` writer"] +pub struct W(crate::W<INTENSET_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<INTENSET_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<INTENSET_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<INTENSET_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `RESRDY` reader - Result Ready Interrupt Enable"] +pub struct RESRDY_R(crate::FieldReader<bool, bool>); +impl RESRDY_R { + pub(crate) fn new(bits: bool) -> Self { + RESRDY_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RESRDY_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RESRDY` writer - Result Ready Interrupt Enable"] +pub struct RESRDY_W<'a> { + w: &'a mut W, +} +impl<'a> RESRDY_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +#[doc = "Field `OVERRUN` reader - Overrun Interrupt Enable"] +pub struct OVERRUN_R(crate::FieldReader<bool, bool>); +impl OVERRUN_R { + pub(crate) fn new(bits: bool) -> Self { + OVERRUN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVERRUN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVERRUN` writer - Overrun Interrupt Enable"] +pub struct OVERRUN_W<'a> { + w: &'a mut W, +} +impl<'a> OVERRUN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1); + self.w + } +} +#[doc = "Field `WINMON` reader - Window Monitor Interrupt Enable"] +pub struct WINMON_R(crate::FieldReader<bool, bool>); +impl WINMON_R { + pub(crate) fn new(bits: bool) -> Self { + WINMON_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for WINMON_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `WINMON` writer - Window Monitor Interrupt Enable"] +pub struct WINMON_W<'a> { + w: &'a mut W, +} +impl<'a> WINMON_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2); + self.w + } +} +impl R { + #[doc = "Bit 0 - Result Ready Interrupt Enable"] + #[inline(always)] + pub fn resrdy(&self) -> RESRDY_R { + RESRDY_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Overrun Interrupt Enable"] + #[inline(always)] + pub fn overrun(&self) -> OVERRUN_R { + OVERRUN_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Window Monitor Interrupt Enable"] + #[inline(always)] + pub fn winmon(&self) -> WINMON_R { + WINMON_R::new(((self.bits >> 2) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Result Ready Interrupt Enable"] + #[inline(always)] + pub fn resrdy(&mut self) -> RESRDY_W { + RESRDY_W { w: self } + } + #[doc = "Bit 1 - Overrun Interrupt Enable"] + #[inline(always)] + pub fn overrun(&mut self) -> OVERRUN_W { + OVERRUN_W { w: self } + } + #[doc = "Bit 2 - Window Monitor Interrupt Enable"] + #[inline(always)] + pub fn winmon(&mut self) -> WINMON_W { + WINMON_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Interrupt Enable Set\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"] +pub struct INTENSET_SPEC; +impl crate::RegisterSpec for INTENSET_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [intenset::R](R) reader structure"] +impl crate::Readable for INTENSET_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"] +impl crate::Writable for INTENSET_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTENSET to value 0"] +impl crate::Resettable for INTENSET_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/intflag.rs b/src/adc0/intflag.rs new file mode 100644 index 0000000..153b81f --- /dev/null +++ b/src/adc0/intflag.rs @@ -0,0 +1,204 @@ +#[doc = "Register `INTFLAG` reader"] +pub struct R(crate::R<INTFLAG_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<INTFLAG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<INTFLAG_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<INTFLAG_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `INTFLAG` writer"] +pub struct W(crate::W<INTFLAG_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<INTFLAG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<INTFLAG_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<INTFLAG_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `RESRDY` reader - Result Ready Interrupt Flag"] +pub struct RESRDY_R(crate::FieldReader<bool, bool>); +impl RESRDY_R { + pub(crate) fn new(bits: bool) -> Self { + RESRDY_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RESRDY_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `RESRDY` writer - Result Ready Interrupt Flag"] +pub struct RESRDY_W<'a> { + w: &'a mut W, +} +impl<'a> RESRDY_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +#[doc = "Field `OVERRUN` reader - Overrun Interrupt Flag"] +pub struct OVERRUN_R(crate::FieldReader<bool, bool>); +impl OVERRUN_R { + pub(crate) fn new(bits: bool) -> Self { + OVERRUN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OVERRUN_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OVERRUN` writer - Overrun Interrupt Flag"] +pub struct OVERRUN_W<'a> { + w: &'a mut W, +} +impl<'a> OVERRUN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1); + self.w + } +} +#[doc = "Field `WINMON` reader - Window Monitor Interrupt Flag"] +pub struct WINMON_R(crate::FieldReader<bool, bool>); +impl WINMON_R { + pub(crate) fn new(bits: bool) -> Self { + WINMON_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for WINMON_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `WINMON` writer - Window Monitor Interrupt Flag"] +pub struct WINMON_W<'a> { + w: &'a mut W, +} +impl<'a> WINMON_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2); + self.w + } +} +impl R { + #[doc = "Bit 0 - Result Ready Interrupt Flag"] + #[inline(always)] + pub fn resrdy(&self) -> RESRDY_R { + RESRDY_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Overrun Interrupt Flag"] + #[inline(always)] + pub fn overrun(&self) -> OVERRUN_R { + OVERRUN_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Window Monitor Interrupt Flag"] + #[inline(always)] + pub fn winmon(&self) -> WINMON_R { + WINMON_R::new(((self.bits >> 2) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - Result Ready Interrupt Flag"] + #[inline(always)] + pub fn resrdy(&mut self) -> RESRDY_W { + RESRDY_W { w: self } + } + #[doc = "Bit 1 - Overrun Interrupt Flag"] + #[inline(always)] + pub fn overrun(&mut self) -> OVERRUN_W { + OVERRUN_W { w: self } + } + #[doc = "Bit 2 - Window Monitor Interrupt Flag"] + #[inline(always)] + pub fn winmon(&mut self) -> WINMON_W { + WINMON_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Interrupt Flag Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intflag](index.html) module"] +pub struct INTFLAG_SPEC; +impl crate::RegisterSpec for INTFLAG_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [intflag::R](R) reader structure"] +impl crate::Readable for INTFLAG_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [intflag::W](W) writer structure"] +impl crate::Writable for INTFLAG_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets INTFLAG to value 0"] +impl crate::Resettable for INTFLAG_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/offsetcorr.rs b/src/adc0/offsetcorr.rs new file mode 100644 index 0000000..5f81609 --- /dev/null +++ b/src/adc0/offsetcorr.rs @@ -0,0 +1,102 @@ +#[doc = "Register `OFFSETCORR` reader"] +pub struct R(crate::R<OFFSETCORR_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<OFFSETCORR_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<OFFSETCORR_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<OFFSETCORR_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `OFFSETCORR` writer"] +pub struct W(crate::W<OFFSETCORR_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<OFFSETCORR_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<OFFSETCORR_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<OFFSETCORR_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `OFFSETCORR` reader - Offset Correction Value"] +pub struct OFFSETCORR_R(crate::FieldReader<u16, u16>); +impl OFFSETCORR_R { + pub(crate) fn new(bits: u16) -> Self { + OFFSETCORR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OFFSETCORR_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OFFSETCORR` writer - Offset Correction Value"] +pub struct OFFSETCORR_W<'a> { + w: &'a mut W, +} +impl<'a> OFFSETCORR_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0x0fff) | (value as u16 & 0x0fff); + self.w + } +} +impl R { + #[doc = "Bits 0:11 - Offset Correction Value"] + #[inline(always)] + pub fn offsetcorr(&self) -> OFFSETCORR_R { + OFFSETCORR_R::new((self.bits & 0x0fff) as u16) + } +} +impl W { + #[doc = "Bits 0:11 - Offset Correction Value"] + #[inline(always)] + pub fn offsetcorr(&mut self) -> OFFSETCORR_W { + OFFSETCORR_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Offset Correction\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [offsetcorr](index.html) module"] +pub struct OFFSETCORR_SPEC; +impl crate::RegisterSpec for OFFSETCORR_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [offsetcorr::R](R) reader structure"] +impl crate::Readable for OFFSETCORR_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [offsetcorr::W](W) writer structure"] +impl crate::Writable for OFFSETCORR_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets OFFSETCORR to value 0"] +impl crate::Resettable for OFFSETCORR_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/refctrl.rs b/src/adc0/refctrl.rs new file mode 100644 index 0000000..93661b9 --- /dev/null +++ b/src/adc0/refctrl.rs @@ -0,0 +1,249 @@ +#[doc = "Register `REFCTRL` reader"] +pub struct R(crate::R<REFCTRL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<REFCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<REFCTRL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<REFCTRL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `REFCTRL` writer"] +pub struct W(crate::W<REFCTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<REFCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<REFCTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<REFCTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Reference Selection\n\nValue on reset: 0"] +#[derive(Clone, Copy, Debug, PartialEq)] +#[repr(u8)] +pub enum REFSEL_A { + #[doc = "0: Internal Bandgap Reference"] + INTREF = 0, + #[doc = "1: 1/1.6 VDDANA"] + INTVCC0 = 1, + #[doc = "2: 1/2 VDDANA"] + INTVCC1 = 2, + #[doc = "3: External Reference"] + AREFA = 3, + #[doc = "4: DAC"] + DAC = 4, + #[doc = "5: VDDANA"] + INTVCC2 = 5, +} +impl From<REFSEL_A> for u8 { + #[inline(always)] + fn from(variant: REFSEL_A) -> Self { + variant as _ + } +} +#[doc = "Field `REFSEL` reader - Reference Selection"] +pub struct REFSEL_R(crate::FieldReader<u8, REFSEL_A>); +impl REFSEL_R { + pub(crate) fn new(bits: u8) -> Self { + REFSEL_R(crate::FieldReader::new(bits)) + } + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> Option<REFSEL_A> { + match self.bits { + 0 => Some(REFSEL_A::INTREF), + 1 => Some(REFSEL_A::INTVCC0), + 2 => Some(REFSEL_A::INTVCC1), + 3 => Some(REFSEL_A::AREFA), + 4 => Some(REFSEL_A::DAC), + 5 => Some(REFSEL_A::INTVCC2), + _ => None, + } + } + #[doc = "Checks if the value of the field is `INTREF`"] + #[inline(always)] + pub fn is_intref(&self) -> bool { + **self == REFSEL_A::INTREF + } + #[doc = "Checks if the value of the field is `INTVCC0`"] + #[inline(always)] + pub fn is_intvcc0(&self) -> bool { + **self == REFSEL_A::INTVCC0 + } + #[doc = "Checks if the value of the field is `INTVCC1`"] + #[inline(always)] + pub fn is_intvcc1(&self) -> bool { + **self == REFSEL_A::INTVCC1 + } + #[doc = "Checks if the value of the field is `AREFA`"] + #[inline(always)] + pub fn is_arefa(&self) -> bool { + **self == REFSEL_A::AREFA + } + #[doc = "Checks if the value of the field is `DAC`"] + #[inline(always)] + pub fn is_dac(&self) -> bool { + **self == REFSEL_A::DAC + } + #[doc = "Checks if the value of the field is `INTVCC2`"] + #[inline(always)] + pub fn is_intvcc2(&self) -> bool { + **self == REFSEL_A::INTVCC2 + } +} +impl core::ops::Deref for REFSEL_R { + type Target = crate::FieldReader<u8, REFSEL_A>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `REFSEL` writer - Reference Selection"] +pub struct REFSEL_W<'a> { + w: &'a mut W, +} +impl<'a> REFSEL_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: REFSEL_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "Internal Bandgap Reference"] + #[inline(always)] + pub fn intref(self) -> &'a mut W { + self.variant(REFSEL_A::INTREF) + } + #[doc = "1/1.6 VDDANA"] + #[inline(always)] + pub fn intvcc0(self) -> &'a mut W { + self.variant(REFSEL_A::INTVCC0) + } + #[doc = "1/2 VDDANA"] + #[inline(always)] + pub fn intvcc1(self) -> &'a mut W { + self.variant(REFSEL_A::INTVCC1) + } + #[doc = "External Reference"] + #[inline(always)] + pub fn arefa(self) -> &'a mut W { + self.variant(REFSEL_A::AREFA) + } + #[doc = "DAC"] + #[inline(always)] + pub fn dac(self) -> &'a mut W { + self.variant(REFSEL_A::DAC) + } + #[doc = "VDDANA"] + #[inline(always)] + pub fn intvcc2(self) -> &'a mut W { + self.variant(REFSEL_A::INTVCC2) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x0f) | (value as u8 & 0x0f); + self.w + } +} +#[doc = "Field `REFCOMP` reader - Reference Buffer Offset Compensation Enable"] +pub struct REFCOMP_R(crate::FieldReader<bool, bool>); +impl REFCOMP_R { + pub(crate) fn new(bits: bool) -> Self { + REFCOMP_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for REFCOMP_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `REFCOMP` writer - Reference Buffer Offset Compensation Enable"] +pub struct REFCOMP_W<'a> { + w: &'a mut W, +} +impl<'a> REFCOMP_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7); + self.w + } +} +impl R { + #[doc = "Bits 0:3 - Reference Selection"] + #[inline(always)] + pub fn refsel(&self) -> REFSEL_R { + REFSEL_R::new((self.bits & 0x0f) as u8) + } + #[doc = "Bit 7 - Reference Buffer Offset Compensation Enable"] + #[inline(always)] + pub fn refcomp(&self) -> REFCOMP_R { + REFCOMP_R::new(((self.bits >> 7) & 0x01) != 0) + } +} +impl W { + #[doc = "Bits 0:3 - Reference Selection"] + #[inline(always)] + pub fn refsel(&mut self) -> REFSEL_W { + REFSEL_W { w: self } + } + #[doc = "Bit 7 - Reference Buffer Offset Compensation Enable"] + #[inline(always)] + pub fn refcomp(&mut self) -> REFCOMP_W { + REFCOMP_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Reference Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [refctrl](index.html) module"] +pub struct REFCTRL_SPEC; +impl crate::RegisterSpec for REFCTRL_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [refctrl::R](R) reader structure"] +impl crate::Readable for REFCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [refctrl::W](W) writer structure"] +impl crate::Writable for REFCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets REFCTRL to value 0"] +impl crate::Resettable for REFCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/result.rs b/src/adc0/result.rs new file mode 100644 index 0000000..6255253 --- /dev/null +++ b/src/adc0/result.rs @@ -0,0 +1,52 @@ +#[doc = "Register `RESULT` reader"] +pub struct R(crate::R<RESULT_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<RESULT_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<RESULT_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<RESULT_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `RESULT` reader - Result Value"] +pub struct RESULT_R(crate::FieldReader<u16, u16>); +impl RESULT_R { + pub(crate) fn new(bits: u16) -> Self { + RESULT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for RESULT_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:15 - Result Value"] + #[inline(always)] + pub fn result(&self) -> RESULT_R { + RESULT_R::new((self.bits & 0xffff) as u16) + } +} +#[doc = "Result\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [result](index.html) module"] +pub struct RESULT_SPEC; +impl crate::RegisterSpec for RESULT_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [result::R](R) reader structure"] +impl crate::Readable for RESULT_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets RESULT to value 0"] +impl crate::Resettable for RESULT_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/sampctrl.rs b/src/adc0/sampctrl.rs new file mode 100644 index 0000000..2792fa4 --- /dev/null +++ b/src/adc0/sampctrl.rs @@ -0,0 +1,148 @@ +#[doc = "Register `SAMPCTRL` reader"] +pub struct R(crate::R<SAMPCTRL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<SAMPCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<SAMPCTRL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<SAMPCTRL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `SAMPCTRL` writer"] +pub struct W(crate::W<SAMPCTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<SAMPCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<SAMPCTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<SAMPCTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `SAMPLEN` reader - Sampling Time Length"] +pub struct SAMPLEN_R(crate::FieldReader<u8, u8>); +impl SAMPLEN_R { + pub(crate) fn new(bits: u8) -> Self { + SAMPLEN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SAMPLEN_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SAMPLEN` writer - Sampling Time Length"] +pub struct SAMPLEN_W<'a> { + w: &'a mut W, +} +impl<'a> SAMPLEN_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x3f) | (value as u8 & 0x3f); + self.w + } +} +#[doc = "Field `OFFCOMP` reader - Comparator Offset Compensation Enable"] +pub struct OFFCOMP_R(crate::FieldReader<bool, bool>); +impl OFFCOMP_R { + pub(crate) fn new(bits: bool) -> Self { + OFFCOMP_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OFFCOMP_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OFFCOMP` writer - Comparator Offset Compensation Enable"] +pub struct OFFCOMP_W<'a> { + w: &'a mut W, +} +impl<'a> OFFCOMP_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u8 & 0x01) << 7); + self.w + } +} +impl R { + #[doc = "Bits 0:5 - Sampling Time Length"] + #[inline(always)] + pub fn samplen(&self) -> SAMPLEN_R { + SAMPLEN_R::new((self.bits & 0x3f) as u8) + } + #[doc = "Bit 7 - Comparator Offset Compensation Enable"] + #[inline(always)] + pub fn offcomp(&self) -> OFFCOMP_R { + OFFCOMP_R::new(((self.bits >> 7) & 0x01) != 0) + } +} +impl W { + #[doc = "Bits 0:5 - Sampling Time Length"] + #[inline(always)] + pub fn samplen(&mut self) -> SAMPLEN_W { + SAMPLEN_W { w: self } + } + #[doc = "Bit 7 - Comparator Offset Compensation Enable"] + #[inline(always)] + pub fn offcomp(&mut self) -> OFFCOMP_W { + OFFCOMP_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Sample Time Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sampctrl](index.html) module"] +pub struct SAMPCTRL_SPEC; +impl crate::RegisterSpec for SAMPCTRL_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [sampctrl::R](R) reader structure"] +impl crate::Readable for SAMPCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [sampctrl::W](W) writer structure"] +impl crate::Writable for SAMPCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets SAMPCTRL to value 0"] +impl crate::Resettable for SAMPCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/seqctrl.rs b/src/adc0/seqctrl.rs new file mode 100644 index 0000000..86dcf60 --- /dev/null +++ b/src/adc0/seqctrl.rs @@ -0,0 +1,102 @@ +#[doc = "Register `SEQCTRL` reader"] +pub struct R(crate::R<SEQCTRL_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<SEQCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<SEQCTRL_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<SEQCTRL_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `SEQCTRL` writer"] +pub struct W(crate::W<SEQCTRL_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<SEQCTRL_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<SEQCTRL_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<SEQCTRL_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `SEQEN` reader - Enable Positive Input in the Sequence"] +pub struct SEQEN_R(crate::FieldReader<u32, u32>); +impl SEQEN_R { + pub(crate) fn new(bits: u32) -> Self { + SEQEN_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SEQEN_R { + type Target = crate::FieldReader<u32, u32>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SEQEN` writer - Enable Positive Input in the Sequence"] +pub struct SEQEN_W<'a> { + w: &'a mut W, +} +impl<'a> SEQEN_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u32) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff_ffff) | (value as u32 & 0xffff_ffff); + self.w + } +} +impl R { + #[doc = "Bits 0:31 - Enable Positive Input in the Sequence"] + #[inline(always)] + pub fn seqen(&self) -> SEQEN_R { + SEQEN_R::new((self.bits & 0xffff_ffff) as u32) + } +} +impl W { + #[doc = "Bits 0:31 - Enable Positive Input in the Sequence"] + #[inline(always)] + pub fn seqen(&mut self) -> SEQEN_W { + SEQEN_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Sequence Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [seqctrl](index.html) module"] +pub struct SEQCTRL_SPEC; +impl crate::RegisterSpec for SEQCTRL_SPEC { + type Ux = u32; +} +#[doc = "`read()` method returns [seqctrl::R](R) reader structure"] +impl crate::Readable for SEQCTRL_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [seqctrl::W](W) writer structure"] +impl crate::Writable for SEQCTRL_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets SEQCTRL to value 0"] +impl crate::Resettable for SEQCTRL_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/seqstatus.rs b/src/adc0/seqstatus.rs new file mode 100644 index 0000000..816ea4c --- /dev/null +++ b/src/adc0/seqstatus.rs @@ -0,0 +1,71 @@ +#[doc = "Register `SEQSTATUS` reader"] +pub struct R(crate::R<SEQSTATUS_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<SEQSTATUS_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<SEQSTATUS_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<SEQSTATUS_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `SEQSTATE` reader - Sequence State"] +pub struct SEQSTATE_R(crate::FieldReader<u8, u8>); +impl SEQSTATE_R { + pub(crate) fn new(bits: u8) -> Self { + SEQSTATE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SEQSTATE_R { + type Target = crate::FieldReader<u8, u8>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SEQBUSY` reader - Sequence Busy"] +pub struct SEQBUSY_R(crate::FieldReader<bool, bool>); +impl SEQBUSY_R { + pub(crate) fn new(bits: bool) -> Self { + SEQBUSY_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SEQBUSY_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bits 0:4 - Sequence State"] + #[inline(always)] + pub fn seqstate(&self) -> SEQSTATE_R { + SEQSTATE_R::new((self.bits & 0x1f) as u8) + } + #[doc = "Bit 7 - Sequence Busy"] + #[inline(always)] + pub fn seqbusy(&self) -> SEQBUSY_R { + SEQBUSY_R::new(((self.bits >> 7) & 0x01) != 0) + } +} +#[doc = "Sequence Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [seqstatus](index.html) module"] +pub struct SEQSTATUS_SPEC; +impl crate::RegisterSpec for SEQSTATUS_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [seqstatus::R](R) reader structure"] +impl crate::Readable for SEQSTATUS_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets SEQSTATUS to value 0"] +impl crate::Resettable for SEQSTATUS_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/swtrig.rs b/src/adc0/swtrig.rs new file mode 100644 index 0000000..d8f7b4b --- /dev/null +++ b/src/adc0/swtrig.rs @@ -0,0 +1,158 @@ +#[doc = "Register `SWTRIG` reader"] +pub struct R(crate::R<SWTRIG_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<SWTRIG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<SWTRIG_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<SWTRIG_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `SWTRIG` writer"] +pub struct W(crate::W<SWTRIG_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<SWTRIG_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<SWTRIG_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<SWTRIG_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `FLUSH` reader - ADC Flush"] +pub struct FLUSH_R(crate::FieldReader<bool, bool>); +impl FLUSH_R { + pub(crate) fn new(bits: bool) -> Self { + FLUSH_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for FLUSH_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `FLUSH` writer - ADC Flush"] +pub struct FLUSH_W<'a> { + w: &'a mut W, +} +impl<'a> FLUSH_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01); + self.w + } +} +#[doc = "Field `START` reader - Start ADC Conversion"] +pub struct START_R(crate::FieldReader<bool, bool>); +impl START_R { + pub(crate) fn new(bits: bool) -> Self { + START_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for START_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `START` writer - Start ADC Conversion"] +pub struct START_W<'a> { + w: &'a mut W, +} +impl<'a> START_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1); + self.w + } +} +impl R { + #[doc = "Bit 0 - ADC Flush"] + #[inline(always)] + pub fn flush(&self) -> FLUSH_R { + FLUSH_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Start ADC Conversion"] + #[inline(always)] + pub fn start(&self) -> START_R { + START_R::new(((self.bits >> 1) & 0x01) != 0) + } +} +impl W { + #[doc = "Bit 0 - ADC Flush"] + #[inline(always)] + pub fn flush(&mut self) -> FLUSH_W { + FLUSH_W { w: self } + } + #[doc = "Bit 1 - Start ADC Conversion"] + #[inline(always)] + pub fn start(&mut self) -> START_W { + START_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Software Trigger\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swtrig](index.html) module"] +pub struct SWTRIG_SPEC; +impl crate::RegisterSpec for SWTRIG_SPEC { + type Ux = u8; +} +#[doc = "`read()` method returns [swtrig::R](R) reader structure"] +impl crate::Readable for SWTRIG_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [swtrig::W](W) writer structure"] +impl crate::Writable for SWTRIG_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets SWTRIG to value 0"] +impl crate::Resettable for SWTRIG_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/syncbusy.rs b/src/adc0/syncbusy.rs new file mode 100644 index 0000000..846187f --- /dev/null +++ b/src/adc0/syncbusy.rs @@ -0,0 +1,242 @@ +#[doc = "Register `SYNCBUSY` reader"] +pub struct R(crate::R<SYNCBUSY_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<SYNCBUSY_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<SYNCBUSY_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Field `SWRST` reader - SWRST Synchronization Busy"] +pub struct SWRST_R(crate::FieldReader<bool, bool>); +impl SWRST_R { + pub(crate) fn new(bits: bool) -> Self { + SWRST_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWRST_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `ENABLE` reader - ENABLE Synchronization Busy"] +pub struct ENABLE_R(crate::FieldReader<bool, bool>); +impl ENABLE_R { + pub(crate) fn new(bits: bool) -> Self { + ENABLE_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for ENABLE_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `INPUTCTRL` reader - INPUTCTRL Synchronization Busy"] +pub struct INPUTCTRL_R(crate::FieldReader<bool, bool>); +impl INPUTCTRL_R { + pub(crate) fn new(bits: bool) -> Self { + INPUTCTRL_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for INPUTCTRL_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `CTRLC` reader - CTRLC Synchronization Busy"] +pub struct CTRLC_R(crate::FieldReader<bool, bool>); +impl CTRLC_R { + pub(crate) fn new(bits: bool) -> Self { + CTRLC_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for CTRLC_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `AVGCTRL` reader - AVGCTRL Synchronization Busy"] +pub struct AVGCTRL_R(crate::FieldReader<bool, bool>); +impl AVGCTRL_R { + pub(crate) fn new(bits: bool) -> Self { + AVGCTRL_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for AVGCTRL_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SAMPCTRL` reader - SAMPCTRL Synchronization Busy"] +pub struct SAMPCTRL_R(crate::FieldReader<bool, bool>); +impl SAMPCTRL_R { + pub(crate) fn new(bits: bool) -> Self { + SAMPCTRL_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SAMPCTRL_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `WINLT` reader - WINLT Synchronization Busy"] +pub struct WINLT_R(crate::FieldReader<bool, bool>); +impl WINLT_R { + pub(crate) fn new(bits: bool) -> Self { + WINLT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for WINLT_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `WINUT` reader - WINUT Synchronization Busy"] +pub struct WINUT_R(crate::FieldReader<bool, bool>); +impl WINUT_R { + pub(crate) fn new(bits: bool) -> Self { + WINUT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for WINUT_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `GAINCORR` reader - GAINCORR Synchronization Busy"] +pub struct GAINCORR_R(crate::FieldReader<bool, bool>); +impl GAINCORR_R { + pub(crate) fn new(bits: bool) -> Self { + GAINCORR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for GAINCORR_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `OFFSETCORR` reader - OFFSETCTRL Synchronization Busy"] +pub struct OFFSETCORR_R(crate::FieldReader<bool, bool>); +impl OFFSETCORR_R { + pub(crate) fn new(bits: bool) -> Self { + OFFSETCORR_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for OFFSETCORR_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `SWTRIG` reader - SWTRG Synchronization Busy"] +pub struct SWTRIG_R(crate::FieldReader<bool, bool>); +impl SWTRIG_R { + pub(crate) fn new(bits: bool) -> Self { + SWTRIG_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for SWTRIG_R { + type Target = crate::FieldReader<bool, bool>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl R { + #[doc = "Bit 0 - SWRST Synchronization Busy"] + #[inline(always)] + pub fn swrst(&self) -> SWRST_R { + SWRST_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - ENABLE Synchronization Busy"] + #[inline(always)] + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - INPUTCTRL Synchronization Busy"] + #[inline(always)] + pub fn inputctrl(&self) -> INPUTCTRL_R { + INPUTCTRL_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - CTRLC Synchronization Busy"] + #[inline(always)] + pub fn ctrlc(&self) -> CTRLC_R { + CTRLC_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - AVGCTRL Synchronization Busy"] + #[inline(always)] + pub fn avgctrl(&self) -> AVGCTRL_R { + AVGCTRL_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - SAMPCTRL Synchronization Busy"] + #[inline(always)] + pub fn sampctrl(&self) -> SAMPCTRL_R { + SAMPCTRL_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - WINLT Synchronization Busy"] + #[inline(always)] + pub fn winlt(&self) -> WINLT_R { + WINLT_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - WINUT Synchronization Busy"] + #[inline(always)] + pub fn winut(&self) -> WINUT_R { + WINUT_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - GAINCORR Synchronization Busy"] + #[inline(always)] + pub fn gaincorr(&self) -> GAINCORR_R { + GAINCORR_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 9 - OFFSETCTRL Synchronization Busy"] + #[inline(always)] + pub fn offsetcorr(&self) -> OFFSETCORR_R { + OFFSETCORR_R::new(((self.bits >> 9) & 0x01) != 0) + } + #[doc = "Bit 10 - SWTRG Synchronization Busy"] + #[inline(always)] + pub fn swtrig(&self) -> SWTRIG_R { + SWTRIG_R::new(((self.bits >> 10) & 0x01) != 0) + } +} +#[doc = "Synchronization Busy\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"] +pub struct SYNCBUSY_SPEC; +impl crate::RegisterSpec for SYNCBUSY_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [syncbusy::R](R) reader structure"] +impl crate::Readable for SYNCBUSY_SPEC { + type Reader = R; +} +#[doc = "`reset()` method sets SYNCBUSY to value 0"] +impl crate::Resettable for SYNCBUSY_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/winlt.rs b/src/adc0/winlt.rs new file mode 100644 index 0000000..1bb11a3 --- /dev/null +++ b/src/adc0/winlt.rs @@ -0,0 +1,102 @@ +#[doc = "Register `WINLT` reader"] +pub struct R(crate::R<WINLT_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<WINLT_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<WINLT_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<WINLT_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `WINLT` writer"] +pub struct W(crate::W<WINLT_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<WINLT_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<WINLT_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<WINLT_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `WINLT` reader - Window Lower Threshold"] +pub struct WINLT_R(crate::FieldReader<u16, u16>); +impl WINLT_R { + pub(crate) fn new(bits: u16) -> Self { + WINLT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for WINLT_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `WINLT` writer - Window Lower Threshold"] +pub struct WINLT_W<'a> { + w: &'a mut W, +} +impl<'a> WINLT_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u16 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - Window Lower Threshold"] + #[inline(always)] + pub fn winlt(&self) -> WINLT_R { + WINLT_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - Window Lower Threshold"] + #[inline(always)] + pub fn winlt(&mut self) -> WINLT_W { + WINLT_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Window Monitor Lower Threshold\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [winlt](index.html) module"] +pub struct WINLT_SPEC; +impl crate::RegisterSpec for WINLT_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [winlt::R](R) reader structure"] +impl crate::Readable for WINLT_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [winlt::W](W) writer structure"] +impl crate::Writable for WINLT_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets WINLT to value 0"] +impl crate::Resettable for WINLT_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} diff --git a/src/adc0/winut.rs b/src/adc0/winut.rs new file mode 100644 index 0000000..b371391 --- /dev/null +++ b/src/adc0/winut.rs @@ -0,0 +1,102 @@ +#[doc = "Register `WINUT` reader"] +pub struct R(crate::R<WINUT_SPEC>); +impl core::ops::Deref for R { + type Target = crate::R<WINUT_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl From<crate::R<WINUT_SPEC>> for R { + #[inline(always)] + fn from(reader: crate::R<WINUT_SPEC>) -> Self { + R(reader) + } +} +#[doc = "Register `WINUT` writer"] +pub struct W(crate::W<WINUT_SPEC>); +impl core::ops::Deref for W { + type Target = crate::W<WINUT_SPEC>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl core::ops::DerefMut for W { + #[inline(always)] + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 + } +} +impl From<crate::W<WINUT_SPEC>> for W { + #[inline(always)] + fn from(writer: crate::W<WINUT_SPEC>) -> Self { + W(writer) + } +} +#[doc = "Field `WINUT` reader - Window Upper Threshold"] +pub struct WINUT_R(crate::FieldReader<u16, u16>); +impl WINUT_R { + pub(crate) fn new(bits: u16) -> Self { + WINUT_R(crate::FieldReader::new(bits)) + } +} +impl core::ops::Deref for WINUT_R { + type Target = crate::FieldReader<u16, u16>; + #[inline(always)] + fn deref(&self) -> &Self::Target { + &self.0 + } +} +#[doc = "Field `WINUT` writer - Window Upper Threshold"] +pub struct WINUT_W<'a> { + w: &'a mut W, +} +impl<'a> WINUT_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !0xffff) | (value as u16 & 0xffff); + self.w + } +} +impl R { + #[doc = "Bits 0:15 - Window Upper Threshold"] + #[inline(always)] + pub fn winut(&self) -> WINUT_R { + WINUT_R::new((self.bits & 0xffff) as u16) + } +} +impl W { + #[doc = "Bits 0:15 - Window Upper Threshold"] + #[inline(always)] + pub fn winut(&mut self) -> WINUT_W { + WINUT_W { w: self } + } + #[doc = "Writes raw bits to the register."] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { + self.0.bits(bits); + self + } +} +#[doc = "Window Monitor Upper Threshold\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [winut](index.html) module"] +pub struct WINUT_SPEC; +impl crate::RegisterSpec for WINUT_SPEC { + type Ux = u16; +} +#[doc = "`read()` method returns [winut::R](R) reader structure"] +impl crate::Readable for WINUT_SPEC { + type Reader = R; +} +#[doc = "`write(|w| ..)` method takes [winut::W](W) writer structure"] +impl crate::Writable for WINUT_SPEC { + type Writer = W; +} +#[doc = "`reset()` method sets WINUT to value 0"] +impl crate::Resettable for WINUT_SPEC { + #[inline(always)] + fn reset_value() -> Self::Ux { + 0 + } +} |